Revision 7d57f408 target-arm/helper.c

b/target-arm/helper.c
66 66
    REGINFO_SENTINEL
67 67
};
68 68

  
69
static const ARMCPRegInfo not_v6_cp_reginfo[] = {
70
    /* Not all pre-v6 cores implemented this WFI, so this is slightly
71
     * over-broad.
72
     */
73
    { .name = "WFI_v5", .cp = 15, .crn = 7, .crm = 8, .opc1 = 0, .opc2 = 2,
74
      .access = PL1_W, .type = ARM_CP_WFI },
75
    REGINFO_SENTINEL
76
};
77

  
78
static const ARMCPRegInfo not_v7_cp_reginfo[] = {
79
    /* Standard v6 WFI (also used in some pre-v6 cores); not in v7 (which
80
     * is UNPREDICTABLE; we choose to NOP as most implementations do).
81
     */
82
    { .name = "WFI_v6", .cp = 15, .crn = 7, .crm = 0, .opc1 = 0, .opc2 = 4,
83
      .access = PL1_W, .type = ARM_CP_WFI },
84
    REGINFO_SENTINEL
85
};
86

  
87
static const ARMCPRegInfo v6_cp_reginfo[] = {
88
    /* prefetch by MVA in v6, NOP in v7 */
89
    { .name = "MVA_prefetch",
90
      .cp = 15, .crn = 7, .crm = 13, .opc1 = 0, .opc2 = 1,
91
      .access = PL1_W, .type = ARM_CP_NOP },
92
    { .name = "ISB", .cp = 15, .crn = 7, .crm = 5, .opc1 = 0, .opc2 = 4,
93
      .access = PL0_W, .type = ARM_CP_NOP },
94
    { .name = "ISB", .cp = 15, .crn = 7, .crm = 10, .opc1 = 0, .opc2 = 4,
95
      .access = PL0_W, .type = ARM_CP_NOP },
96
    { .name = "ISB", .cp = 15, .crn = 7, .crm = 10, .opc1 = 0, .opc2 = 5,
97
      .access = PL0_W, .type = ARM_CP_NOP },
98
    REGINFO_SENTINEL
99
};
100

  
69 101
static const ARMCPRegInfo v7_cp_reginfo[] = {
70 102
    /* DBGDRAR, DBGDSAR: always RAZ since we don't implement memory mapped
71 103
     * debug components
......
74 106
      .access = PL0_R, .type = ARM_CP_CONST, .resetvalue = 0 },
75 107
    { .name = "DBGDRAR", .cp = 14, .crn = 2, .crm = 0, .opc1 = 0, .opc2 = 0,
76 108
      .access = PL0_R, .type = ARM_CP_CONST, .resetvalue = 0 },
109
    /* the old v6 WFI, UNPREDICTABLE in v7 but we choose to NOP */
110
    { .name = "NOP", .cp = 15, .crn = 7, .crm = 0, .opc1 = 0, .opc2 = 4,
111
      .access = PL1_W, .type = ARM_CP_NOP },
77 112
    REGINFO_SENTINEL
78 113
};
79 114

  
......
129 164
    }
130 165

  
131 166
    define_arm_cp_regs(cpu, cp_reginfo);
167
    if (arm_feature(env, ARM_FEATURE_V6)) {
168
        define_arm_cp_regs(cpu, v6_cp_reginfo);
169
    } else {
170
        define_arm_cp_regs(cpu, not_v6_cp_reginfo);
171
    }
132 172
    if (arm_feature(env, ARM_FEATURE_V7)) {
133 173
        define_arm_cp_regs(cpu, v7_cp_reginfo);
174
    } else {
175
        define_arm_cp_regs(cpu, not_v7_cp_reginfo);
134 176
    }
135 177
    if (arm_feature(env, ARM_FEATURE_THUMB2EE)) {
136 178
        define_arm_cp_regs(cpu, t2ee_cp_reginfo);

Also available in: Unified diff