memory: give name to every AddressSpace
The "info mtree" command in QEMU console prints only "memory" and "I/O" address spaces while there are actually a lot more other AddressSpacestructs created by PCI and VIO devices. Those devices do not normallyhave names and therefore not present in "info mtree" output....
memory: make section size a 128-bit integer
So far, the size of all regions passed to listeners could fit in 64 bits,because artificial regions (containers and aliases) are eliminated bythe memory core, leaving only device regions which have reasonable sizes...
memory: iommu support
Add a new memory region type that translates addresses it is given,then forwards them to a target address space. This is similar toan alias, except that the mapping is more flexible than a lineartranslation and trucation, and also less efficient since the...
memory: Add iommu map/unmap notifiers
This patch adds a NotifierList to MemoryRegions which represent IOMMUsallowing other parts of the code to register interest in mappings orunmappings from the IOMMU. All IOMMU implementations will need to callmemory_region_notify_iommu() to inform those waiting on the notifier list,...
memory: move private types to exec.c
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
exec: Resolve subpages in one step except for IOTLB fills
Except for the case of setting the IOTLB entry in TCG mode, we can avoidthe subpage dispatching handlers and do the resolution directly onaddress_space_lookup_region. An IOTLB entry describes a full page, not...
exec: return MemoryRegion from address_space_translate
Only address_space_translate_for_iotlb needs to return the section.Every caller of address_space_translate now uses only section->mr,return it directly.
Revert "memory: limit sections in the radix tree to the actual address space size"
This reverts commit 86a8623692b1b559a419a92eb8b6897c221bca74.
Merge remote-tracking branch 'pmaydell/tcg-aarch64.next' into staging
tcg/aarch64: implement new TCG target for aarch64
add preliminary support for TCG target aarch64.
Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>Reviewed-by: Richard Henderson <rth@twiddle.net>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
tcg: Use QEMU_BUILD_BUG_ON for CPU_TLB_ENTRY_BITS
Rather than a hand-coded version of the same thing.
Reviewed-by: Andreas Färber <afaerber@suse.de>Reviewed-by: liguang <lig.fnst@cn.fujitsu.com>Signed-off-by: Richard Henderson <rth@twiddle.net>
memory: add return value to address_space_rw/read/write
Reviewed-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
memory: propagate errors on I/O dispatch
exec: just use io_mem_read/io_mem_write for 8-byte I/O accesses
The memory API is able to split it in two 4-byte accesses.
memory: add address_space_access_valid
The old-style IOMMU lets you check whether an access is valid in agiven DMAContext. There is no equivalent for AddressSpace in thememory API, implement it with a lookup of the dispatch tree.
Reviewed-by: Richard Henderson <rth@twiddle.net>...
memory: export memory_region_access_valid to exec.c
We'll use it to implement address_space_access_valid.
memory: move unassigned_mem_ops to memory.c
reservation_ops is already doing the same thing.
memory: add address_space_translate
Using phys_page_find to translate an AddressSpace to a MemoryRegionSectionis unwieldy. It requires to pass the page index rather than the address,and later memory_region_section_addr has to be called. Replacememory_region_section_addr with a function that does all of it: call...
exec: make io_mem_unassigned private
There is no reason to avoid a recompile before accessing unassignedmemory. In the end it will be treated as MMIO anyway.
exec: eliminate io_mem_ram
It is never used, the IOTLB always goes through io_mem_notdirty.
In fact in softmmu_template.h, if it were, QEMU would crash justbelow the tests, as soon as io_mem_read/write dispatches toerror_mem_read/write.
memory: limit sections in the radix tree to the actual address space size
The radix tree is statically sized to fit TARGET_PHYS_ADDR_SPACE_BITS.If a larger memory region is registered, it will overflow.
Fix by limiting any section in the radix tree to the supported size....
memory: make memory_global_sync_dirty_bitmap take an AddressSpace
Since this is a MemoryListener operation, it only makes senseon an AddressSpace granularity.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
memory: Rename readable flag to romd_mode
"Readable" is a very unfortunate name for this flag because even arom_device region will always be readable from the guest POV. Whatdiffers is the mapping, just like the comments had to explain already.Also, readable could currently be understood as being a generic region...
memory: allow memory_region_find() to run on non-root memory regions
memory_region_find() is similar to registering a MemoryListener andchecking for the MemoryRegionSections that come from a particularregion. There is no reason for this to be limited to a root memory...
exec: eliminate stq_phys_notdirty
It is not used anywhere.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
exec: make qemu_get_ram_ptr private
It is a private interface between exec.c and memory.c.
exec: eliminate qemu_put_ram_ptr
tcg-arm: Convert to CONFIG_QEMU_LDST_OPTIMIZATION
Move the slow path out of line, as the TODO's mention.This allows the fast path to be unconditional, which canspeed up the fast path as well, depending on the core.
Signed-off-by: Richard Henderson <rth@twiddle.net>
elfload: use abi_short/ushort instead of target_short/ushort
The alignment is a characteristic of the ABI, not the CPU.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
elfload: use abi_int/uint instead of target_int/uint
elfload: only give abi_long/ulong the alignment specified by the target
Previously, this was done for target_long/ulong, and propagated toabi_long/ulong via a typedef. But target_long/ulong should nothave any specific alignment, it is never used to access guest...
elfload: use abi_llong/ullong instead of target_llong/ullong
memory: move core typedefs to qemu/typedefs.h
exec: remove useless declarations from memory-internal.h
hw: move headers to include/
Many of these should be cleaned up with proper qdev-/QOM-ification.Right now there are many catch-all headers in include/hw/ARCH dependingon cpu.h, and this makes it necessary to compile these files per-target.However, fixing this does not belong in these patches....
cpu: Move halted and interrupt_request fields to CPUState
Both fields are used in VMState, thus need to be moved together.Explicitly zero them on reset since they were located beforebreakpoints.
Pass PowerPCCPU to kvmppc_handle_halt().
Signed-off-by: Andreas Färber <afaerber@suse.de>
exec: Pass CPUState to cpu_reset_interrupt()
Move it to qom/cpu.c to avoid build failures depending on include orderof cpu-qom.h and exec/cpu-all.h.
Change opaques of various ..._irq_handler() functions to theappropriate CPU type to facilitate using cpu_reset_interrupt()....
cpu: Pass CPUState to cpu_interrupt()
Move it to qom/cpu.h to avoid issues with include order.
Change pc_acpi_smi_interrupt() opaque to X86CPU.
tcg: Don't make exitreq flag a local temporary
The value is not actually live across basic blocks, so there's noneed for the local property. This eliminates storing the temporaryto its home location at the branch.
Signed-off-by: Richard Henderson <rth@twiddle.net>...
gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end
The gen_icount_start/end functions are now somewhat misnamed since theyare useful for generic "start/end of TB" code, used for more than justicount. Rename them to gen_tb_start/end.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
Handle CPU interrupts by inline checking of a flag
Fix some of the nasty TCG race conditions and crashes by implementingcpu_exit() as setting a flag which is checked at the start of each TB.This avoids crashes if a thread or signal handler calls cpu_exit()...
tcg: Document tcg_qemu_tb_exec() and provide constants for low bit uses
Document tcg_qemu_tb_exec(). In particular, its return value is acombination of a pointer to the next translation block and someextra information in the low two bits. Provide some #defines for...
Replace all setjmp()/longjmp() with sigsetjmp()/siglongjmp()
The setjmp() function doesn't specify whether signal masks are saved andrestored; on Linux they are not, but on BSD (including MacOSX) they are.We want to have consistent behaviour across platforms, so we should...
cpu: Move running field to CPUState
Pass CPUState to cpu_exec_{start,end}() functions.
cpu: Move exit_request field to CPUState
Since it was located before breakpoints field, it needs to be reset.
cpu: Move current_tb field to CPUState
Explictly NULL it on CPU reset since it was located before breakpoints.
Change vapic_report_tpr_access() argument to CPUState. This alsoresolves the use of void* for cpu.h independence.Change vAPIC patch_instruction() argument to X86CPU....
cpu: Move host_tid field to CPUState
Change gdbstub's cpu_index() argument to CPUState now that CPUArchStateis no longer used.
TCG: Move translation block variables to new context inside tcg_ctx: tb_ctx
It's worth to clean-up translation blocks variables and move theminto one context as was suggested by Swirl.Also if we use this context directly inside tcg_ctx, then itspeeds up code generation a bit....
tci: Fix broken build (regression)
s390x-linux-user now also uses GETPC. Instead of adding it to the list oftargets which use GETPC, the macro is now defined unconditionally.
This avoids future build regressions like this one:
CC s390x-linux-user/target-s390x/int_helper.o...
cpu-defs.h: Drop qemu_work_item prototype
Commit c64ca8140e9c21cd0d44c10fbe1247cb4ade8e6e (cpu: Movequeued_work_{first,last} to CPUState) moved the qemu_work_item fieldsaway. Clean up the now unused prototype.
Signed-off-by: Andreas Färber <afaerber@suse.de>...
exec: Return CPUState from qemu_get_cpu()
Move the declaration to qemu/cpu.h and add documentation.The implementation still depends on CPUArchState for CPU iteration.
cpu: Move nr_{cores,threads} fields to CPUState
To facilitate the field movements, pass MIPSCPU to malta_mips_config();avoid that for mips_cpu_map_tc() since callers only access MIPS ThreadContexts, inside TCG helpers.
cpu: Move numa_node field to CPUState
cpu: Move cpu_index field to CPUState
Note that target-alpha accesses this field from TCG, now using anegative offset. Therefore the field is placed last in CPUState.
Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change.
Move common parts of mips cpu_state_reset() to mips_cpu_reset()....
Merge branch 'master' of git://git.qemu.org/qemu into qom-cpu
Adapt header include paths.
memory: introduce memory_region_test_and_clear_dirty
This function avoids having to do two calls, one to test the dirty bit, andother to reset it.
Signed-off-by: Juan Quintela <quintela@redhat.com>
exec: change RAM list to a TAILQ
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Juan Quintela <quintela@redhat.com>
add a version number to ram_list
This will be used to detect if last_block might have become invalidacross different calls to ram_save_live.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Umesh Deshpande <udeshpan@redhat.com>Signed-off-by: Juan Quintela <quintela@redhat.com>...
protect the ramlist with a separate mutex
Add the new mutex that protects shared state between ram_save_liveand the iothread. If the iothread mutex has to be taken togetherwith the ramlist mutex, the iothread shall always be outside.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>...
exec: change ramlist from MRU order to a 1-item cache
Most of the time, only 2 items will be active (from/to for a string operation,or code/data). But TCG guests likely won't have gigabytes of memory, sothis actually goes down to 1 item.
misc: move include files to include/qemu/
exec: move include files to include/exec/