qdev: Coding style fixes
Add missing braces and break lines larger than 80 chars.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
qdev-properties.c: Separate core from the code used only by qemu-system-*
This separates the qdev properties code in two parts: - qdev-properties.c, that contains most of the qdev properties code; - qdev-properties-system.c for code specific for qemu-system-*,...
kvm: Pass CPUState to kvm_vcpu_ioctl()
Adapt helper functions to pass X86CPU / PowerPCCPU / S390CPU.
Signed-off-by: Andreas Färber <afaerber@suse.de>
ppc: Pass PowerPCCPU to ppc_set_irq()
Adapt static caller functions.
This cleans up after passing PowerPCCPU to kvmppc_set_interrupt().
ppc: Pass PowerPCCPU to [h]decr callbacks
Cleans up after passing PowerPCCPU to ppc_set_irq().
alpha: Pass AlphaCPU array to Typhoon
Also store it in TyphoonCchip.
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Richard Henderson <rth@twiddle.net>
target-alpha: Avoid leaking the alarm timer over reset
Move the timer from CPUAlphaState to AlphaCPU to avoid the pointer beingzero'ed once we implement reset. Would cause a segfault insys_helper.c:helper_set_alarm().
This also simplifies timer initialization in Typhoon....
Merge remote-tracking branch 'stefanha/trivial-patches' into staging
Merge remote-tracking branch 'amit/master' into staging
Merge remote-tracking branch 'spice/spice.v66' into staging
vmmouse_reset(): remove minimal code duplication
Commit 069ab0eb added a vmmouse_disable() call to vmmouse_reset().vmmouse_disable() resets the status already.
Signed-off-by: Laszlo Ersek <lersek@redhat.com>Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
arm_gic: Add cpu nr to Raised IRQ message
Add the relevant CPU nr to this debug message to make IRQ debugging moreinformative.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
pflash_cfi01: qemu_log_mask "unimplemented" msg
This printf is informing the user of unimplemented functionality. It should bere-directed to qemu_log(LOG_UNIMP, ...) accordingly.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
pflash_cfi0x: Send debug messages to stderr
These debug info messages should go to stderr rather than stdout.
zynq_slcr: Compile time warning fixes.
Few warnings when compiled with debug printfs enabled. Fixed all.
virtio-serial-bus: assert port is non-null in remove_port()
remove_port() is called from qdev's unplug callback, and we're certainthe port will be found in our list of ports. Adding an assert()documents this.
This was flagged by Coverity, fix suggested by Markus....
virtio-serial-bus: send_control_msg() should not deal with cpkts
Stuff the cpkt before calling send_control_msg(). This function shouldnot be concerned about contents of the buffer it receives.
A few code refactorings recently have made making this change easier...
qxl: save qemu_create_displaysurface_from result
Spotted by Coverity.
https://bugzilla.redhat.com/show_bug.cgi?id=885644
Cc: qemu-stable@nongnu.orgReported-by: Markus Armbruster <armbru@redhat.com>Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Fix compile errors when enabling Xen debug logging.
Signed-off-by: Sander Eikelenboom <linux@eikelenboom.it>Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
xen: fix trivial PCI passthrough MSI-X bug
We are currently passing entry->data as address parameter. Passentry->addr instead.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>Tested-by: Sander Eikelenboom <linux@eikelenboom.it>Xen-devel: http://marc.info/?l=xen-devel&m=135515462613715
xen: implement support for secondary consoles in the console backend
This patch corresponds to commit840184a106bc24e745beda5c77e392f6cecd2bc9 fromgit://xenbits.xensource.com/qemu-xen-unstable.git.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
exec: refactor cpu_restore_state
Refactor common code around calls to cpu_restore_state().
tb_find_pc() has now no external users, make it static.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf
pixman: fix vnc tight png/jpeg support
This patch adds an x argument to qemu_pixman_linebuf_fill so it canalso be used to convert a partial scanline. Then fix tight + png/jpegencoding by passing in the x+y offset, so the data is read from thecorrect screen location instead of the upper left corner....
pseries: Increase default NVRAM size
If no image file for NVRAM is specified, the pseries machine currentlycreates a 16K non-persistent NVRAM by default. This basically works, butis not large enough for current firmware and guest kernels to create all...
MSI-X: Fix endianness
The MSI-X vector tables are usually stored in little endian in memory,so let's mark the accessors as such.
This fixes MSI-X on e500 for me.
Signed-off-by: Alexander Graf <agraf@suse.de>Acked-by: Michael S. Tsirkin <mst@redhat.com>
openpic: fix minor coding style issues
This patch removes all remaining occurences of spaces before functionparameter indicating parenthesis.
Signed-off-by: Alexander Graf <agraf@suse.de>
openpic: Accelerate pending irq search
When we're done with one interrupt, we need to search for the next pendinginterrupt in the queue. This search has grown quite big now that we havemore than 256 possible irq lines.
So let's memorize how many interrupts we have pending in our bitmaps, so...
PPC: E500: PCI: Make first slot qdev settable
Today the first slot id in our e500 pci implementation is hardcoded to0x11. Keep it there as default, but allow users to change the default toa different id.
PPC: E500: PCI: Make IRQ calculation more generic
The IRQ line calculation is more or less hardcoded today. Instead, let'swrite it as an algorithmic function that theoretically allows an arbitrarynumber of PCI slots.
PPC: E500: Generate dt pci irq map dynamically
Today we're hardcoding the PCI interrupt map in the e500 machine file.Instead, let's write it dynamically so that different machine typescan have different slot properties.
PPC: E500: Move PCI slot information into params
We have a params struct that allows us to expose differences betweene500 machine models. Include PCI slot information there, so we can havedifferent machines with different PCI slot topology.
PPC: E500plat: Make a lot of PCI slots available
The ppce500 machine doesn't have to stick to hardware limitations,as it's defined as being fully device tree based.
Thus we can change the initial PCI slot ID to 0x1 which gives us awhopping 31 PCI devices we can support with this machine now!...
PPC: e500: pci: Export slot2irq calculation
We need the calculation method to get from a PCI slot ID to its respectiveinterrupt line twice. Once in the internal map function and once whenassembling the device tree.
So let's extract the calculation to a separate function that can be called...
openpic: unify memory api subregions
The only difference between the "openpic" and "mpic" memory api subregiondescriptors is the endianness. Unify them as openpic accessors with explicitendianness markers in their names.
openpic: remove unused type variable
The openpic source irqs are carrying around a type indicator thatis never accessed by anything. Remove it.
openpic: convert simple reg operations to builtin bitops
The openpic code has its own bitmap code to access bits inside of abitmap. However, that is overkill when we simply want to check for abit inside of a uint32_t.
So instead, let's use normal bit masks and C builtin shifts and ands....
openpic: rename openpic_t to OpenPICState
Rename the openpic_t struct to OpenPICState, so it adheres better tothe current coding style rules.
openpic: remove irq_out
The current openpic emulation contains half-ready code for bypass mode.Remove it, so that when someone wants to finish it they can start from aclean state.
openpic: convert to qdev
This patch converts the OpenPIC device to qdev. Along the way itrenames the "openpic" target to "raven" and the "mpic" target to"fsl_mpic_20", to better reflect the actual models they implement.
This way we have a generic OpenPIC device now that can handle...
openpic: make brr1 model specific
Now that we can properly distinguish between openpic model differences,let's move brr1 out of the raven code path.
openpic: add Shared MSI support
The OpenPIC allows MSI access through shared MSI registers. Implementthem for the MPC8544 MPIC, so we can support MSIs.
PPC: e500: Add MSI support
Now that our interrupt controller supports MSIs, let's expose that featureto the guest through the device tree!
PPC: e500: Declare pci bridge as bridge
The new PCI host bridge device needs to identify itself as PCI host bridge.Declare it as such.
pseries: Don't allow TCE (iommu) tables to be registered with duplicate LIOBNs
The PAPR specification requires that every bus or device mediated by theIOMMU have a unique Logical IO Bus Number (LIOBN). This patch adds a checkto enforce this, which will help catch errors in configuration earlier....
openpic: Remove unused code
The openpic code had a few WIP bits left that nobody reanimated withinthe last few years. Remove that code.
Signed-off-by: Alexander Graf <agraf@suse.de>Acked-by: Hervé Poussineau <hpoussin@reactos.org>
mpic: Unify numbering scheme
MPIC interrupt numbers in Linux (device tree) and in QEMU are different,because QEMU takes the sparseness of the IRQ number space into account.
Remove that cleverness and instead assume a flat number space. This makesthe code easier to understand, because we are actually aligned with Linux...
openpic: update to proper memory api
The openpic code was still using the old mmio memory api. Convert it tobe a generic memory api user and clean up some code that becomes redundantthat way.
openpic: combine mpic and openpic src handlers
The MPIC source irq handler suddenly became identical to the standardOpenPIC source irq handler. Combine them into the same function.
openpic: Convert subregions to memory api
The "openpic" controller is currently using one big region and doessubregion dispatching manually. Move this to the memory api.
openpic: combine mpic and openpic irq raise functions
The IRQ raise mechanisms of the OpenPIC and MPIC controllers is identical,just that the MPIC one can also raise critical interrupts.
Combine those two and check for critical raise capability during runtime....
openpic: merge mpic and openpic timer handling
The openpic and mpic timer handling code is basically the same.Merge them.
openpic: combine openpic and mpic reset functions
The openpic and mpic reset handlers are almost identical. Combinethem and extract the differences into state variables.
pseries: Return the token when we register an RTAS call
The kernel will soon be able to service some RTAS calls. However thechoice of tokens will still be up to userspace. To support this havespapr_rtas_register() return the token that is allocated for an...
pseries: Allow RTAS tokens without a qemu handler
Kernel-based RTAS calls will not have a qemu handler, but willstill be registered in qemu in order to be assigned a tokennumber and appear in the device-tree.
Let's test for the name being NULL rather than the handler...
pseries: Add tracepoints to the XICS interrupt controller
This patch adds tracing / debugging calls to the XICS interrupt controllerimplementation used on the pseries machine.
Signed-off-by: Ben Herrenschmidt <benh@kernel.crashing.org>Signed-off-by: David Gibson <david@gibson.dropbear.id.au>...
pseries: Split xics irq configuration from state information
Currently the XICS irq controller code has a per-irq state structure whichamongst other things includes whether the interrupt is level or messagetriggered - this is configured by the platform code, and is not directly...
pseries: Implement PAPR NVRAM
The PAPR specification requires a certain amount of NVRAM, accessed viaRTAS, which we don't currently implement in qemu. This patch addressesthis deficiency, implementing the NVRAM as a VIO device, with some glue toinstantiate it automatically based on a machine option....
e500: Adding CCSR memory region
All devices are also placed under CCSR memory region.The CCSR memory region is exported to pci device. The MSI interruptgeneration is the main reason to export the CCSR region to PCI device.This put the requirement to move mpic under CCSR region, but logically...
Adding BAR0 for e500 PCI controller
PCI Root complex have TYPE-1 configuration header while PCI endpointhave type-0 configuration header. The type-1 configuration header havea BAR (BAR0). In Freescale PCI controller BAR0 is used for mapping pciaddress space to CCSR address space. This can used for 2 purposes: 1)...
pseries: Fix incorrect initialization of interrupt controller
Currently in the reset code for the XICS interrupt controller, weinitialize the pending_priority field to 0 (most favored, by XICSconvention). This is incorrect, since there is no pending interrupt, it...
pseries: Use #define for XICS base irq number
Currently the lowest "real" irq number for the XICS irq controller (asopposed to numbers reserved for IPIs and other special purposes) ishard coded as 16 in two places - in xics_system_init() and in spapr.c....
Merge remote-tracking branch 'kwolf/for-anthony' into staging
Merge remote-tracking branch 'pmaydell/arm-devs.next' into staging
hw/ds1338.c: Ensure state is properly initialized.
Signed-off-by: Antoine Mathys <barsamin@gmail.com>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/ds1338.c: Implement support for the control register.
hw/ds1338.c: Fix handling of DAY (wday) register.
Per the datasheet, the DAY (wday) register is user defined. Implement this.
hw/ds1338.c: Correct bug in conversion to BCD.
hw/ds1338.c: Add definitions for various flags in the RTC registers.
hw/ds1338.c: Fix handling of HOURS register.
Per the datasheet, the mapping between 12 and 24 hours modes is: 0 <-> 12 PM 1-12 <-> 1-12 AM 13-23 <-> 1-11 PM
virtio-serial: move active ports loading to separate function
The virtio_serial_load() function became too big, split the code thatgets the port info from the source into a separate function.
Signed-off-by: Amit Shah <amit.shah@redhat.com>
virtio-serial: allocate post_load only at load-time
This saves us a few bytes in the VirtIOSerial struct. Not a bigsavings, but since the entire structure is used only during a shortwhile after migration, it's helpful to keep the struct cleaner andsmaller....
virtio-serial: delete timer if active during exit
The post_load timer was being freed, but not deleted. This could causeproblems when the timer is armed, but the device is hot-unplugged beforethe callback is executed.
virtio-serial: use uint32_t to count ports
atapi: reset cdrom tray statuses on ide_reset
Tray statuses should be also reseted. Some guests may lock the trayand after reset before any kernel is loaded the tray should be unlocked.
Also if you reset the real computer the tray is closed. We shoulddo the same in qemu....
use qemu_opts_create_nofail
We will use qemu_opts_create_nofail function, it can make codemore readable.
Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com>Signed-off-by: Kevin Wolf <kwolf@redhat.com>
exynos4210/mct: Avoid infinite loop on non incremental timers
Check for a 0 "distance" value to avoid infinite loop when theexpired FCR timer was not programed with auto-increment.
With this change the behavior is coherent with the same typeof code in the exynos4210_gfrc_restart() function in the same...
hw/arm_gic: fix target CPUs affected by set enable/pending ops
Fix a bug on the ARM GIC model where interrupts are notset pending on the correct target CPUs when they aretriggered by writes to the Interrupt Set Enable orSet Pending registers.
Signed-off-by: Daniel Sangorrin <dsl@ertl.jp>...
hw/arm_boot, exynos4210, highbank: Fix secondary boot GIC init
Fix the code in the secondary CPU boot stubs so that it correctlyinitialises the GIC rather than relying on bugs or implementationdependent aspects of the QEMU GIC implementation: * set the GIC_PMR.Priority field to all-ones, so that all...
hw/arm_gic: Fix comparison with priority mask register
The GIC spec states that only interrupts with higher prioritythan the value in the GICC_PMR priority mask register arepassed through to the processor. We were incorrectly allowingthrough interrupts with a priority equal to the specified...
hw/arm_gic_common: Correct GICC_PMR reset value for newer GICs
The GIC architecture specification for v1 and v2 GICs (as foundon the Cortex-A9 and newer) states that the GICC_PMR reset valueis zero; this differs from the 0xf0 reset value used on 11MPCore....
xilinx_zynq: Add one variable to avoid overwriting QSPI bus
commit 7b482bcf xilinx_zynq: added QSPI controller
Adds one QSPI controller, which has two spi buses, one is forspi0, and another is for spi1. But when initializing the spi1bus, "dev" has been overwrited by the ssi_create_slave_no_init() function,...
Support default block interfaces per QEMUMachine
There are QEMUMachines that have neither IF_IDE nor IF_SCSI as adefault/standard interface to their block devices / drives. Therefore,this patch introduces a new field default_block_type per QEMUMachinestruct. The prior use_scsi field becomes thereby obsolete and is...
virtio-blk: Remove duplicate property definition
For the virtio-blk device (via virtio-pci) the property "config-wce" isdefined in two places. First, it's defined from theDEFINE_VIRTIO_BLK_FEATURES macro, second it's defined directly invirtio-pci, just two lines above the call to that macro....
vfio-pci: Don't use kvm_irqchip_in_kernel
kvm_irqchip_in_kernel() has an architecture specific meaning, sowe shouldn't be using it to determine whether to enabled KVM INTxbypass. kvm_irqfds_enabled() seems most appropriate. Also use thisto protect our other call to kvm_check_extension() as that explodes...
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
Merge remote-tracking branch 'kraxel/acpi.1' into staging
Merge remote-tracking branch 'kraxel/usb.74' into staging
Merge branch 'master' of git.qemu-project.org:/pub/git/qemu
arm: a9mpcore: remove un-used ptimer_iomem field
I'm guessing this is a hangover from a previous coreification of the mptimersub-module. This field is completely unused - removed.
Clean up pci_drive_hot_add()'s use of BlockInterfaceType
pci_drive_hot_add() parameter type has the wrong type: int instead ofBlockInterfaceType. It's actually redundant, so we can just drop it.
Signed-off-by: Markus Armbruster <armbru@redhat.com>Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Fix spelling in comments and documentation
These spelling bugs were found by codespell:
supressing -> suppressingtransfered -> transferred
Signed-off-by: Stefan Weil <sw@weilnetz.de>Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
pc_sysfw: Plug memory leak on pc_fw_add_pflash_drv() error path
Harmless, because we the error inevitably leads to another, fatal onein pc_system_flash_init(): PC system firmware (pflash) not available.Fix it anyway.
Signed-off-by: Markus Armbruster <armbru@redhat.com>...
sd: Send debug printfery to stderr not stdout
Some debug printfs for SD are coming up in stdout. Redirected them to stderrinstead.
s390x: Spelling fixes (endianess -> endianness, occured -> occurred)
Replace also "write into" by "write to".
Create qemu-types.h for struct typedefs
Instead of keeping all those struct typedefs in qemu-common.h, move itto a header that can be safely included by other headers, containingonly the struct typedefs and not pulling in other dependencies.
Also, move some of the qdev-core.h typedefs to the new file, too, so...
qdev: qdev_create(): use error_report() instead of hw_error()
hw_error() is specific for fatal hardware emulation errors, not forinternal errors related to the qdev object/class abstraction or objectinitialization.
Replace it with an error_report() call, followed by abort()....
xilinx_uartlite: suppress "cannot receive message"
This message is not an error condition, its just informing the user thatthe device is corking the uart traffic to not drop characters.
Reported-by: Jason Wu <huanyu@xilinx.com>Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>...
xilinx_uartlite: Accept input after rx FIFO pop
The device return false from the can receive function when the FIFO isfull. This mean the device should check for buffered input whenever a byte ispopped from the FIFO.
Reported-by: Jason Wu <huanyu@xilinx.com>...