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/*
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* QEMU Bluetooth HCI helpers.
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*
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* Copyright (C) 2007 OpenMoko, Inc.
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* Written by Andrzej Zaborowski <andrew@openedhand.com>
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*
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* Useful definitions taken from BlueZ project's headers.
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* Copyright (C) 2000-2001 Qualcomm Incorporated
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* Copyright (C) 2002-2003 Maxim Krasnyansky <maxk@qualcomm.com>
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* Copyright (C) 2002-2006 Marcel Holtmann <marcel@holtmann.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw/irq.h" |
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/* BD Address */
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typedef struct { |
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uint8_t b[6];
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} QEMU_PACKED bdaddr_t; |
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#define BDADDR_ANY (&(bdaddr_t) {{0, 0, 0, 0, 0, 0}}) |
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#define BDADDR_ALL (&(bdaddr_t) {{0xff, 0xff, 0xff, 0xff, 0xff, 0xff}}) |
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#define BDADDR_LOCAL (&(bdaddr_t) {{0, 0, 0, 0xff, 0xff, 0xff}}) |
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/* Copy, swap, convert BD Address */
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static inline int bacmp(const bdaddr_t *ba1, const bdaddr_t *ba2) |
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{ |
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return memcmp(ba1, ba2, sizeof(bdaddr_t)); |
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} |
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static inline void bacpy(bdaddr_t *dst, const bdaddr_t *src) |
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{ |
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memcpy(dst, src, sizeof(bdaddr_t));
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} |
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#define BAINIT(orig) { .b = { \
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(orig)->b[0], (orig)->b[1], (orig)->b[2], \ |
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(orig)->b[3], (orig)->b[4], (orig)->b[5], \ |
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}, } |
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/* The twisted structures of a bluetooth environment */
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struct bt_device_s;
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struct bt_scatternet_s;
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struct bt_piconet_s;
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struct bt_link_s;
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struct bt_scatternet_s {
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struct bt_device_s *slave;
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}; |
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struct bt_link_s {
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struct bt_device_s *slave, *host;
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uint16_t handle; /* Master (host) side handle */
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uint16_t acl_interval; |
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enum {
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acl_active, |
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acl_hold, |
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acl_sniff, |
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acl_parked, |
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} acl_mode; |
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}; |
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struct bt_device_s {
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int lt_addr;
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bdaddr_t bd_addr; |
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int mtu;
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int setup;
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struct bt_scatternet_s *net;
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uint8_t key[16];
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int key_present;
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uint8_t class[3];
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uint8_t reject_reason; |
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uint64_t lmp_caps; |
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const char *lmp_name; |
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void (*lmp_connection_request)(struct bt_link_s *link); |
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void (*lmp_connection_complete)(struct bt_link_s *link); |
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void (*lmp_disconnect_master)(struct bt_link_s *link); |
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void (*lmp_disconnect_slave)(struct bt_link_s *link); |
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void (*lmp_acl_data)(struct bt_link_s *link, const uint8_t *data, |
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int start, int len); |
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void (*lmp_acl_resp)(struct bt_link_s *link, const uint8_t *data, |
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int start, int len); |
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void (*lmp_mode_change)(struct bt_link_s *link); |
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void (*handle_destroy)(struct bt_device_s *device); |
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struct bt_device_s *next; /* Next in the piconet/scatternet */ |
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int inquiry_scan;
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int page_scan;
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uint16_t clkoff; /* Note: Always little-endian */
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}; |
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/* bt.c */
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void bt_device_init(struct bt_device_s *dev, struct bt_scatternet_s *net); |
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void bt_device_done(struct bt_device_s *dev); |
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/* bt-hci.c */
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struct HCIInfo *bt_new_hci(struct bt_scatternet_s *net); |
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/* bt-vhci.c */
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void bt_vhci_init(struct HCIInfo *info); |
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/* bt-hci-csr.c */
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enum {
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csrhci_pin_reset, |
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csrhci_pin_wakeup, |
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__csrhci_pins, |
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}; |
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qemu_irq *csrhci_pins_get(CharDriverState *chr); |
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CharDriverState *uart_hci_init(qemu_irq wakeup); |
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/* bt-l2cap.c */
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struct bt_l2cap_device_s;
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struct bt_l2cap_conn_params_s;
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struct bt_l2cap_psm_s;
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void bt_l2cap_device_init(struct bt_l2cap_device_s *dev, |
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struct bt_scatternet_s *net);
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void bt_l2cap_device_done(struct bt_l2cap_device_s *dev); |
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void bt_l2cap_psm_register(struct bt_l2cap_device_s *dev, int psm, |
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int min_mtu, int (*new_channel)(struct bt_l2cap_device_s *dev, |
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struct bt_l2cap_conn_params_s *params));
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struct bt_l2cap_device_s {
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struct bt_device_s device;
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struct bt_l2cap_psm_s *first_psm;
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}; |
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struct bt_l2cap_conn_params_s {
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/* Input */
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uint8_t *(*sdu_out)(struct bt_l2cap_conn_params_s *chan, int len); |
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void (*sdu_submit)(struct bt_l2cap_conn_params_s *chan); |
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int remote_mtu;
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/* Output */
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void *opaque;
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void (*sdu_in)(void *opaque, const uint8_t *data, int len); |
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void (*close)(void *opaque); |
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}; |
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enum bt_l2cap_psm_predef {
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BT_PSM_SDP = 0x0001,
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BT_PSM_RFCOMM = 0x0003,
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BT_PSM_TELEPHONY = 0x0005,
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BT_PSM_TCS = 0x0007,
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BT_PSM_BNEP = 0x000f,
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BT_PSM_HID_CTRL = 0x0011,
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BT_PSM_HID_INTR = 0x0013,
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BT_PSM_UPNP = 0x0015,
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BT_PSM_AVCTP = 0x0017,
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BT_PSM_AVDTP = 0x0019,
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}; |
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/* bt-sdp.c */
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void bt_l2cap_sdp_init(struct bt_l2cap_device_s *dev); |
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/* bt-hid.c */
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struct bt_device_s *bt_mouse_init(struct bt_scatternet_s *net); |
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struct bt_device_s *bt_tablet_init(struct bt_scatternet_s *net); |
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struct bt_device_s *bt_keyboard_init(struct bt_scatternet_s *net); |
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/* Link Management Protocol layer defines */
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#define LLID_ACLU_CONT 0x1 |
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#define LLID_ACLU_START 0x2 |
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#define LLID_ACLC 0x3 |
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enum lmp_pdu_type {
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LMP_NAME_REQ = 0x0001,
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LMP_NAME_RES = 0x0002,
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LMP_ACCEPTED = 0x0003,
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LMP_NOT_ACCEPTED = 0x0004,
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LMP_CLKOFFSET_REQ = 0x0005,
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LMP_CLKOFFSET_RES = 0x0006,
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LMP_DETACH = 0x0007,
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LMP_IN_RAND = 0x0008,
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LMP_COMB_KEY = 0x0009,
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LMP_UNIT_KEY = 0x000a,
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LMP_AU_RAND = 0x000b,
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LMP_SRES = 0x000c,
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LMP_TEMP_RAND = 0x000d,
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LMP_TEMP_KEY = 0x000e,
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LMP_CRYPT_MODE_REQ = 0x000f,
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LMP_CRYPT_KEY_SIZE_REQ = 0x0010,
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LMP_START_ENCRYPT_REQ = 0x0011,
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LMP_STOP_ENCRYPT_REQ = 0x0012,
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LMP_SWITCH_REQ = 0x0013,
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LMP_HOLD = 0x0014,
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LMP_HOLD_REQ = 0x0015,
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LMP_SNIFF_REQ = 0x0017,
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LMP_UNSNIFF_REQ = 0x0018,
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LMP_LMP_PARK_REQ = 0x0019,
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LMP_SET_BCAST_SCAN_WND = 0x001b,
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LMP_MODIFY_BEACON = 0x001c,
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LMP_UNPARK_BD_ADDR_REQ = 0x001d,
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LMP_UNPARK_PM_ADDR_REQ = 0x001e,
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LMP_INCR_POWER_REQ = 0x001f,
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LMP_DECR_POWER_REQ = 0x0020,
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LMP_MAX_POWER = 0x0021,
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LMP_MIN_POWER = 0x0022,
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LMP_AUTO_RATE = 0x0023,
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LMP_PREFERRED_RATE = 0x0024,
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LMP_VERSION_REQ = 0x0025,
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LMP_VERSION_RES = 0x0026,
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LMP_FEATURES_REQ = 0x0027,
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LMP_FEATURES_RES = 0x0028,
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LMP_QUALITY_OF_SERVICE = 0x0029,
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LMP_QOS_REQ = 0x002a,
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LMP_RM_SCO_LINK_REQ = 0x002b,
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LMP_SCO_LINK_REQ = 0x002c,
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LMP_MAX_SLOT = 0x002d,
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LMP_MAX_SLOT_REQ = 0x002e,
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LMP_TIMING_ACCURACY_REQ = 0x002f,
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LMP_TIMING_ACCURACY_RES = 0x0030,
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LMP_SETUP_COMPLETE = 0x0031,
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LMP_USE_SEMIPERM_KEY = 0x0032,
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LMP_HOST_CONNECTION_REQ = 0x0033,
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LMP_SLOT_OFFSET = 0x0034,
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LMP_PAGE_MODE_REQ = 0x0035,
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LMP_PAGE_SCAN_MODE_REQ = 0x0036,
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LMP_SUPERVISION_TIMEOUT = 0x0037,
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LMP_TEST_ACTIVATE = 0x0038,
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LMP_TEST_CONTROL = 0x0039,
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LMP_CRYPT_KEY_MASK_REQ = 0x003a,
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LMP_CRYPT_KEY_MASK_RES = 0x003b,
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LMP_SET_AFH = 0x003c,
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LMP_ACCEPTED_EXT = 0x7f01,
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LMP_NOT_ACCEPTED_EXT = 0x7f02,
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LMP_FEATURES_REQ_EXT = 0x7f03,
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LMP_FEATURES_RES_EXT = 0x7f04,
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LMP_PACKET_TYPE_TBL_REQ = 0x7f0b,
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LMP_ESCO_LINK_REQ = 0x7f0c,
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LMP_RM_ESCO_LINK_REQ = 0x7f0d,
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LMP_CHANNEL_CLASS_REQ = 0x7f10,
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LMP_CHANNEL_CLASS = 0x7f11,
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}; |
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/* Host Controller Interface layer defines */
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enum hci_packet_type {
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HCI_COMMAND_PKT = 0x01,
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HCI_ACLDATA_PKT = 0x02,
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HCI_SCODATA_PKT = 0x03,
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HCI_EVENT_PKT = 0x04,
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HCI_VENDOR_PKT = 0xff,
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}; |
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enum bt_packet_type {
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HCI_2DH1 = 1 << 1, |
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HCI_3DH1 = 1 << 2, |
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HCI_DM1 = 1 << 3, |
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HCI_DH1 = 1 << 4, |
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HCI_2DH3 = 1 << 8, |
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HCI_3DH3 = 1 << 9, |
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HCI_DM3 = 1 << 10, |
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HCI_DH3 = 1 << 11, |
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HCI_2DH5 = 1 << 12, |
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HCI_3DH5 = 1 << 13, |
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HCI_DM5 = 1 << 14, |
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HCI_DH5 = 1 << 15, |
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}; |
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enum sco_packet_type {
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HCI_HV1 = 1 << 5, |
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HCI_HV2 = 1 << 6, |
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HCI_HV3 = 1 << 7, |
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}; |
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enum ev_packet_type {
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HCI_EV3 = 1 << 3, |
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HCI_EV4 = 1 << 4, |
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HCI_EV5 = 1 << 5, |
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HCI_2EV3 = 1 << 6, |
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HCI_3EV3 = 1 << 7, |
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HCI_2EV5 = 1 << 8, |
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HCI_3EV5 = 1 << 9, |
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}; |
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enum hci_error_code {
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HCI_SUCCESS = 0x00,
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HCI_UNKNOWN_COMMAND = 0x01,
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HCI_NO_CONNECTION = 0x02,
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HCI_HARDWARE_FAILURE = 0x03,
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HCI_PAGE_TIMEOUT = 0x04,
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HCI_AUTHENTICATION_FAILURE = 0x05,
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HCI_PIN_OR_KEY_MISSING = 0x06,
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HCI_MEMORY_FULL = 0x07,
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HCI_CONNECTION_TIMEOUT = 0x08,
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HCI_MAX_NUMBER_OF_CONNECTIONS = 0x09,
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HCI_MAX_NUMBER_OF_SCO_CONNECTIONS = 0x0a,
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HCI_ACL_CONNECTION_EXISTS = 0x0b,
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HCI_COMMAND_DISALLOWED = 0x0c,
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HCI_REJECTED_LIMITED_RESOURCES = 0x0d,
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HCI_REJECTED_SECURITY = 0x0e,
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HCI_REJECTED_PERSONAL = 0x0f,
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HCI_HOST_TIMEOUT = 0x10,
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HCI_UNSUPPORTED_FEATURE = 0x11,
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HCI_INVALID_PARAMETERS = 0x12,
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HCI_OE_USER_ENDED_CONNECTION = 0x13,
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HCI_OE_LOW_RESOURCES = 0x14,
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HCI_OE_POWER_OFF = 0x15,
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HCI_CONNECTION_TERMINATED = 0x16,
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HCI_REPEATED_ATTEMPTS = 0x17,
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HCI_PAIRING_NOT_ALLOWED = 0x18,
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HCI_UNKNOWN_LMP_PDU = 0x19,
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HCI_UNSUPPORTED_REMOTE_FEATURE = 0x1a,
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HCI_SCO_OFFSET_REJECTED = 0x1b,
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HCI_SCO_INTERVAL_REJECTED = 0x1c,
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HCI_AIR_MODE_REJECTED = 0x1d,
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HCI_INVALID_LMP_PARAMETERS = 0x1e,
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HCI_UNSPECIFIED_ERROR = 0x1f,
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HCI_UNSUPPORTED_LMP_PARAMETER_VALUE = 0x20,
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HCI_ROLE_CHANGE_NOT_ALLOWED = 0x21,
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HCI_LMP_RESPONSE_TIMEOUT = 0x22,
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HCI_LMP_ERROR_TRANSACTION_COLLISION = 0x23,
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HCI_LMP_PDU_NOT_ALLOWED = 0x24,
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HCI_ENCRYPTION_MODE_NOT_ACCEPTED = 0x25,
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HCI_UNIT_LINK_KEY_USED = 0x26,
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HCI_QOS_NOT_SUPPORTED = 0x27,
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HCI_INSTANT_PASSED = 0x28,
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HCI_PAIRING_NOT_SUPPORTED = 0x29,
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HCI_TRANSACTION_COLLISION = 0x2a,
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HCI_QOS_UNACCEPTABLE_PARAMETER = 0x2c,
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HCI_QOS_REJECTED = 0x2d,
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HCI_CLASSIFICATION_NOT_SUPPORTED = 0x2e,
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HCI_INSUFFICIENT_SECURITY = 0x2f,
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HCI_PARAMETER_OUT_OF_RANGE = 0x30,
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HCI_ROLE_SWITCH_PENDING = 0x32,
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HCI_SLOT_VIOLATION = 0x34,
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HCI_ROLE_SWITCH_FAILED = 0x35,
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}; |
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|
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enum acl_flag_bits {
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ACL_CONT = 1 << 0, |
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ACL_START = 1 << 1, |
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ACL_ACTIVE_BCAST = 1 << 2, |
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ACL_PICO_BCAST = 1 << 3, |
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}; |
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|
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enum baseband_link_type {
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SCO_LINK = 0x00,
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ACL_LINK = 0x01,
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}; |
357 |
|
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enum lmp_feature_bits0 {
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LMP_3SLOT = 1 << 0, |
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LMP_5SLOT = 1 << 1, |
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LMP_ENCRYPT = 1 << 2, |
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LMP_SOFFSET = 1 << 3, |
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LMP_TACCURACY = 1 << 4, |
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LMP_RSWITCH = 1 << 5, |
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LMP_HOLD_MODE = 1 << 6, |
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LMP_SNIFF_MODE = 1 << 7, |
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}; |
368 |
|
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enum lmp_feature_bits1 {
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LMP_PARK = 1 << 0, |
371 |
LMP_RSSI = 1 << 1, |
372 |
LMP_QUALITY = 1 << 2, |
373 |
LMP_SCO = 1 << 3, |
374 |
LMP_HV2 = 1 << 4, |
375 |
LMP_HV3 = 1 << 5, |
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LMP_ULAW = 1 << 6, |
377 |
LMP_ALAW = 1 << 7, |
378 |
}; |
379 |
|
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enum lmp_feature_bits2 {
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LMP_CVSD = 1 << 0, |
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LMP_PSCHEME = 1 << 1, |
383 |
LMP_PCONTROL = 1 << 2, |
384 |
LMP_TRSP_SCO = 1 << 3, |
385 |
LMP_BCAST_ENC = 1 << 7, |
386 |
}; |
387 |
|
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enum lmp_feature_bits3 {
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LMP_EDR_ACL_2M = 1 << 1, |
390 |
LMP_EDR_ACL_3M = 1 << 2, |
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LMP_ENH_ISCAN = 1 << 3, |
392 |
LMP_ILACE_ISCAN = 1 << 4, |
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LMP_ILACE_PSCAN = 1 << 5, |
394 |
LMP_RSSI_INQ = 1 << 6, |
395 |
LMP_ESCO = 1 << 7, |
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}; |
397 |
|
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enum lmp_feature_bits4 {
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LMP_EV4 = 1 << 0, |
400 |
LMP_EV5 = 1 << 1, |
401 |
LMP_AFH_CAP_SLV = 1 << 3, |
402 |
LMP_AFH_CLS_SLV = 1 << 4, |
403 |
LMP_EDR_3SLOT = 1 << 7, |
404 |
}; |
405 |
|
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enum lmp_feature_bits5 {
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LMP_EDR_5SLOT = 1 << 0, |
408 |
LMP_SNIFF_SUBR = 1 << 1, |
409 |
LMP_AFH_CAP_MST = 1 << 3, |
410 |
LMP_AFH_CLS_MST = 1 << 4, |
411 |
LMP_EDR_ESCO_2M = 1 << 5, |
412 |
LMP_EDR_ESCO_3M = 1 << 6, |
413 |
LMP_EDR_3S_ESCO = 1 << 7, |
414 |
}; |
415 |
|
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enum lmp_feature_bits6 {
|
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LMP_EXT_INQ = 1 << 0, |
418 |
}; |
419 |
|
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enum lmp_feature_bits7 {
|
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LMP_EXT_FEAT = 1 << 7, |
422 |
}; |
423 |
|
424 |
enum hci_link_policy {
|
425 |
HCI_LP_RSWITCH = 1 << 0, |
426 |
HCI_LP_HOLD = 1 << 1, |
427 |
HCI_LP_SNIFF = 1 << 2, |
428 |
HCI_LP_PARK = 1 << 3, |
429 |
}; |
430 |
|
431 |
enum hci_link_mode {
|
432 |
HCI_LM_ACCEPT = 1 << 15, |
433 |
HCI_LM_MASTER = 1 << 0, |
434 |
HCI_LM_AUTH = 1 << 1, |
435 |
HCI_LM_ENCRYPT = 1 << 2, |
436 |
HCI_LM_TRUSTED = 1 << 3, |
437 |
HCI_LM_RELIABLE = 1 << 4, |
438 |
HCI_LM_SECURE = 1 << 5, |
439 |
}; |
440 |
|
441 |
/* HCI Commands */
|
442 |
|
443 |
/* Link Control */
|
444 |
#define OGF_LINK_CTL 0x01 |
445 |
|
446 |
#define OCF_INQUIRY 0x0001 |
447 |
typedef struct { |
448 |
uint8_t lap[3];
|
449 |
uint8_t length; /* 1.28s units */
|
450 |
uint8_t num_rsp; |
451 |
} QEMU_PACKED inquiry_cp; |
452 |
#define INQUIRY_CP_SIZE 5 |
453 |
|
454 |
typedef struct { |
455 |
uint8_t status; |
456 |
bdaddr_t bdaddr; |
457 |
} QEMU_PACKED status_bdaddr_rp; |
458 |
#define STATUS_BDADDR_RP_SIZE 7 |
459 |
|
460 |
#define OCF_INQUIRY_CANCEL 0x0002 |
461 |
|
462 |
#define OCF_PERIODIC_INQUIRY 0x0003 |
463 |
typedef struct { |
464 |
uint16_t max_period; /* 1.28s units */
|
465 |
uint16_t min_period; /* 1.28s units */
|
466 |
uint8_t lap[3];
|
467 |
uint8_t length; /* 1.28s units */
|
468 |
uint8_t num_rsp; |
469 |
} QEMU_PACKED periodic_inquiry_cp; |
470 |
#define PERIODIC_INQUIRY_CP_SIZE 9 |
471 |
|
472 |
#define OCF_EXIT_PERIODIC_INQUIRY 0x0004 |
473 |
|
474 |
#define OCF_CREATE_CONN 0x0005 |
475 |
typedef struct { |
476 |
bdaddr_t bdaddr; |
477 |
uint16_t pkt_type; |
478 |
uint8_t pscan_rep_mode; |
479 |
uint8_t pscan_mode; |
480 |
uint16_t clock_offset; |
481 |
uint8_t role_switch; |
482 |
} QEMU_PACKED create_conn_cp; |
483 |
#define CREATE_CONN_CP_SIZE 13 |
484 |
|
485 |
#define OCF_DISCONNECT 0x0006 |
486 |
typedef struct { |
487 |
uint16_t handle; |
488 |
uint8_t reason; |
489 |
} QEMU_PACKED disconnect_cp; |
490 |
#define DISCONNECT_CP_SIZE 3 |
491 |
|
492 |
#define OCF_ADD_SCO 0x0007 |
493 |
typedef struct { |
494 |
uint16_t handle; |
495 |
uint16_t pkt_type; |
496 |
} QEMU_PACKED add_sco_cp; |
497 |
#define ADD_SCO_CP_SIZE 4 |
498 |
|
499 |
#define OCF_CREATE_CONN_CANCEL 0x0008 |
500 |
typedef struct { |
501 |
uint8_t status; |
502 |
bdaddr_t bdaddr; |
503 |
} QEMU_PACKED create_conn_cancel_cp; |
504 |
#define CREATE_CONN_CANCEL_CP_SIZE 6 |
505 |
|
506 |
typedef struct { |
507 |
uint8_t status; |
508 |
bdaddr_t bdaddr; |
509 |
} QEMU_PACKED create_conn_cancel_rp; |
510 |
#define CREATE_CONN_CANCEL_RP_SIZE 7 |
511 |
|
512 |
#define OCF_ACCEPT_CONN_REQ 0x0009 |
513 |
typedef struct { |
514 |
bdaddr_t bdaddr; |
515 |
uint8_t role; |
516 |
} QEMU_PACKED accept_conn_req_cp; |
517 |
#define ACCEPT_CONN_REQ_CP_SIZE 7 |
518 |
|
519 |
#define OCF_REJECT_CONN_REQ 0x000A |
520 |
typedef struct { |
521 |
bdaddr_t bdaddr; |
522 |
uint8_t reason; |
523 |
} QEMU_PACKED reject_conn_req_cp; |
524 |
#define REJECT_CONN_REQ_CP_SIZE 7 |
525 |
|
526 |
#define OCF_LINK_KEY_REPLY 0x000B |
527 |
typedef struct { |
528 |
bdaddr_t bdaddr; |
529 |
uint8_t link_key[16];
|
530 |
} QEMU_PACKED link_key_reply_cp; |
531 |
#define LINK_KEY_REPLY_CP_SIZE 22 |
532 |
|
533 |
#define OCF_LINK_KEY_NEG_REPLY 0x000C |
534 |
|
535 |
#define OCF_PIN_CODE_REPLY 0x000D |
536 |
typedef struct { |
537 |
bdaddr_t bdaddr; |
538 |
uint8_t pin_len; |
539 |
uint8_t pin_code[16];
|
540 |
} QEMU_PACKED pin_code_reply_cp; |
541 |
#define PIN_CODE_REPLY_CP_SIZE 23 |
542 |
|
543 |
#define OCF_PIN_CODE_NEG_REPLY 0x000E |
544 |
|
545 |
#define OCF_SET_CONN_PTYPE 0x000F |
546 |
typedef struct { |
547 |
uint16_t handle; |
548 |
uint16_t pkt_type; |
549 |
} QEMU_PACKED set_conn_ptype_cp; |
550 |
#define SET_CONN_PTYPE_CP_SIZE 4 |
551 |
|
552 |
#define OCF_AUTH_REQUESTED 0x0011 |
553 |
typedef struct { |
554 |
uint16_t handle; |
555 |
} QEMU_PACKED auth_requested_cp; |
556 |
#define AUTH_REQUESTED_CP_SIZE 2 |
557 |
|
558 |
#define OCF_SET_CONN_ENCRYPT 0x0013 |
559 |
typedef struct { |
560 |
uint16_t handle; |
561 |
uint8_t encrypt; |
562 |
} QEMU_PACKED set_conn_encrypt_cp; |
563 |
#define SET_CONN_ENCRYPT_CP_SIZE 3 |
564 |
|
565 |
#define OCF_CHANGE_CONN_LINK_KEY 0x0015 |
566 |
typedef struct { |
567 |
uint16_t handle; |
568 |
} QEMU_PACKED change_conn_link_key_cp; |
569 |
#define CHANGE_CONN_LINK_KEY_CP_SIZE 2 |
570 |
|
571 |
#define OCF_MASTER_LINK_KEY 0x0017 |
572 |
typedef struct { |
573 |
uint8_t key_flag; |
574 |
} QEMU_PACKED master_link_key_cp; |
575 |
#define MASTER_LINK_KEY_CP_SIZE 1 |
576 |
|
577 |
#define OCF_REMOTE_NAME_REQ 0x0019 |
578 |
typedef struct { |
579 |
bdaddr_t bdaddr; |
580 |
uint8_t pscan_rep_mode; |
581 |
uint8_t pscan_mode; |
582 |
uint16_t clock_offset; |
583 |
} QEMU_PACKED remote_name_req_cp; |
584 |
#define REMOTE_NAME_REQ_CP_SIZE 10 |
585 |
|
586 |
#define OCF_REMOTE_NAME_REQ_CANCEL 0x001A |
587 |
typedef struct { |
588 |
bdaddr_t bdaddr; |
589 |
} QEMU_PACKED remote_name_req_cancel_cp; |
590 |
#define REMOTE_NAME_REQ_CANCEL_CP_SIZE 6 |
591 |
|
592 |
typedef struct { |
593 |
uint8_t status; |
594 |
bdaddr_t bdaddr; |
595 |
} QEMU_PACKED remote_name_req_cancel_rp; |
596 |
#define REMOTE_NAME_REQ_CANCEL_RP_SIZE 7 |
597 |
|
598 |
#define OCF_READ_REMOTE_FEATURES 0x001B |
599 |
typedef struct { |
600 |
uint16_t handle; |
601 |
} QEMU_PACKED read_remote_features_cp; |
602 |
#define READ_REMOTE_FEATURES_CP_SIZE 2 |
603 |
|
604 |
#define OCF_READ_REMOTE_EXT_FEATURES 0x001C |
605 |
typedef struct { |
606 |
uint16_t handle; |
607 |
uint8_t page_num; |
608 |
} QEMU_PACKED read_remote_ext_features_cp; |
609 |
#define READ_REMOTE_EXT_FEATURES_CP_SIZE 3 |
610 |
|
611 |
#define OCF_READ_REMOTE_VERSION 0x001D |
612 |
typedef struct { |
613 |
uint16_t handle; |
614 |
} QEMU_PACKED read_remote_version_cp; |
615 |
#define READ_REMOTE_VERSION_CP_SIZE 2 |
616 |
|
617 |
#define OCF_READ_CLOCK_OFFSET 0x001F |
618 |
typedef struct { |
619 |
uint16_t handle; |
620 |
} QEMU_PACKED read_clock_offset_cp; |
621 |
#define READ_CLOCK_OFFSET_CP_SIZE 2 |
622 |
|
623 |
#define OCF_READ_LMP_HANDLE 0x0020 |
624 |
typedef struct { |
625 |
uint16_t handle; |
626 |
} QEMU_PACKED read_lmp_handle_cp; |
627 |
#define READ_LMP_HANDLE_CP_SIZE 2 |
628 |
|
629 |
typedef struct { |
630 |
uint8_t status; |
631 |
uint16_t handle; |
632 |
uint8_t lmp_handle; |
633 |
uint32_t reserved; |
634 |
} QEMU_PACKED read_lmp_handle_rp; |
635 |
#define READ_LMP_HANDLE_RP_SIZE 8 |
636 |
|
637 |
#define OCF_SETUP_SYNC_CONN 0x0028 |
638 |
typedef struct { |
639 |
uint16_t handle; |
640 |
uint32_t tx_bandwith; |
641 |
uint32_t rx_bandwith; |
642 |
uint16_t max_latency; |
643 |
uint16_t voice_setting; |
644 |
uint8_t retrans_effort; |
645 |
uint16_t pkt_type; |
646 |
} QEMU_PACKED setup_sync_conn_cp; |
647 |
#define SETUP_SYNC_CONN_CP_SIZE 17 |
648 |
|
649 |
#define OCF_ACCEPT_SYNC_CONN_REQ 0x0029 |
650 |
typedef struct { |
651 |
bdaddr_t bdaddr; |
652 |
uint32_t tx_bandwith; |
653 |
uint32_t rx_bandwith; |
654 |
uint16_t max_latency; |
655 |
uint16_t voice_setting; |
656 |
uint8_t retrans_effort; |
657 |
uint16_t pkt_type; |
658 |
} QEMU_PACKED accept_sync_conn_req_cp; |
659 |
#define ACCEPT_SYNC_CONN_REQ_CP_SIZE 21 |
660 |
|
661 |
#define OCF_REJECT_SYNC_CONN_REQ 0x002A |
662 |
typedef struct { |
663 |
bdaddr_t bdaddr; |
664 |
uint8_t reason; |
665 |
} QEMU_PACKED reject_sync_conn_req_cp; |
666 |
#define REJECT_SYNC_CONN_REQ_CP_SIZE 7 |
667 |
|
668 |
/* Link Policy */
|
669 |
#define OGF_LINK_POLICY 0x02 |
670 |
|
671 |
#define OCF_HOLD_MODE 0x0001 |
672 |
typedef struct { |
673 |
uint16_t handle; |
674 |
uint16_t max_interval; |
675 |
uint16_t min_interval; |
676 |
} QEMU_PACKED hold_mode_cp; |
677 |
#define HOLD_MODE_CP_SIZE 6 |
678 |
|
679 |
#define OCF_SNIFF_MODE 0x0003 |
680 |
typedef struct { |
681 |
uint16_t handle; |
682 |
uint16_t max_interval; |
683 |
uint16_t min_interval; |
684 |
uint16_t attempt; |
685 |
uint16_t timeout; |
686 |
} QEMU_PACKED sniff_mode_cp; |
687 |
#define SNIFF_MODE_CP_SIZE 10 |
688 |
|
689 |
#define OCF_EXIT_SNIFF_MODE 0x0004 |
690 |
typedef struct { |
691 |
uint16_t handle; |
692 |
} QEMU_PACKED exit_sniff_mode_cp; |
693 |
#define EXIT_SNIFF_MODE_CP_SIZE 2 |
694 |
|
695 |
#define OCF_PARK_MODE 0x0005 |
696 |
typedef struct { |
697 |
uint16_t handle; |
698 |
uint16_t max_interval; |
699 |
uint16_t min_interval; |
700 |
} QEMU_PACKED park_mode_cp; |
701 |
#define PARK_MODE_CP_SIZE 6 |
702 |
|
703 |
#define OCF_EXIT_PARK_MODE 0x0006 |
704 |
typedef struct { |
705 |
uint16_t handle; |
706 |
} QEMU_PACKED exit_park_mode_cp; |
707 |
#define EXIT_PARK_MODE_CP_SIZE 2 |
708 |
|
709 |
#define OCF_QOS_SETUP 0x0007 |
710 |
typedef struct { |
711 |
uint8_t service_type; /* 1 = best effort */
|
712 |
uint32_t token_rate; /* Byte per seconds */
|
713 |
uint32_t peak_bandwidth; /* Byte per seconds */
|
714 |
uint32_t latency; /* Microseconds */
|
715 |
uint32_t delay_variation; /* Microseconds */
|
716 |
} QEMU_PACKED hci_qos; |
717 |
#define HCI_QOS_CP_SIZE 17 |
718 |
typedef struct { |
719 |
uint16_t handle; |
720 |
uint8_t flags; /* Reserved */
|
721 |
hci_qos qos; |
722 |
} QEMU_PACKED qos_setup_cp; |
723 |
#define QOS_SETUP_CP_SIZE (3 + HCI_QOS_CP_SIZE) |
724 |
|
725 |
#define OCF_ROLE_DISCOVERY 0x0009 |
726 |
typedef struct { |
727 |
uint16_t handle; |
728 |
} QEMU_PACKED role_discovery_cp; |
729 |
#define ROLE_DISCOVERY_CP_SIZE 2 |
730 |
typedef struct { |
731 |
uint8_t status; |
732 |
uint16_t handle; |
733 |
uint8_t role; |
734 |
} QEMU_PACKED role_discovery_rp; |
735 |
#define ROLE_DISCOVERY_RP_SIZE 4 |
736 |
|
737 |
#define OCF_SWITCH_ROLE 0x000B |
738 |
typedef struct { |
739 |
bdaddr_t bdaddr; |
740 |
uint8_t role; |
741 |
} QEMU_PACKED switch_role_cp; |
742 |
#define SWITCH_ROLE_CP_SIZE 7 |
743 |
|
744 |
#define OCF_READ_LINK_POLICY 0x000C |
745 |
typedef struct { |
746 |
uint16_t handle; |
747 |
} QEMU_PACKED read_link_policy_cp; |
748 |
#define READ_LINK_POLICY_CP_SIZE 2 |
749 |
typedef struct { |
750 |
uint8_t status; |
751 |
uint16_t handle; |
752 |
uint16_t policy; |
753 |
} QEMU_PACKED read_link_policy_rp; |
754 |
#define READ_LINK_POLICY_RP_SIZE 5 |
755 |
|
756 |
#define OCF_WRITE_LINK_POLICY 0x000D |
757 |
typedef struct { |
758 |
uint16_t handle; |
759 |
uint16_t policy; |
760 |
} QEMU_PACKED write_link_policy_cp; |
761 |
#define WRITE_LINK_POLICY_CP_SIZE 4 |
762 |
typedef struct { |
763 |
uint8_t status; |
764 |
uint16_t handle; |
765 |
} QEMU_PACKED write_link_policy_rp; |
766 |
#define WRITE_LINK_POLICY_RP_SIZE 3 |
767 |
|
768 |
#define OCF_READ_DEFAULT_LINK_POLICY 0x000E |
769 |
|
770 |
#define OCF_WRITE_DEFAULT_LINK_POLICY 0x000F |
771 |
|
772 |
#define OCF_FLOW_SPECIFICATION 0x0010 |
773 |
|
774 |
#define OCF_SNIFF_SUBRATE 0x0011 |
775 |
typedef struct { |
776 |
uint16_t handle; |
777 |
uint16_t max_remote_latency; |
778 |
uint16_t max_local_latency; |
779 |
uint16_t min_remote_timeout; |
780 |
uint16_t min_local_timeout; |
781 |
} QEMU_PACKED sniff_subrate_cp; |
782 |
#define SNIFF_SUBRATE_CP_SIZE 10 |
783 |
|
784 |
/* Host Controller and Baseband */
|
785 |
#define OGF_HOST_CTL 0x03 |
786 |
|
787 |
#define OCF_SET_EVENT_MASK 0x0001 |
788 |
typedef struct { |
789 |
uint8_t mask[8];
|
790 |
} QEMU_PACKED set_event_mask_cp; |
791 |
#define SET_EVENT_MASK_CP_SIZE 8 |
792 |
|
793 |
#define OCF_RESET 0x0003 |
794 |
|
795 |
#define OCF_SET_EVENT_FLT 0x0005 |
796 |
typedef struct { |
797 |
uint8_t flt_type; |
798 |
uint8_t cond_type; |
799 |
uint8_t condition[0];
|
800 |
} QEMU_PACKED set_event_flt_cp; |
801 |
#define SET_EVENT_FLT_CP_SIZE 2 |
802 |
|
803 |
enum bt_filter_type {
|
804 |
FLT_CLEAR_ALL = 0x00,
|
805 |
FLT_INQ_RESULT = 0x01,
|
806 |
FLT_CONN_SETUP = 0x02,
|
807 |
}; |
808 |
enum inq_result_cond_type {
|
809 |
INQ_RESULT_RETURN_ALL = 0x00,
|
810 |
INQ_RESULT_RETURN_CLASS = 0x01,
|
811 |
INQ_RESULT_RETURN_BDADDR = 0x02,
|
812 |
}; |
813 |
enum conn_setup_cond_type {
|
814 |
CONN_SETUP_ALLOW_ALL = 0x00,
|
815 |
CONN_SETUP_ALLOW_CLASS = 0x01,
|
816 |
CONN_SETUP_ALLOW_BDADDR = 0x02,
|
817 |
}; |
818 |
enum conn_setup_cond {
|
819 |
CONN_SETUP_AUTO_OFF = 0x01,
|
820 |
CONN_SETUP_AUTO_ON = 0x02,
|
821 |
}; |
822 |
|
823 |
#define OCF_FLUSH 0x0008 |
824 |
typedef struct { |
825 |
uint16_t handle; |
826 |
} QEMU_PACKED flush_cp; |
827 |
#define FLUSH_CP_SIZE 2 |
828 |
|
829 |
typedef struct { |
830 |
uint8_t status; |
831 |
uint16_t handle; |
832 |
} QEMU_PACKED flush_rp; |
833 |
#define FLUSH_RP_SIZE 3 |
834 |
|
835 |
#define OCF_READ_PIN_TYPE 0x0009 |
836 |
typedef struct { |
837 |
uint8_t status; |
838 |
uint8_t pin_type; |
839 |
} QEMU_PACKED read_pin_type_rp; |
840 |
#define READ_PIN_TYPE_RP_SIZE 2 |
841 |
|
842 |
#define OCF_WRITE_PIN_TYPE 0x000A |
843 |
typedef struct { |
844 |
uint8_t pin_type; |
845 |
} QEMU_PACKED write_pin_type_cp; |
846 |
#define WRITE_PIN_TYPE_CP_SIZE 1 |
847 |
|
848 |
#define OCF_CREATE_NEW_UNIT_KEY 0x000B |
849 |
|
850 |
#define OCF_READ_STORED_LINK_KEY 0x000D |
851 |
typedef struct { |
852 |
bdaddr_t bdaddr; |
853 |
uint8_t read_all; |
854 |
} QEMU_PACKED read_stored_link_key_cp; |
855 |
#define READ_STORED_LINK_KEY_CP_SIZE 7 |
856 |
typedef struct { |
857 |
uint8_t status; |
858 |
uint16_t max_keys; |
859 |
uint16_t num_keys; |
860 |
} QEMU_PACKED read_stored_link_key_rp; |
861 |
#define READ_STORED_LINK_KEY_RP_SIZE 5 |
862 |
|
863 |
#define OCF_WRITE_STORED_LINK_KEY 0x0011 |
864 |
typedef struct { |
865 |
uint8_t num_keys; |
866 |
/* variable length part */
|
867 |
} QEMU_PACKED write_stored_link_key_cp; |
868 |
#define WRITE_STORED_LINK_KEY_CP_SIZE 1 |
869 |
typedef struct { |
870 |
uint8_t status; |
871 |
uint8_t num_keys; |
872 |
} QEMU_PACKED write_stored_link_key_rp; |
873 |
#define READ_WRITE_LINK_KEY_RP_SIZE 2 |
874 |
|
875 |
#define OCF_DELETE_STORED_LINK_KEY 0x0012 |
876 |
typedef struct { |
877 |
bdaddr_t bdaddr; |
878 |
uint8_t delete_all; |
879 |
} QEMU_PACKED delete_stored_link_key_cp; |
880 |
#define DELETE_STORED_LINK_KEY_CP_SIZE 7 |
881 |
typedef struct { |
882 |
uint8_t status; |
883 |
uint16_t num_keys; |
884 |
} QEMU_PACKED delete_stored_link_key_rp; |
885 |
#define DELETE_STORED_LINK_KEY_RP_SIZE 3 |
886 |
|
887 |
#define OCF_CHANGE_LOCAL_NAME 0x0013 |
888 |
typedef struct { |
889 |
char name[248]; |
890 |
} QEMU_PACKED change_local_name_cp; |
891 |
#define CHANGE_LOCAL_NAME_CP_SIZE 248 |
892 |
|
893 |
#define OCF_READ_LOCAL_NAME 0x0014 |
894 |
typedef struct { |
895 |
uint8_t status; |
896 |
char name[248]; |
897 |
} QEMU_PACKED read_local_name_rp; |
898 |
#define READ_LOCAL_NAME_RP_SIZE 249 |
899 |
|
900 |
#define OCF_READ_CONN_ACCEPT_TIMEOUT 0x0015 |
901 |
typedef struct { |
902 |
uint8_t status; |
903 |
uint16_t timeout; |
904 |
} QEMU_PACKED read_conn_accept_timeout_rp; |
905 |
#define READ_CONN_ACCEPT_TIMEOUT_RP_SIZE 3 |
906 |
|
907 |
#define OCF_WRITE_CONN_ACCEPT_TIMEOUT 0x0016 |
908 |
typedef struct { |
909 |
uint16_t timeout; |
910 |
} QEMU_PACKED write_conn_accept_timeout_cp; |
911 |
#define WRITE_CONN_ACCEPT_TIMEOUT_CP_SIZE 2 |
912 |
|
913 |
#define OCF_READ_PAGE_TIMEOUT 0x0017 |
914 |
typedef struct { |
915 |
uint8_t status; |
916 |
uint16_t timeout; |
917 |
} QEMU_PACKED read_page_timeout_rp; |
918 |
#define READ_PAGE_TIMEOUT_RP_SIZE 3 |
919 |
|
920 |
#define OCF_WRITE_PAGE_TIMEOUT 0x0018 |
921 |
typedef struct { |
922 |
uint16_t timeout; |
923 |
} QEMU_PACKED write_page_timeout_cp; |
924 |
#define WRITE_PAGE_TIMEOUT_CP_SIZE 2 |
925 |
|
926 |
#define OCF_READ_SCAN_ENABLE 0x0019 |
927 |
typedef struct { |
928 |
uint8_t status; |
929 |
uint8_t enable; |
930 |
} QEMU_PACKED read_scan_enable_rp; |
931 |
#define READ_SCAN_ENABLE_RP_SIZE 2 |
932 |
|
933 |
#define OCF_WRITE_SCAN_ENABLE 0x001A |
934 |
typedef struct { |
935 |
uint8_t scan_enable; |
936 |
} QEMU_PACKED write_scan_enable_cp; |
937 |
#define WRITE_SCAN_ENABLE_CP_SIZE 1 |
938 |
|
939 |
enum scan_enable_bits {
|
940 |
SCAN_DISABLED = 0,
|
941 |
SCAN_INQUIRY = 1 << 0, |
942 |
SCAN_PAGE = 1 << 1, |
943 |
}; |
944 |
|
945 |
#define OCF_READ_PAGE_ACTIVITY 0x001B |
946 |
typedef struct { |
947 |
uint8_t status; |
948 |
uint16_t interval; |
949 |
uint16_t window; |
950 |
} QEMU_PACKED read_page_activity_rp; |
951 |
#define READ_PAGE_ACTIVITY_RP_SIZE 5 |
952 |
|
953 |
#define OCF_WRITE_PAGE_ACTIVITY 0x001C |
954 |
typedef struct { |
955 |
uint16_t interval; |
956 |
uint16_t window; |
957 |
} QEMU_PACKED write_page_activity_cp; |
958 |
#define WRITE_PAGE_ACTIVITY_CP_SIZE 4 |
959 |
|
960 |
#define OCF_READ_INQ_ACTIVITY 0x001D |
961 |
typedef struct { |
962 |
uint8_t status; |
963 |
uint16_t interval; |
964 |
uint16_t window; |
965 |
} QEMU_PACKED read_inq_activity_rp; |
966 |
#define READ_INQ_ACTIVITY_RP_SIZE 5 |
967 |
|
968 |
#define OCF_WRITE_INQ_ACTIVITY 0x001E |
969 |
typedef struct { |
970 |
uint16_t interval; |
971 |
uint16_t window; |
972 |
} QEMU_PACKED write_inq_activity_cp; |
973 |
#define WRITE_INQ_ACTIVITY_CP_SIZE 4 |
974 |
|
975 |
#define OCF_READ_AUTH_ENABLE 0x001F |
976 |
|
977 |
#define OCF_WRITE_AUTH_ENABLE 0x0020 |
978 |
|
979 |
#define AUTH_DISABLED 0x00 |
980 |
#define AUTH_ENABLED 0x01 |
981 |
|
982 |
#define OCF_READ_ENCRYPT_MODE 0x0021 |
983 |
|
984 |
#define OCF_WRITE_ENCRYPT_MODE 0x0022 |
985 |
|
986 |
#define ENCRYPT_DISABLED 0x00 |
987 |
#define ENCRYPT_P2P 0x01 |
988 |
#define ENCRYPT_BOTH 0x02 |
989 |
|
990 |
#define OCF_READ_CLASS_OF_DEV 0x0023 |
991 |
typedef struct { |
992 |
uint8_t status; |
993 |
uint8_t dev_class[3];
|
994 |
} QEMU_PACKED read_class_of_dev_rp; |
995 |
#define READ_CLASS_OF_DEV_RP_SIZE 4 |
996 |
|
997 |
#define OCF_WRITE_CLASS_OF_DEV 0x0024 |
998 |
typedef struct { |
999 |
uint8_t dev_class[3];
|
1000 |
} QEMU_PACKED write_class_of_dev_cp; |
1001 |
#define WRITE_CLASS_OF_DEV_CP_SIZE 3 |
1002 |
|
1003 |
#define OCF_READ_VOICE_SETTING 0x0025 |
1004 |
typedef struct { |
1005 |
uint8_t status; |
1006 |
uint16_t voice_setting; |
1007 |
} QEMU_PACKED read_voice_setting_rp; |
1008 |
#define READ_VOICE_SETTING_RP_SIZE 3 |
1009 |
|
1010 |
#define OCF_WRITE_VOICE_SETTING 0x0026 |
1011 |
typedef struct { |
1012 |
uint16_t voice_setting; |
1013 |
} QEMU_PACKED write_voice_setting_cp; |
1014 |
#define WRITE_VOICE_SETTING_CP_SIZE 2 |
1015 |
|
1016 |
#define OCF_READ_AUTOMATIC_FLUSH_TIMEOUT 0x0027 |
1017 |
|
1018 |
#define OCF_WRITE_AUTOMATIC_FLUSH_TIMEOUT 0x0028 |
1019 |
|
1020 |
#define OCF_READ_NUM_BROADCAST_RETRANS 0x0029 |
1021 |
|
1022 |
#define OCF_WRITE_NUM_BROADCAST_RETRANS 0x002A |
1023 |
|
1024 |
#define OCF_READ_HOLD_MODE_ACTIVITY 0x002B |
1025 |
|
1026 |
#define OCF_WRITE_HOLD_MODE_ACTIVITY 0x002C |
1027 |
|
1028 |
#define OCF_READ_TRANSMIT_POWER_LEVEL 0x002D |
1029 |
typedef struct { |
1030 |
uint16_t handle; |
1031 |
uint8_t type; |
1032 |
} QEMU_PACKED read_transmit_power_level_cp; |
1033 |
#define READ_TRANSMIT_POWER_LEVEL_CP_SIZE 3 |
1034 |
typedef struct { |
1035 |
uint8_t status; |
1036 |
uint16_t handle; |
1037 |
int8_t level; |
1038 |
} QEMU_PACKED read_transmit_power_level_rp; |
1039 |
#define READ_TRANSMIT_POWER_LEVEL_RP_SIZE 4 |
1040 |
|
1041 |
#define OCF_HOST_BUFFER_SIZE 0x0033 |
1042 |
typedef struct { |
1043 |
uint16_t acl_mtu; |
1044 |
uint8_t sco_mtu; |
1045 |
uint16_t acl_max_pkt; |
1046 |
uint16_t sco_max_pkt; |
1047 |
} QEMU_PACKED host_buffer_size_cp; |
1048 |
#define HOST_BUFFER_SIZE_CP_SIZE 7 |
1049 |
|
1050 |
#define OCF_HOST_NUMBER_OF_COMPLETED_PACKETS 0x0035 |
1051 |
|
1052 |
#define OCF_READ_LINK_SUPERVISION_TIMEOUT 0x0036 |
1053 |
typedef struct { |
1054 |
uint8_t status; |
1055 |
uint16_t handle; |
1056 |
uint16_t link_sup_to; |
1057 |
} QEMU_PACKED read_link_supervision_timeout_rp; |
1058 |
#define READ_LINK_SUPERVISION_TIMEOUT_RP_SIZE 5 |
1059 |
|
1060 |
#define OCF_WRITE_LINK_SUPERVISION_TIMEOUT 0x0037 |
1061 |
typedef struct { |
1062 |
uint16_t handle; |
1063 |
uint16_t link_sup_to; |
1064 |
} QEMU_PACKED write_link_supervision_timeout_cp; |
1065 |
#define WRITE_LINK_SUPERVISION_TIMEOUT_CP_SIZE 4 |
1066 |
typedef struct { |
1067 |
uint8_t status; |
1068 |
uint16_t handle; |
1069 |
} QEMU_PACKED write_link_supervision_timeout_rp; |
1070 |
#define WRITE_LINK_SUPERVISION_TIMEOUT_RP_SIZE 3 |
1071 |
|
1072 |
#define OCF_READ_NUM_SUPPORTED_IAC 0x0038 |
1073 |
|
1074 |
#define MAX_IAC_LAP 0x40 |
1075 |
#define OCF_READ_CURRENT_IAC_LAP 0x0039 |
1076 |
typedef struct { |
1077 |
uint8_t status; |
1078 |
uint8_t num_current_iac; |
1079 |
uint8_t lap[MAX_IAC_LAP][3];
|
1080 |
} QEMU_PACKED read_current_iac_lap_rp; |
1081 |
#define READ_CURRENT_IAC_LAP_RP_SIZE 2+3*MAX_IAC_LAP |
1082 |
|
1083 |
#define OCF_WRITE_CURRENT_IAC_LAP 0x003A |
1084 |
typedef struct { |
1085 |
uint8_t num_current_iac; |
1086 |
uint8_t lap[MAX_IAC_LAP][3];
|
1087 |
} QEMU_PACKED write_current_iac_lap_cp; |
1088 |
#define WRITE_CURRENT_IAC_LAP_CP_SIZE 1+3*MAX_IAC_LAP |
1089 |
|
1090 |
#define OCF_READ_PAGE_SCAN_PERIOD_MODE 0x003B |
1091 |
|
1092 |
#define OCF_WRITE_PAGE_SCAN_PERIOD_MODE 0x003C |
1093 |
|
1094 |
#define OCF_READ_PAGE_SCAN_MODE 0x003D |
1095 |
|
1096 |
#define OCF_WRITE_PAGE_SCAN_MODE 0x003E |
1097 |
|
1098 |
#define OCF_SET_AFH_CLASSIFICATION 0x003F |
1099 |
typedef struct { |
1100 |
uint8_t map[10];
|
1101 |
} QEMU_PACKED set_afh_classification_cp; |
1102 |
#define SET_AFH_CLASSIFICATION_CP_SIZE 10 |
1103 |
typedef struct { |
1104 |
uint8_t status; |
1105 |
} QEMU_PACKED set_afh_classification_rp; |
1106 |
#define SET_AFH_CLASSIFICATION_RP_SIZE 1 |
1107 |
|
1108 |
#define OCF_READ_INQUIRY_SCAN_TYPE 0x0042 |
1109 |
typedef struct { |
1110 |
uint8_t status; |
1111 |
uint8_t type; |
1112 |
} QEMU_PACKED read_inquiry_scan_type_rp; |
1113 |
#define READ_INQUIRY_SCAN_TYPE_RP_SIZE 2 |
1114 |
|
1115 |
#define OCF_WRITE_INQUIRY_SCAN_TYPE 0x0043 |
1116 |
typedef struct { |
1117 |
uint8_t type; |
1118 |
} QEMU_PACKED write_inquiry_scan_type_cp; |
1119 |
#define WRITE_INQUIRY_SCAN_TYPE_CP_SIZE 1 |
1120 |
typedef struct { |
1121 |
uint8_t status; |
1122 |
} QEMU_PACKED write_inquiry_scan_type_rp; |
1123 |
#define WRITE_INQUIRY_SCAN_TYPE_RP_SIZE 1 |
1124 |
|
1125 |
#define OCF_READ_INQUIRY_MODE 0x0044 |
1126 |
typedef struct { |
1127 |
uint8_t status; |
1128 |
uint8_t mode; |
1129 |
} QEMU_PACKED read_inquiry_mode_rp; |
1130 |
#define READ_INQUIRY_MODE_RP_SIZE 2 |
1131 |
|
1132 |
#define OCF_WRITE_INQUIRY_MODE 0x0045 |
1133 |
typedef struct { |
1134 |
uint8_t mode; |
1135 |
} QEMU_PACKED write_inquiry_mode_cp; |
1136 |
#define WRITE_INQUIRY_MODE_CP_SIZE 1 |
1137 |
typedef struct { |
1138 |
uint8_t status; |
1139 |
} QEMU_PACKED write_inquiry_mode_rp; |
1140 |
#define WRITE_INQUIRY_MODE_RP_SIZE 1 |
1141 |
|
1142 |
#define OCF_READ_PAGE_SCAN_TYPE 0x0046 |
1143 |
|
1144 |
#define OCF_WRITE_PAGE_SCAN_TYPE 0x0047 |
1145 |
|
1146 |
#define OCF_READ_AFH_MODE 0x0048 |
1147 |
typedef struct { |
1148 |
uint8_t status; |
1149 |
uint8_t mode; |
1150 |
} QEMU_PACKED read_afh_mode_rp; |
1151 |
#define READ_AFH_MODE_RP_SIZE 2 |
1152 |
|
1153 |
#define OCF_WRITE_AFH_MODE 0x0049 |
1154 |
typedef struct { |
1155 |
uint8_t mode; |
1156 |
} QEMU_PACKED write_afh_mode_cp; |
1157 |
#define WRITE_AFH_MODE_CP_SIZE 1 |
1158 |
typedef struct { |
1159 |
uint8_t status; |
1160 |
} QEMU_PACKED write_afh_mode_rp; |
1161 |
#define WRITE_AFH_MODE_RP_SIZE 1 |
1162 |
|
1163 |
#define OCF_READ_EXT_INQUIRY_RESPONSE 0x0051 |
1164 |
typedef struct { |
1165 |
uint8_t status; |
1166 |
uint8_t fec; |
1167 |
uint8_t data[240];
|
1168 |
} QEMU_PACKED read_ext_inquiry_response_rp; |
1169 |
#define READ_EXT_INQUIRY_RESPONSE_RP_SIZE 242 |
1170 |
|
1171 |
#define OCF_WRITE_EXT_INQUIRY_RESPONSE 0x0052 |
1172 |
typedef struct { |
1173 |
uint8_t fec; |
1174 |
uint8_t data[240];
|
1175 |
} QEMU_PACKED write_ext_inquiry_response_cp; |
1176 |
#define WRITE_EXT_INQUIRY_RESPONSE_CP_SIZE 241 |
1177 |
typedef struct { |
1178 |
uint8_t status; |
1179 |
} QEMU_PACKED write_ext_inquiry_response_rp; |
1180 |
#define WRITE_EXT_INQUIRY_RESPONSE_RP_SIZE 1 |
1181 |
|
1182 |
/* Informational Parameters */
|
1183 |
#define OGF_INFO_PARAM 0x04 |
1184 |
|
1185 |
#define OCF_READ_LOCAL_VERSION 0x0001 |
1186 |
typedef struct { |
1187 |
uint8_t status; |
1188 |
uint8_t hci_ver; |
1189 |
uint16_t hci_rev; |
1190 |
uint8_t lmp_ver; |
1191 |
uint16_t manufacturer; |
1192 |
uint16_t lmp_subver; |
1193 |
} QEMU_PACKED read_local_version_rp; |
1194 |
#define READ_LOCAL_VERSION_RP_SIZE 9 |
1195 |
|
1196 |
#define OCF_READ_LOCAL_COMMANDS 0x0002 |
1197 |
typedef struct { |
1198 |
uint8_t status; |
1199 |
uint8_t commands[64];
|
1200 |
} QEMU_PACKED read_local_commands_rp; |
1201 |
#define READ_LOCAL_COMMANDS_RP_SIZE 65 |
1202 |
|
1203 |
#define OCF_READ_LOCAL_FEATURES 0x0003 |
1204 |
typedef struct { |
1205 |
uint8_t status; |
1206 |
uint8_t features[8];
|
1207 |
} QEMU_PACKED read_local_features_rp; |
1208 |
#define READ_LOCAL_FEATURES_RP_SIZE 9 |
1209 |
|
1210 |
#define OCF_READ_LOCAL_EXT_FEATURES 0x0004 |
1211 |
typedef struct { |
1212 |
uint8_t page_num; |
1213 |
} QEMU_PACKED read_local_ext_features_cp; |
1214 |
#define READ_LOCAL_EXT_FEATURES_CP_SIZE 1 |
1215 |
typedef struct { |
1216 |
uint8_t status; |
1217 |
uint8_t page_num; |
1218 |
uint8_t max_page_num; |
1219 |
uint8_t features[8];
|
1220 |
} QEMU_PACKED read_local_ext_features_rp; |
1221 |
#define READ_LOCAL_EXT_FEATURES_RP_SIZE 11 |
1222 |
|
1223 |
#define OCF_READ_BUFFER_SIZE 0x0005 |
1224 |
typedef struct { |
1225 |
uint8_t status; |
1226 |
uint16_t acl_mtu; |
1227 |
uint8_t sco_mtu; |
1228 |
uint16_t acl_max_pkt; |
1229 |
uint16_t sco_max_pkt; |
1230 |
} QEMU_PACKED read_buffer_size_rp; |
1231 |
#define READ_BUFFER_SIZE_RP_SIZE 8 |
1232 |
|
1233 |
#define OCF_READ_COUNTRY_CODE 0x0007 |
1234 |
typedef struct { |
1235 |
uint8_t status; |
1236 |
uint8_t country_code; |
1237 |
} QEMU_PACKED read_country_code_rp; |
1238 |
#define READ_COUNTRY_CODE_RP_SIZE 2 |
1239 |
|
1240 |
#define OCF_READ_BD_ADDR 0x0009 |
1241 |
typedef struct { |
1242 |
uint8_t status; |
1243 |
bdaddr_t bdaddr; |
1244 |
} QEMU_PACKED read_bd_addr_rp; |
1245 |
#define READ_BD_ADDR_RP_SIZE 7 |
1246 |
|
1247 |
/* Status params */
|
1248 |
#define OGF_STATUS_PARAM 0x05 |
1249 |
|
1250 |
#define OCF_READ_FAILED_CONTACT_COUNTER 0x0001 |
1251 |
typedef struct { |
1252 |
uint8_t status; |
1253 |
uint16_t handle; |
1254 |
uint8_t counter; |
1255 |
} QEMU_PACKED read_failed_contact_counter_rp; |
1256 |
#define READ_FAILED_CONTACT_COUNTER_RP_SIZE 4 |
1257 |
|
1258 |
#define OCF_RESET_FAILED_CONTACT_COUNTER 0x0002 |
1259 |
typedef struct { |
1260 |
uint8_t status; |
1261 |
uint16_t handle; |
1262 |
} QEMU_PACKED reset_failed_contact_counter_rp; |
1263 |
#define RESET_FAILED_CONTACT_COUNTER_RP_SIZE 4 |
1264 |
|
1265 |
#define OCF_READ_LINK_QUALITY 0x0003 |
1266 |
typedef struct { |
1267 |
uint16_t handle; |
1268 |
} QEMU_PACKED read_link_quality_cp; |
1269 |
#define READ_LINK_QUALITY_CP_SIZE 4 |
1270 |
|
1271 |
typedef struct { |
1272 |
uint8_t status; |
1273 |
uint16_t handle; |
1274 |
uint8_t link_quality; |
1275 |
} QEMU_PACKED read_link_quality_rp; |
1276 |
#define READ_LINK_QUALITY_RP_SIZE 4 |
1277 |
|
1278 |
#define OCF_READ_RSSI 0x0005 |
1279 |
typedef struct { |
1280 |
uint8_t status; |
1281 |
uint16_t handle; |
1282 |
int8_t rssi; |
1283 |
} QEMU_PACKED read_rssi_rp; |
1284 |
#define READ_RSSI_RP_SIZE 4 |
1285 |
|
1286 |
#define OCF_READ_AFH_MAP 0x0006 |
1287 |
typedef struct { |
1288 |
uint8_t status; |
1289 |
uint16_t handle; |
1290 |
uint8_t mode; |
1291 |
uint8_t map[10];
|
1292 |
} QEMU_PACKED read_afh_map_rp; |
1293 |
#define READ_AFH_MAP_RP_SIZE 14 |
1294 |
|
1295 |
#define OCF_READ_CLOCK 0x0007 |
1296 |
typedef struct { |
1297 |
uint16_t handle; |
1298 |
uint8_t which_clock; |
1299 |
} QEMU_PACKED read_clock_cp; |
1300 |
#define READ_CLOCK_CP_SIZE 3 |
1301 |
typedef struct { |
1302 |
uint8_t status; |
1303 |
uint16_t handle; |
1304 |
uint32_t clock; |
1305 |
uint16_t accuracy; |
1306 |
} QEMU_PACKED read_clock_rp; |
1307 |
#define READ_CLOCK_RP_SIZE 9 |
1308 |
|
1309 |
/* Testing commands */
|
1310 |
#define OGF_TESTING_CMD 0x3e |
1311 |
|
1312 |
/* Vendor specific commands */
|
1313 |
#define OGF_VENDOR_CMD 0x3f |
1314 |
|
1315 |
/* HCI Events */
|
1316 |
|
1317 |
#define EVT_INQUIRY_COMPLETE 0x01 |
1318 |
|
1319 |
#define EVT_INQUIRY_RESULT 0x02 |
1320 |
typedef struct { |
1321 |
uint8_t num_responses; |
1322 |
bdaddr_t bdaddr; |
1323 |
uint8_t pscan_rep_mode; |
1324 |
uint8_t pscan_period_mode; |
1325 |
uint8_t pscan_mode; |
1326 |
uint8_t dev_class[3];
|
1327 |
uint16_t clock_offset; |
1328 |
} QEMU_PACKED inquiry_info; |
1329 |
#define INQUIRY_INFO_SIZE 14 |
1330 |
|
1331 |
#define EVT_CONN_COMPLETE 0x03 |
1332 |
typedef struct { |
1333 |
uint8_t status; |
1334 |
uint16_t handle; |
1335 |
bdaddr_t bdaddr; |
1336 |
uint8_t link_type; |
1337 |
uint8_t encr_mode; |
1338 |
} QEMU_PACKED evt_conn_complete; |
1339 |
#define EVT_CONN_COMPLETE_SIZE 11 |
1340 |
|
1341 |
#define EVT_CONN_REQUEST 0x04 |
1342 |
typedef struct { |
1343 |
bdaddr_t bdaddr; |
1344 |
uint8_t dev_class[3];
|
1345 |
uint8_t link_type; |
1346 |
} QEMU_PACKED evt_conn_request; |
1347 |
#define EVT_CONN_REQUEST_SIZE 10 |
1348 |
|
1349 |
#define EVT_DISCONN_COMPLETE 0x05 |
1350 |
typedef struct { |
1351 |
uint8_t status; |
1352 |
uint16_t handle; |
1353 |
uint8_t reason; |
1354 |
} QEMU_PACKED evt_disconn_complete; |
1355 |
#define EVT_DISCONN_COMPLETE_SIZE 4 |
1356 |
|
1357 |
#define EVT_AUTH_COMPLETE 0x06 |
1358 |
typedef struct { |
1359 |
uint8_t status; |
1360 |
uint16_t handle; |
1361 |
} QEMU_PACKED evt_auth_complete; |
1362 |
#define EVT_AUTH_COMPLETE_SIZE 3 |
1363 |
|
1364 |
#define EVT_REMOTE_NAME_REQ_COMPLETE 0x07 |
1365 |
typedef struct { |
1366 |
uint8_t status; |
1367 |
bdaddr_t bdaddr; |
1368 |
char name[248]; |
1369 |
} QEMU_PACKED evt_remote_name_req_complete; |
1370 |
#define EVT_REMOTE_NAME_REQ_COMPLETE_SIZE 255 |
1371 |
|
1372 |
#define EVT_ENCRYPT_CHANGE 0x08 |
1373 |
typedef struct { |
1374 |
uint8_t status; |
1375 |
uint16_t handle; |
1376 |
uint8_t encrypt; |
1377 |
} QEMU_PACKED evt_encrypt_change; |
1378 |
#define EVT_ENCRYPT_CHANGE_SIZE 5 |
1379 |
|
1380 |
#define EVT_CHANGE_CONN_LINK_KEY_COMPLETE 0x09 |
1381 |
typedef struct { |
1382 |
uint8_t status; |
1383 |
uint16_t handle; |
1384 |
} QEMU_PACKED evt_change_conn_link_key_complete; |
1385 |
#define EVT_CHANGE_CONN_LINK_KEY_COMPLETE_SIZE 3 |
1386 |
|
1387 |
#define EVT_MASTER_LINK_KEY_COMPLETE 0x0A |
1388 |
typedef struct { |
1389 |
uint8_t status; |
1390 |
uint16_t handle; |
1391 |
uint8_t key_flag; |
1392 |
} QEMU_PACKED evt_master_link_key_complete; |
1393 |
#define EVT_MASTER_LINK_KEY_COMPLETE_SIZE 4 |
1394 |
|
1395 |
#define EVT_READ_REMOTE_FEATURES_COMPLETE 0x0B |
1396 |
typedef struct { |
1397 |
uint8_t status; |
1398 |
uint16_t handle; |
1399 |
uint8_t features[8];
|
1400 |
} QEMU_PACKED evt_read_remote_features_complete; |
1401 |
#define EVT_READ_REMOTE_FEATURES_COMPLETE_SIZE 11 |
1402 |
|
1403 |
#define EVT_READ_REMOTE_VERSION_COMPLETE 0x0C |
1404 |
typedef struct { |
1405 |
uint8_t status; |
1406 |
uint16_t handle; |
1407 |
uint8_t lmp_ver; |
1408 |
uint16_t manufacturer; |
1409 |
uint16_t lmp_subver; |
1410 |
} QEMU_PACKED evt_read_remote_version_complete; |
1411 |
#define EVT_READ_REMOTE_VERSION_COMPLETE_SIZE 8 |
1412 |
|
1413 |
#define EVT_QOS_SETUP_COMPLETE 0x0D |
1414 |
typedef struct { |
1415 |
uint8_t status; |
1416 |
uint16_t handle; |
1417 |
uint8_t flags; /* Reserved */
|
1418 |
hci_qos qos; |
1419 |
} QEMU_PACKED evt_qos_setup_complete; |
1420 |
#define EVT_QOS_SETUP_COMPLETE_SIZE (4 + HCI_QOS_CP_SIZE) |
1421 |
|
1422 |
#define EVT_CMD_COMPLETE 0x0E |
1423 |
typedef struct { |
1424 |
uint8_t ncmd; |
1425 |
uint16_t opcode; |
1426 |
} QEMU_PACKED evt_cmd_complete; |
1427 |
#define EVT_CMD_COMPLETE_SIZE 3 |
1428 |
|
1429 |
#define EVT_CMD_STATUS 0x0F |
1430 |
typedef struct { |
1431 |
uint8_t status; |
1432 |
uint8_t ncmd; |
1433 |
uint16_t opcode; |
1434 |
} QEMU_PACKED evt_cmd_status; |
1435 |
#define EVT_CMD_STATUS_SIZE 4 |
1436 |
|
1437 |
#define EVT_HARDWARE_ERROR 0x10 |
1438 |
typedef struct { |
1439 |
uint8_t code; |
1440 |
} QEMU_PACKED evt_hardware_error; |
1441 |
#define EVT_HARDWARE_ERROR_SIZE 1 |
1442 |
|
1443 |
#define EVT_FLUSH_OCCURRED 0x11 |
1444 |
typedef struct { |
1445 |
uint16_t handle; |
1446 |
} QEMU_PACKED evt_flush_occurred; |
1447 |
#define EVT_FLUSH_OCCURRED_SIZE 2 |
1448 |
|
1449 |
#define EVT_ROLE_CHANGE 0x12 |
1450 |
typedef struct { |
1451 |
uint8_t status; |
1452 |
bdaddr_t bdaddr; |
1453 |
uint8_t role; |
1454 |
} QEMU_PACKED evt_role_change; |
1455 |
#define EVT_ROLE_CHANGE_SIZE 8 |
1456 |
|
1457 |
#define EVT_NUM_COMP_PKTS 0x13 |
1458 |
typedef struct { |
1459 |
uint8_t num_hndl; |
1460 |
struct {
|
1461 |
uint16_t handle; |
1462 |
uint16_t num_packets; |
1463 |
} connection[0];
|
1464 |
} QEMU_PACKED evt_num_comp_pkts; |
1465 |
#define EVT_NUM_COMP_PKTS_SIZE(num_hndl) (1 + 4 * (num_hndl)) |
1466 |
|
1467 |
#define EVT_MODE_CHANGE 0x14 |
1468 |
typedef struct { |
1469 |
uint8_t status; |
1470 |
uint16_t handle; |
1471 |
uint8_t mode; |
1472 |
uint16_t interval; |
1473 |
} QEMU_PACKED evt_mode_change; |
1474 |
#define EVT_MODE_CHANGE_SIZE 6 |
1475 |
|
1476 |
#define EVT_RETURN_LINK_KEYS 0x15 |
1477 |
typedef struct { |
1478 |
uint8_t num_keys; |
1479 |
/* variable length part */
|
1480 |
} QEMU_PACKED evt_return_link_keys; |
1481 |
#define EVT_RETURN_LINK_KEYS_SIZE 1 |
1482 |
|
1483 |
#define EVT_PIN_CODE_REQ 0x16 |
1484 |
typedef struct { |
1485 |
bdaddr_t bdaddr; |
1486 |
} QEMU_PACKED evt_pin_code_req; |
1487 |
#define EVT_PIN_CODE_REQ_SIZE 6 |
1488 |
|
1489 |
#define EVT_LINK_KEY_REQ 0x17 |
1490 |
typedef struct { |
1491 |
bdaddr_t bdaddr; |
1492 |
} QEMU_PACKED evt_link_key_req; |
1493 |
#define EVT_LINK_KEY_REQ_SIZE 6 |
1494 |
|
1495 |
#define EVT_LINK_KEY_NOTIFY 0x18 |
1496 |
typedef struct { |
1497 |
bdaddr_t bdaddr; |
1498 |
uint8_t link_key[16];
|
1499 |
uint8_t key_type; |
1500 |
} QEMU_PACKED evt_link_key_notify; |
1501 |
#define EVT_LINK_KEY_NOTIFY_SIZE 23 |
1502 |
|
1503 |
#define EVT_LOOPBACK_COMMAND 0x19 |
1504 |
|
1505 |
#define EVT_DATA_BUFFER_OVERFLOW 0x1A |
1506 |
typedef struct { |
1507 |
uint8_t link_type; |
1508 |
} QEMU_PACKED evt_data_buffer_overflow; |
1509 |
#define EVT_DATA_BUFFER_OVERFLOW_SIZE 1 |
1510 |
|
1511 |
#define EVT_MAX_SLOTS_CHANGE 0x1B |
1512 |
typedef struct { |
1513 |
uint16_t handle; |
1514 |
uint8_t max_slots; |
1515 |
} QEMU_PACKED evt_max_slots_change; |
1516 |
#define EVT_MAX_SLOTS_CHANGE_SIZE 3 |
1517 |
|
1518 |
#define EVT_READ_CLOCK_OFFSET_COMPLETE 0x1C |
1519 |
typedef struct { |
1520 |
uint8_t status; |
1521 |
uint16_t handle; |
1522 |
uint16_t clock_offset; |
1523 |
} QEMU_PACKED evt_read_clock_offset_complete; |
1524 |
#define EVT_READ_CLOCK_OFFSET_COMPLETE_SIZE 5 |
1525 |
|
1526 |
#define EVT_CONN_PTYPE_CHANGED 0x1D |
1527 |
typedef struct { |
1528 |
uint8_t status; |
1529 |
uint16_t handle; |
1530 |
uint16_t ptype; |
1531 |
} QEMU_PACKED evt_conn_ptype_changed; |
1532 |
#define EVT_CONN_PTYPE_CHANGED_SIZE 5 |
1533 |
|
1534 |
#define EVT_QOS_VIOLATION 0x1E |
1535 |
typedef struct { |
1536 |
uint16_t handle; |
1537 |
} QEMU_PACKED evt_qos_violation; |
1538 |
#define EVT_QOS_VIOLATION_SIZE 2 |
1539 |
|
1540 |
#define EVT_PSCAN_REP_MODE_CHANGE 0x20 |
1541 |
typedef struct { |
1542 |
bdaddr_t bdaddr; |
1543 |
uint8_t pscan_rep_mode; |
1544 |
} QEMU_PACKED evt_pscan_rep_mode_change; |
1545 |
#define EVT_PSCAN_REP_MODE_CHANGE_SIZE 7 |
1546 |
|
1547 |
#define EVT_FLOW_SPEC_COMPLETE 0x21 |
1548 |
typedef struct { |
1549 |
uint8_t status; |
1550 |
uint16_t handle; |
1551 |
uint8_t flags; |
1552 |
uint8_t direction; |
1553 |
hci_qos qos; |
1554 |
} QEMU_PACKED evt_flow_spec_complete; |
1555 |
#define EVT_FLOW_SPEC_COMPLETE_SIZE (5 + HCI_QOS_CP_SIZE) |
1556 |
|
1557 |
#define EVT_INQUIRY_RESULT_WITH_RSSI 0x22 |
1558 |
typedef struct { |
1559 |
uint8_t num_responses; |
1560 |
bdaddr_t bdaddr; |
1561 |
uint8_t pscan_rep_mode; |
1562 |
uint8_t pscan_period_mode; |
1563 |
uint8_t dev_class[3];
|
1564 |
uint16_t clock_offset; |
1565 |
int8_t rssi; |
1566 |
} QEMU_PACKED inquiry_info_with_rssi; |
1567 |
#define INQUIRY_INFO_WITH_RSSI_SIZE 15 |
1568 |
typedef struct { |
1569 |
uint8_t num_responses; |
1570 |
bdaddr_t bdaddr; |
1571 |
uint8_t pscan_rep_mode; |
1572 |
uint8_t pscan_period_mode; |
1573 |
uint8_t pscan_mode; |
1574 |
uint8_t dev_class[3];
|
1575 |
uint16_t clock_offset; |
1576 |
int8_t rssi; |
1577 |
} QEMU_PACKED inquiry_info_with_rssi_and_pscan_mode; |
1578 |
#define INQUIRY_INFO_WITH_RSSI_AND_PSCAN_MODE_SIZE 16 |
1579 |
|
1580 |
#define EVT_READ_REMOTE_EXT_FEATURES_COMPLETE 0x23 |
1581 |
typedef struct { |
1582 |
uint8_t status; |
1583 |
uint16_t handle; |
1584 |
uint8_t page_num; |
1585 |
uint8_t max_page_num; |
1586 |
uint8_t features[8];
|
1587 |
} QEMU_PACKED evt_read_remote_ext_features_complete; |
1588 |
#define EVT_READ_REMOTE_EXT_FEATURES_COMPLETE_SIZE 13 |
1589 |
|
1590 |
#define EVT_SYNC_CONN_COMPLETE 0x2C |
1591 |
typedef struct { |
1592 |
uint8_t status; |
1593 |
uint16_t handle; |
1594 |
bdaddr_t bdaddr; |
1595 |
uint8_t link_type; |
1596 |
uint8_t trans_interval; |
1597 |
uint8_t retrans_window; |
1598 |
uint16_t rx_pkt_len; |
1599 |
uint16_t tx_pkt_len; |
1600 |
uint8_t air_mode; |
1601 |
} QEMU_PACKED evt_sync_conn_complete; |
1602 |
#define EVT_SYNC_CONN_COMPLETE_SIZE 17 |
1603 |
|
1604 |
#define EVT_SYNC_CONN_CHANGED 0x2D |
1605 |
typedef struct { |
1606 |
uint8_t status; |
1607 |
uint16_t handle; |
1608 |
uint8_t trans_interval; |
1609 |
uint8_t retrans_window; |
1610 |
uint16_t rx_pkt_len; |
1611 |
uint16_t tx_pkt_len; |
1612 |
} QEMU_PACKED evt_sync_conn_changed; |
1613 |
#define EVT_SYNC_CONN_CHANGED_SIZE 9 |
1614 |
|
1615 |
#define EVT_SNIFF_SUBRATE 0x2E |
1616 |
typedef struct { |
1617 |
uint8_t status; |
1618 |
uint16_t handle; |
1619 |
uint16_t max_remote_latency; |
1620 |
uint16_t max_local_latency; |
1621 |
uint16_t min_remote_timeout; |
1622 |
uint16_t min_local_timeout; |
1623 |
} QEMU_PACKED evt_sniff_subrate; |
1624 |
#define EVT_SNIFF_SUBRATE_SIZE 11 |
1625 |
|
1626 |
#define EVT_EXTENDED_INQUIRY_RESULT 0x2F |
1627 |
typedef struct { |
1628 |
bdaddr_t bdaddr; |
1629 |
uint8_t pscan_rep_mode; |
1630 |
uint8_t pscan_period_mode; |
1631 |
uint8_t dev_class[3];
|
1632 |
uint16_t clock_offset; |
1633 |
int8_t rssi; |
1634 |
uint8_t data[240];
|
1635 |
} QEMU_PACKED extended_inquiry_info; |
1636 |
#define EXTENDED_INQUIRY_INFO_SIZE 254 |
1637 |
|
1638 |
#define EVT_TESTING 0xFE |
1639 |
|
1640 |
#define EVT_VENDOR 0xFF |
1641 |
|
1642 |
/* Command opcode pack/unpack */
|
1643 |
#define cmd_opcode_pack(ogf, ocf) (uint16_t)((ocf & 0x03ff)|(ogf << 10)) |
1644 |
#define cmd_opcode_ogf(op) (op >> 10) |
1645 |
#define cmd_opcode_ocf(op) (op & 0x03ff) |
1646 |
|
1647 |
/* ACL handle and flags pack/unpack */
|
1648 |
#define acl_handle_pack(h, f) (uint16_t)(((h) & 0x0fff)|((f) << 12)) |
1649 |
#define acl_handle(h) ((h) & 0x0fff) |
1650 |
#define acl_flags(h) ((h) >> 12) |
1651 |
|
1652 |
/* HCI Packet structures */
|
1653 |
#define HCI_COMMAND_HDR_SIZE 3 |
1654 |
#define HCI_EVENT_HDR_SIZE 2 |
1655 |
#define HCI_ACL_HDR_SIZE 4 |
1656 |
#define HCI_SCO_HDR_SIZE 3 |
1657 |
|
1658 |
struct hci_command_hdr {
|
1659 |
uint16_t opcode; /* OCF & OGF */
|
1660 |
uint8_t plen; |
1661 |
} QEMU_PACKED; |
1662 |
|
1663 |
struct hci_event_hdr {
|
1664 |
uint8_t evt; |
1665 |
uint8_t plen; |
1666 |
} QEMU_PACKED; |
1667 |
|
1668 |
struct hci_acl_hdr {
|
1669 |
uint16_t handle; /* Handle & Flags(PB, BC) */
|
1670 |
uint16_t dlen; |
1671 |
} QEMU_PACKED; |
1672 |
|
1673 |
struct hci_sco_hdr {
|
1674 |
uint16_t handle; |
1675 |
uint8_t dlen; |
1676 |
} QEMU_PACKED; |
1677 |
|
1678 |
/* L2CAP layer defines */
|
1679 |
|
1680 |
enum bt_l2cap_lm_bits {
|
1681 |
L2CAP_LM_MASTER = 1 << 0, |
1682 |
L2CAP_LM_AUTH = 1 << 1, |
1683 |
L2CAP_LM_ENCRYPT = 1 << 2, |
1684 |
L2CAP_LM_TRUSTED = 1 << 3, |
1685 |
L2CAP_LM_RELIABLE = 1 << 4, |
1686 |
L2CAP_LM_SECURE = 1 << 5, |
1687 |
}; |
1688 |
|
1689 |
enum bt_l2cap_cid_predef {
|
1690 |
L2CAP_CID_INVALID = 0x0000,
|
1691 |
L2CAP_CID_SIGNALLING= 0x0001,
|
1692 |
L2CAP_CID_GROUP = 0x0002,
|
1693 |
L2CAP_CID_ALLOC = 0x0040,
|
1694 |
}; |
1695 |
|
1696 |
/* L2CAP command codes */
|
1697 |
enum bt_l2cap_cmd {
|
1698 |
L2CAP_COMMAND_REJ = 1,
|
1699 |
L2CAP_CONN_REQ, |
1700 |
L2CAP_CONN_RSP, |
1701 |
L2CAP_CONF_REQ, |
1702 |
L2CAP_CONF_RSP, |
1703 |
L2CAP_DISCONN_REQ, |
1704 |
L2CAP_DISCONN_RSP, |
1705 |
L2CAP_ECHO_REQ, |
1706 |
L2CAP_ECHO_RSP, |
1707 |
L2CAP_INFO_REQ, |
1708 |
L2CAP_INFO_RSP, |
1709 |
}; |
1710 |
|
1711 |
enum bt_l2cap_sar_bits {
|
1712 |
L2CAP_SAR_NO_SEG = 0,
|
1713 |
L2CAP_SAR_START, |
1714 |
L2CAP_SAR_END, |
1715 |
L2CAP_SAR_CONT, |
1716 |
}; |
1717 |
|
1718 |
/* L2CAP structures */
|
1719 |
typedef struct { |
1720 |
uint16_t len; |
1721 |
uint16_t cid; |
1722 |
uint8_t data[0];
|
1723 |
} QEMU_PACKED l2cap_hdr; |
1724 |
#define L2CAP_HDR_SIZE 4 |
1725 |
|
1726 |
typedef struct { |
1727 |
uint8_t code; |
1728 |
uint8_t ident; |
1729 |
uint16_t len; |
1730 |
} QEMU_PACKED l2cap_cmd_hdr; |
1731 |
#define L2CAP_CMD_HDR_SIZE 4 |
1732 |
|
1733 |
typedef struct { |
1734 |
uint16_t reason; |
1735 |
} QEMU_PACKED l2cap_cmd_rej; |
1736 |
#define L2CAP_CMD_REJ_SIZE 2 |
1737 |
|
1738 |
typedef struct { |
1739 |
uint16_t dcid; |
1740 |
uint16_t scid; |
1741 |
} QEMU_PACKED l2cap_cmd_rej_cid; |
1742 |
#define L2CAP_CMD_REJ_CID_SIZE 4 |
1743 |
|
1744 |
/* reject reason */
|
1745 |
enum bt_l2cap_rej_reason {
|
1746 |
L2CAP_REJ_CMD_NOT_UNDERSTOOD = 0,
|
1747 |
L2CAP_REJ_SIG_TOOBIG, |
1748 |
L2CAP_REJ_CID_INVAL, |
1749 |
}; |
1750 |
|
1751 |
typedef struct { |
1752 |
uint16_t psm; |
1753 |
uint16_t scid; |
1754 |
} QEMU_PACKED l2cap_conn_req; |
1755 |
#define L2CAP_CONN_REQ_SIZE 4 |
1756 |
|
1757 |
typedef struct { |
1758 |
uint16_t dcid; |
1759 |
uint16_t scid; |
1760 |
uint16_t result; |
1761 |
uint16_t status; |
1762 |
} QEMU_PACKED l2cap_conn_rsp; |
1763 |
#define L2CAP_CONN_RSP_SIZE 8 |
1764 |
|
1765 |
/* connect result */
|
1766 |
enum bt_l2cap_conn_res {
|
1767 |
L2CAP_CR_SUCCESS = 0,
|
1768 |
L2CAP_CR_PEND, |
1769 |
L2CAP_CR_BAD_PSM, |
1770 |
L2CAP_CR_SEC_BLOCK, |
1771 |
L2CAP_CR_NO_MEM, |
1772 |
}; |
1773 |
|
1774 |
/* connect status */
|
1775 |
enum bt_l2cap_conn_stat {
|
1776 |
L2CAP_CS_NO_INFO = 0,
|
1777 |
L2CAP_CS_AUTHEN_PEND, |
1778 |
L2CAP_CS_AUTHOR_PEND, |
1779 |
}; |
1780 |
|
1781 |
typedef struct { |
1782 |
uint16_t dcid; |
1783 |
uint16_t flags; |
1784 |
uint8_t data[0];
|
1785 |
} QEMU_PACKED l2cap_conf_req; |
1786 |
#define L2CAP_CONF_REQ_SIZE(datalen) (4 + (datalen)) |
1787 |
|
1788 |
typedef struct { |
1789 |
uint16_t scid; |
1790 |
uint16_t flags; |
1791 |
uint16_t result; |
1792 |
uint8_t data[0];
|
1793 |
} QEMU_PACKED l2cap_conf_rsp; |
1794 |
#define L2CAP_CONF_RSP_SIZE(datalen) (6 + datalen) |
1795 |
|
1796 |
enum bt_l2cap_conf_res {
|
1797 |
L2CAP_CONF_SUCCESS = 0,
|
1798 |
L2CAP_CONF_UNACCEPT, |
1799 |
L2CAP_CONF_REJECT, |
1800 |
L2CAP_CONF_UNKNOWN, |
1801 |
}; |
1802 |
|
1803 |
typedef struct { |
1804 |
uint8_t type; |
1805 |
uint8_t len; |
1806 |
uint8_t val[0];
|
1807 |
} QEMU_PACKED l2cap_conf_opt; |
1808 |
#define L2CAP_CONF_OPT_SIZE 2 |
1809 |
|
1810 |
enum bt_l2cap_conf_val {
|
1811 |
L2CAP_CONF_MTU = 1,
|
1812 |
L2CAP_CONF_FLUSH_TO, |
1813 |
L2CAP_CONF_QOS, |
1814 |
L2CAP_CONF_RFC, |
1815 |
L2CAP_CONF_RFC_MODE = L2CAP_CONF_RFC, |
1816 |
}; |
1817 |
|
1818 |
typedef struct { |
1819 |
uint8_t flags; |
1820 |
uint8_t service_type; |
1821 |
uint32_t token_rate; |
1822 |
uint32_t token_bucket_size; |
1823 |
uint32_t peak_bandwidth; |
1824 |
uint32_t latency; |
1825 |
uint32_t delay_variation; |
1826 |
} QEMU_PACKED l2cap_conf_opt_qos; |
1827 |
#define L2CAP_CONF_OPT_QOS_SIZE 22 |
1828 |
|
1829 |
enum bt_l2cap_conf_opt_qos_st {
|
1830 |
L2CAP_CONF_QOS_NO_TRAFFIC = 0x00,
|
1831 |
L2CAP_CONF_QOS_BEST_EFFORT, |
1832 |
L2CAP_CONF_QOS_GUARANTEED, |
1833 |
}; |
1834 |
|
1835 |
#define L2CAP_CONF_QOS_WILDCARD 0xffffffff |
1836 |
|
1837 |
enum bt_l2cap_mode {
|
1838 |
L2CAP_MODE_BASIC = 0,
|
1839 |
L2CAP_MODE_RETRANS = 1,
|
1840 |
L2CAP_MODE_FLOWCTL = 2,
|
1841 |
}; |
1842 |
|
1843 |
typedef struct { |
1844 |
uint16_t dcid; |
1845 |
uint16_t scid; |
1846 |
} QEMU_PACKED l2cap_disconn_req; |
1847 |
#define L2CAP_DISCONN_REQ_SIZE 4 |
1848 |
|
1849 |
typedef struct { |
1850 |
uint16_t dcid; |
1851 |
uint16_t scid; |
1852 |
} QEMU_PACKED l2cap_disconn_rsp; |
1853 |
#define L2CAP_DISCONN_RSP_SIZE 4 |
1854 |
|
1855 |
typedef struct { |
1856 |
uint16_t type; |
1857 |
} QEMU_PACKED l2cap_info_req; |
1858 |
#define L2CAP_INFO_REQ_SIZE 2 |
1859 |
|
1860 |
typedef struct { |
1861 |
uint16_t type; |
1862 |
uint16_t result; |
1863 |
uint8_t data[0];
|
1864 |
} QEMU_PACKED l2cap_info_rsp; |
1865 |
#define L2CAP_INFO_RSP_SIZE 4 |
1866 |
|
1867 |
/* info type */
|
1868 |
enum bt_l2cap_info_type {
|
1869 |
L2CAP_IT_CL_MTU = 1,
|
1870 |
L2CAP_IT_FEAT_MASK, |
1871 |
}; |
1872 |
|
1873 |
/* info result */
|
1874 |
enum bt_l2cap_info_result {
|
1875 |
L2CAP_IR_SUCCESS = 0,
|
1876 |
L2CAP_IR_NOTSUPP, |
1877 |
}; |
1878 |
|
1879 |
/* Service Discovery Protocol defines */
|
1880 |
/* Note that all multibyte values in lower layer protocols (above in this file)
|
1881 |
* are little-endian while SDP is big-endian. */
|
1882 |
|
1883 |
/* Protocol UUIDs */
|
1884 |
enum sdp_proto_uuid {
|
1885 |
SDP_UUID = 0x0001,
|
1886 |
UDP_UUID = 0x0002,
|
1887 |
RFCOMM_UUID = 0x0003,
|
1888 |
TCP_UUID = 0x0004,
|
1889 |
TCS_BIN_UUID = 0x0005,
|
1890 |
TCS_AT_UUID = 0x0006,
|
1891 |
OBEX_UUID = 0x0008,
|
1892 |
IP_UUID = 0x0009,
|
1893 |
FTP_UUID = 0x000a,
|
1894 |
HTTP_UUID = 0x000c,
|
1895 |
WSP_UUID = 0x000e,
|
1896 |
BNEP_UUID = 0x000f,
|
1897 |
UPNP_UUID = 0x0010,
|
1898 |
HIDP_UUID = 0x0011,
|
1899 |
HCRP_CTRL_UUID = 0x0012,
|
1900 |
HCRP_DATA_UUID = 0x0014,
|
1901 |
HCRP_NOTE_UUID = 0x0016,
|
1902 |
AVCTP_UUID = 0x0017,
|
1903 |
AVDTP_UUID = 0x0019,
|
1904 |
CMTP_UUID = 0x001b,
|
1905 |
UDI_UUID = 0x001d,
|
1906 |
MCAP_CTRL_UUID = 0x001e,
|
1907 |
MCAP_DATA_UUID = 0x001f,
|
1908 |
L2CAP_UUID = 0x0100,
|
1909 |
}; |
1910 |
|
1911 |
/*
|
1912 |
* Service class identifiers of standard services and service groups
|
1913 |
*/
|
1914 |
enum service_class_id {
|
1915 |
SDP_SERVER_SVCLASS_ID = 0x1000,
|
1916 |
BROWSE_GRP_DESC_SVCLASS_ID = 0x1001,
|
1917 |
PUBLIC_BROWSE_GROUP = 0x1002,
|
1918 |
SERIAL_PORT_SVCLASS_ID = 0x1101,
|
1919 |
LAN_ACCESS_SVCLASS_ID = 0x1102,
|
1920 |
DIALUP_NET_SVCLASS_ID = 0x1103,
|
1921 |
IRMC_SYNC_SVCLASS_ID = 0x1104,
|
1922 |
OBEX_OBJPUSH_SVCLASS_ID = 0x1105,
|
1923 |
OBEX_FILETRANS_SVCLASS_ID = 0x1106,
|
1924 |
IRMC_SYNC_CMD_SVCLASS_ID = 0x1107,
|
1925 |
HEADSET_SVCLASS_ID = 0x1108,
|
1926 |
CORDLESS_TELEPHONY_SVCLASS_ID = 0x1109,
|
1927 |
AUDIO_SOURCE_SVCLASS_ID = 0x110a,
|
1928 |
AUDIO_SINK_SVCLASS_ID = 0x110b,
|
1929 |
AV_REMOTE_TARGET_SVCLASS_ID = 0x110c,
|
1930 |
ADVANCED_AUDIO_SVCLASS_ID = 0x110d,
|
1931 |
AV_REMOTE_SVCLASS_ID = 0x110e,
|
1932 |
VIDEO_CONF_SVCLASS_ID = 0x110f,
|
1933 |
INTERCOM_SVCLASS_ID = 0x1110,
|
1934 |
FAX_SVCLASS_ID = 0x1111,
|
1935 |
HEADSET_AGW_SVCLASS_ID = 0x1112,
|
1936 |
WAP_SVCLASS_ID = 0x1113,
|
1937 |
WAP_CLIENT_SVCLASS_ID = 0x1114,
|
1938 |
PANU_SVCLASS_ID = 0x1115,
|
1939 |
NAP_SVCLASS_ID = 0x1116,
|
1940 |
GN_SVCLASS_ID = 0x1117,
|
1941 |
DIRECT_PRINTING_SVCLASS_ID = 0x1118,
|
1942 |
REFERENCE_PRINTING_SVCLASS_ID = 0x1119,
|
1943 |
IMAGING_SVCLASS_ID = 0x111a,
|
1944 |
IMAGING_RESPONDER_SVCLASS_ID = 0x111b,
|
1945 |
IMAGING_ARCHIVE_SVCLASS_ID = 0x111c,
|
1946 |
IMAGING_REFOBJS_SVCLASS_ID = 0x111d,
|
1947 |
HANDSFREE_SVCLASS_ID = 0x111e,
|
1948 |
HANDSFREE_AGW_SVCLASS_ID = 0x111f,
|
1949 |
DIRECT_PRT_REFOBJS_SVCLASS_ID = 0x1120,
|
1950 |
REFLECTED_UI_SVCLASS_ID = 0x1121,
|
1951 |
BASIC_PRINTING_SVCLASS_ID = 0x1122,
|
1952 |
PRINTING_STATUS_SVCLASS_ID = 0x1123,
|
1953 |
HID_SVCLASS_ID = 0x1124,
|
1954 |
HCR_SVCLASS_ID = 0x1125,
|
1955 |
HCR_PRINT_SVCLASS_ID = 0x1126,
|
1956 |
HCR_SCAN_SVCLASS_ID = 0x1127,
|
1957 |
CIP_SVCLASS_ID = 0x1128,
|
1958 |
VIDEO_CONF_GW_SVCLASS_ID = 0x1129,
|
1959 |
UDI_MT_SVCLASS_ID = 0x112a,
|
1960 |
UDI_TA_SVCLASS_ID = 0x112b,
|
1961 |
AV_SVCLASS_ID = 0x112c,
|
1962 |
SAP_SVCLASS_ID = 0x112d,
|
1963 |
PBAP_PCE_SVCLASS_ID = 0x112e,
|
1964 |
PBAP_PSE_SVCLASS_ID = 0x112f,
|
1965 |
PBAP_SVCLASS_ID = 0x1130,
|
1966 |
PNP_INFO_SVCLASS_ID = 0x1200,
|
1967 |
GENERIC_NETWORKING_SVCLASS_ID = 0x1201,
|
1968 |
GENERIC_FILETRANS_SVCLASS_ID = 0x1202,
|
1969 |
GENERIC_AUDIO_SVCLASS_ID = 0x1203,
|
1970 |
GENERIC_TELEPHONY_SVCLASS_ID = 0x1204,
|
1971 |
UPNP_SVCLASS_ID = 0x1205,
|
1972 |
UPNP_IP_SVCLASS_ID = 0x1206,
|
1973 |
UPNP_PAN_SVCLASS_ID = 0x1300,
|
1974 |
UPNP_LAP_SVCLASS_ID = 0x1301,
|
1975 |
UPNP_L2CAP_SVCLASS_ID = 0x1302,
|
1976 |
VIDEO_SOURCE_SVCLASS_ID = 0x1303,
|
1977 |
VIDEO_SINK_SVCLASS_ID = 0x1304,
|
1978 |
VIDEO_DISTRIBUTION_SVCLASS_ID = 0x1305,
|
1979 |
MDP_SVCLASS_ID = 0x1400,
|
1980 |
MDP_SOURCE_SVCLASS_ID = 0x1401,
|
1981 |
MDP_SINK_SVCLASS_ID = 0x1402,
|
1982 |
APPLE_AGENT_SVCLASS_ID = 0x2112,
|
1983 |
}; |
1984 |
|
1985 |
/*
|
1986 |
* Standard profile descriptor identifiers; note these
|
1987 |
* may be identical to some of the service classes defined above
|
1988 |
*/
|
1989 |
#define SDP_SERVER_PROFILE_ID SDP_SERVER_SVCLASS_ID
|
1990 |
#define BROWSE_GRP_DESC_PROFILE_ID BROWSE_GRP_DESC_SVCLASS_ID
|
1991 |
#define SERIAL_PORT_PROFILE_ID SERIAL_PORT_SVCLASS_ID
|
1992 |
#define LAN_ACCESS_PROFILE_ID LAN_ACCESS_SVCLASS_ID
|
1993 |
#define DIALUP_NET_PROFILE_ID DIALUP_NET_SVCLASS_ID
|
1994 |
#define IRMC_SYNC_PROFILE_ID IRMC_SYNC_SVCLASS_ID
|
1995 |
#define OBEX_OBJPUSH_PROFILE_ID OBEX_OBJPUSH_SVCLASS_ID
|
1996 |
#define OBEX_FILETRANS_PROFILE_ID OBEX_FILETRANS_SVCLASS_ID
|
1997 |
#define IRMC_SYNC_CMD_PROFILE_ID IRMC_SYNC_CMD_SVCLASS_ID
|
1998 |
#define HEADSET_PROFILE_ID HEADSET_SVCLASS_ID
|
1999 |
#define CORDLESS_TELEPHONY_PROFILE_ID CORDLESS_TELEPHONY_SVCLASS_ID
|
2000 |
#define AUDIO_SOURCE_PROFILE_ID AUDIO_SOURCE_SVCLASS_ID
|
2001 |
#define AUDIO_SINK_PROFILE_ID AUDIO_SINK_SVCLASS_ID
|
2002 |
#define AV_REMOTE_TARGET_PROFILE_ID AV_REMOTE_TARGET_SVCLASS_ID
|
2003 |
#define ADVANCED_AUDIO_PROFILE_ID ADVANCED_AUDIO_SVCLASS_ID
|
2004 |
#define AV_REMOTE_PROFILE_ID AV_REMOTE_SVCLASS_ID
|
2005 |
#define VIDEO_CONF_PROFILE_ID VIDEO_CONF_SVCLASS_ID
|
2006 |
#define INTERCOM_PROFILE_ID INTERCOM_SVCLASS_ID
|
2007 |
#define FAX_PROFILE_ID FAX_SVCLASS_ID
|
2008 |
#define HEADSET_AGW_PROFILE_ID HEADSET_AGW_SVCLASS_ID
|
2009 |
#define WAP_PROFILE_ID WAP_SVCLASS_ID
|
2010 |
#define WAP_CLIENT_PROFILE_ID WAP_CLIENT_SVCLASS_ID
|
2011 |
#define PANU_PROFILE_ID PANU_SVCLASS_ID
|
2012 |
#define NAP_PROFILE_ID NAP_SVCLASS_ID
|
2013 |
#define GN_PROFILE_ID GN_SVCLASS_ID
|
2014 |
#define DIRECT_PRINTING_PROFILE_ID DIRECT_PRINTING_SVCLASS_ID
|
2015 |
#define REFERENCE_PRINTING_PROFILE_ID REFERENCE_PRINTING_SVCLASS_ID
|
2016 |
#define IMAGING_PROFILE_ID IMAGING_SVCLASS_ID
|
2017 |
#define IMAGING_RESPONDER_PROFILE_ID IMAGING_RESPONDER_SVCLASS_ID
|
2018 |
#define IMAGING_ARCHIVE_PROFILE_ID IMAGING_ARCHIVE_SVCLASS_ID
|
2019 |
#define IMAGING_REFOBJS_PROFILE_ID IMAGING_REFOBJS_SVCLASS_ID
|
2020 |
#define HANDSFREE_PROFILE_ID HANDSFREE_SVCLASS_ID
|
2021 |
#define HANDSFREE_AGW_PROFILE_ID HANDSFREE_AGW_SVCLASS_ID
|
2022 |
#define DIRECT_PRT_REFOBJS_PROFILE_ID DIRECT_PRT_REFOBJS_SVCLASS_ID
|
2023 |
#define REFLECTED_UI_PROFILE_ID REFLECTED_UI_SVCLASS_ID
|
2024 |
#define BASIC_PRINTING_PROFILE_ID BASIC_PRINTING_SVCLASS_ID
|
2025 |
#define PRINTING_STATUS_PROFILE_ID PRINTING_STATUS_SVCLASS_ID
|
2026 |
#define HID_PROFILE_ID HID_SVCLASS_ID
|
2027 |
#define HCR_PROFILE_ID HCR_SCAN_SVCLASS_ID
|
2028 |
#define HCR_PRINT_PROFILE_ID HCR_PRINT_SVCLASS_ID
|
2029 |
#define HCR_SCAN_PROFILE_ID HCR_SCAN_SVCLASS_ID
|
2030 |
#define CIP_PROFILE_ID CIP_SVCLASS_ID
|
2031 |
#define VIDEO_CONF_GW_PROFILE_ID VIDEO_CONF_GW_SVCLASS_ID
|
2032 |
#define UDI_MT_PROFILE_ID UDI_MT_SVCLASS_ID
|
2033 |
#define UDI_TA_PROFILE_ID UDI_TA_SVCLASS_ID
|
2034 |
#define AV_PROFILE_ID AV_SVCLASS_ID
|
2035 |
#define SAP_PROFILE_ID SAP_SVCLASS_ID
|
2036 |
#define PBAP_PCE_PROFILE_ID PBAP_PCE_SVCLASS_ID
|
2037 |
#define PBAP_PSE_PROFILE_ID PBAP_PSE_SVCLASS_ID
|
2038 |
#define PBAP_PROFILE_ID PBAP_SVCLASS_ID
|
2039 |
#define PNP_INFO_PROFILE_ID PNP_INFO_SVCLASS_ID
|
2040 |
#define GENERIC_NETWORKING_PROFILE_ID GENERIC_NETWORKING_SVCLASS_ID
|
2041 |
#define GENERIC_FILETRANS_PROFILE_ID GENERIC_FILETRANS_SVCLASS_ID
|
2042 |
#define GENERIC_AUDIO_PROFILE_ID GENERIC_AUDIO_SVCLASS_ID
|
2043 |
#define GENERIC_TELEPHONY_PROFILE_ID GENERIC_TELEPHONY_SVCLASS_ID
|
2044 |
#define UPNP_PROFILE_ID UPNP_SVCLASS_ID
|
2045 |
#define UPNP_IP_PROFILE_ID UPNP_IP_SVCLASS_ID
|
2046 |
#define UPNP_PAN_PROFILE_ID UPNP_PAN_SVCLASS_ID
|
2047 |
#define UPNP_LAP_PROFILE_ID UPNP_LAP_SVCLASS_ID
|
2048 |
#define UPNP_L2CAP_PROFILE_ID UPNP_L2CAP_SVCLASS_ID
|
2049 |
#define VIDEO_SOURCE_PROFILE_ID VIDEO_SOURCE_SVCLASS_ID
|
2050 |
#define VIDEO_SINK_PROFILE_ID VIDEO_SINK_SVCLASS_ID
|
2051 |
#define VIDEO_DISTRIBUTION_PROFILE_ID VIDEO_DISTRIBUTION_SVCLASS_ID
|
2052 |
#define MDP_PROFILE_ID MDP_SVCLASS_ID
|
2053 |
#define MDP_SOURCE_PROFILE_ID MDP_SROUCE_SVCLASS_ID
|
2054 |
#define MDP_SINK_PROFILE_ID MDP_SINK_SVCLASS_ID
|
2055 |
#define APPLE_AGENT_PROFILE_ID APPLE_AGENT_SVCLASS_ID
|
2056 |
|
2057 |
/* Data Representation */
|
2058 |
enum bt_sdp_data_type {
|
2059 |
SDP_DTYPE_NIL = 0 << 3, |
2060 |
SDP_DTYPE_UINT = 1 << 3, |
2061 |
SDP_DTYPE_SINT = 2 << 3, |
2062 |
SDP_DTYPE_UUID = 3 << 3, |
2063 |
SDP_DTYPE_STRING = 4 << 3, |
2064 |
SDP_DTYPE_BOOL = 5 << 3, |
2065 |
SDP_DTYPE_SEQ = 6 << 3, |
2066 |
SDP_DTYPE_ALT = 7 << 3, |
2067 |
SDP_DTYPE_URL = 8 << 3, |
2068 |
}; |
2069 |
|
2070 |
enum bt_sdp_data_size {
|
2071 |
SDP_DSIZE_1 = 0,
|
2072 |
SDP_DSIZE_2, |
2073 |
SDP_DSIZE_4, |
2074 |
SDP_DSIZE_8, |
2075 |
SDP_DSIZE_16, |
2076 |
SDP_DSIZE_NEXT1, |
2077 |
SDP_DSIZE_NEXT2, |
2078 |
SDP_DSIZE_NEXT4, |
2079 |
SDP_DSIZE_MASK = SDP_DSIZE_NEXT4, |
2080 |
}; |
2081 |
|
2082 |
enum bt_sdp_cmd {
|
2083 |
SDP_ERROR_RSP = 0x01,
|
2084 |
SDP_SVC_SEARCH_REQ = 0x02,
|
2085 |
SDP_SVC_SEARCH_RSP = 0x03,
|
2086 |
SDP_SVC_ATTR_REQ = 0x04,
|
2087 |
SDP_SVC_ATTR_RSP = 0x05,
|
2088 |
SDP_SVC_SEARCH_ATTR_REQ = 0x06,
|
2089 |
SDP_SVC_SEARCH_ATTR_RSP = 0x07,
|
2090 |
}; |
2091 |
|
2092 |
enum bt_sdp_errorcode {
|
2093 |
SDP_INVALID_VERSION = 0x0001,
|
2094 |
SDP_INVALID_RECORD_HANDLE = 0x0002,
|
2095 |
SDP_INVALID_SYNTAX = 0x0003,
|
2096 |
SDP_INVALID_PDU_SIZE = 0x0004,
|
2097 |
SDP_INVALID_CSTATE = 0x0005,
|
2098 |
}; |
2099 |
|
2100 |
/*
|
2101 |
* String identifiers are based on the SDP spec stating that
|
2102 |
* "base attribute id of the primary (universal) language must be 0x0100"
|
2103 |
*
|
2104 |
* Other languages should have their own offset; e.g.:
|
2105 |
* #define XXXLangBase yyyy
|
2106 |
* #define AttrServiceName_XXX 0x0000+XXXLangBase
|
2107 |
*/
|
2108 |
#define SDP_PRIMARY_LANG_BASE 0x0100 |
2109 |
|
2110 |
enum bt_sdp_attribute_id {
|
2111 |
SDP_ATTR_RECORD_HANDLE = 0x0000,
|
2112 |
SDP_ATTR_SVCLASS_ID_LIST = 0x0001,
|
2113 |
SDP_ATTR_RECORD_STATE = 0x0002,
|
2114 |
SDP_ATTR_SERVICE_ID = 0x0003,
|
2115 |
SDP_ATTR_PROTO_DESC_LIST = 0x0004,
|
2116 |
SDP_ATTR_BROWSE_GRP_LIST = 0x0005,
|
2117 |
SDP_ATTR_LANG_BASE_ATTR_ID_LIST = 0x0006,
|
2118 |
SDP_ATTR_SVCINFO_TTL = 0x0007,
|
2119 |
SDP_ATTR_SERVICE_AVAILABILITY = 0x0008,
|
2120 |
SDP_ATTR_PFILE_DESC_LIST = 0x0009,
|
2121 |
SDP_ATTR_DOC_URL = 0x000a,
|
2122 |
SDP_ATTR_CLNT_EXEC_URL = 0x000b,
|
2123 |
SDP_ATTR_ICON_URL = 0x000c,
|
2124 |
SDP_ATTR_ADD_PROTO_DESC_LIST = 0x000d,
|
2125 |
|
2126 |
SDP_ATTR_SVCNAME_PRIMARY = SDP_PRIMARY_LANG_BASE + 0,
|
2127 |
SDP_ATTR_SVCDESC_PRIMARY = SDP_PRIMARY_LANG_BASE + 1,
|
2128 |
SDP_ATTR_SVCPROV_PRIMARY = SDP_PRIMARY_LANG_BASE + 2,
|
2129 |
|
2130 |
SDP_ATTR_GROUP_ID = 0x0200,
|
2131 |
SDP_ATTR_IP_SUBNET = 0x0200,
|
2132 |
|
2133 |
/* SDP */
|
2134 |
SDP_ATTR_VERSION_NUM_LIST = 0x0200,
|
2135 |
SDP_ATTR_SVCDB_STATE = 0x0201,
|
2136 |
|
2137 |
SDP_ATTR_SERVICE_VERSION = 0x0300,
|
2138 |
SDP_ATTR_EXTERNAL_NETWORK = 0x0301,
|
2139 |
SDP_ATTR_SUPPORTED_DATA_STORES_LIST = 0x0301,
|
2140 |
SDP_ATTR_FAX_CLASS1_SUPPORT = 0x0302,
|
2141 |
SDP_ATTR_REMOTE_AUDIO_VOLUME_CONTROL = 0x0302,
|
2142 |
SDP_ATTR_FAX_CLASS20_SUPPORT = 0x0303,
|
2143 |
SDP_ATTR_SUPPORTED_FORMATS_LIST = 0x0303,
|
2144 |
SDP_ATTR_FAX_CLASS2_SUPPORT = 0x0304,
|
2145 |
SDP_ATTR_AUDIO_FEEDBACK_SUPPORT = 0x0305,
|
2146 |
SDP_ATTR_NETWORK_ADDRESS = 0x0306,
|
2147 |
SDP_ATTR_WAP_GATEWAY = 0x0307,
|
2148 |
SDP_ATTR_HOMEPAGE_URL = 0x0308,
|
2149 |
SDP_ATTR_WAP_STACK_TYPE = 0x0309,
|
2150 |
SDP_ATTR_SECURITY_DESC = 0x030a,
|
2151 |
SDP_ATTR_NET_ACCESS_TYPE = 0x030b,
|
2152 |
SDP_ATTR_MAX_NET_ACCESSRATE = 0x030c,
|
2153 |
SDP_ATTR_IP4_SUBNET = 0x030d,
|
2154 |
SDP_ATTR_IP6_SUBNET = 0x030e,
|
2155 |
SDP_ATTR_SUPPORTED_CAPABILITIES = 0x0310,
|
2156 |
SDP_ATTR_SUPPORTED_FEATURES = 0x0311,
|
2157 |
SDP_ATTR_SUPPORTED_FUNCTIONS = 0x0312,
|
2158 |
SDP_ATTR_TOTAL_IMAGING_DATA_CAPACITY = 0x0313,
|
2159 |
SDP_ATTR_SUPPORTED_REPOSITORIES = 0x0314,
|
2160 |
|
2161 |
/* PnP Information */
|
2162 |
SDP_ATTR_SPECIFICATION_ID = 0x0200,
|
2163 |
SDP_ATTR_VENDOR_ID = 0x0201,
|
2164 |
SDP_ATTR_PRODUCT_ID = 0x0202,
|
2165 |
SDP_ATTR_VERSION = 0x0203,
|
2166 |
SDP_ATTR_PRIMARY_RECORD = 0x0204,
|
2167 |
SDP_ATTR_VENDOR_ID_SOURCE = 0x0205,
|
2168 |
|
2169 |
/* BT HID */
|
2170 |
SDP_ATTR_DEVICE_RELEASE_NUMBER = 0x0200,
|
2171 |
SDP_ATTR_PARSER_VERSION = 0x0201,
|
2172 |
SDP_ATTR_DEVICE_SUBCLASS = 0x0202,
|
2173 |
SDP_ATTR_COUNTRY_CODE = 0x0203,
|
2174 |
SDP_ATTR_VIRTUAL_CABLE = 0x0204,
|
2175 |
SDP_ATTR_RECONNECT_INITIATE = 0x0205,
|
2176 |
SDP_ATTR_DESCRIPTOR_LIST = 0x0206,
|
2177 |
SDP_ATTR_LANG_ID_BASE_LIST = 0x0207,
|
2178 |
SDP_ATTR_SDP_DISABLE = 0x0208,
|
2179 |
SDP_ATTR_BATTERY_POWER = 0x0209,
|
2180 |
SDP_ATTR_REMOTE_WAKEUP = 0x020a,
|
2181 |
SDP_ATTR_PROFILE_VERSION = 0x020b,
|
2182 |
SDP_ATTR_SUPERVISION_TIMEOUT = 0x020c,
|
2183 |
SDP_ATTR_NORMALLY_CONNECTABLE = 0x020d,
|
2184 |
SDP_ATTR_BOOT_DEVICE = 0x020e,
|
2185 |
}; |