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1 | 80cabfad | bellard | /*
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2 | 80cabfad | bellard | * QEMU PC System Emulator
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3 | 80cabfad | bellard | *
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4 | 80cabfad | bellard | * Copyright (c) 2003-2004 Fabrice Bellard
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5 | 80cabfad | bellard | *
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6 | 80cabfad | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 80cabfad | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 80cabfad | bellard | * in the Software without restriction, including without limitation the rights
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9 | 80cabfad | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 80cabfad | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 80cabfad | bellard | * furnished to do so, subject to the following conditions:
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12 | 80cabfad | bellard | *
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13 | 80cabfad | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 80cabfad | bellard | * all copies or substantial portions of the Software.
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15 | 80cabfad | bellard | *
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16 | 80cabfad | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 80cabfad | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 80cabfad | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 80cabfad | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 80cabfad | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 80cabfad | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 80cabfad | bellard | * THE SOFTWARE.
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23 | 80cabfad | bellard | */
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24 | 80cabfad | bellard | #include "vl.h" |
25 | 80cabfad | bellard | |
26 | b41a2cd1 | bellard | /* output Bochs bios info messages */
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27 | b41a2cd1 | bellard | //#define DEBUG_BIOS
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28 | b41a2cd1 | bellard | |
29 | 80cabfad | bellard | #define BIOS_FILENAME "bios.bin" |
30 | 80cabfad | bellard | #define VGABIOS_FILENAME "vgabios.bin" |
31 | de9258a8 | bellard | #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
32 | 80cabfad | bellard | |
33 | a80274c3 | pbrook | /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
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34 | a80274c3 | pbrook | #define ACPI_DATA_SIZE 0x10000 |
35 | 80cabfad | bellard | |
36 | baca51fa | bellard | static fdctrl_t *floppy_controller;
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37 | b0a21b53 | bellard | static RTCState *rtc_state;
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38 | ec844b96 | bellard | static PITState *pit;
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39 | d592d303 | bellard | static IOAPICState *ioapic;
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40 | a5954d5c | bellard | static PCIDevice *i440fx_state;
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41 | 80cabfad | bellard | |
42 | b41a2cd1 | bellard | static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
43 | 80cabfad | bellard | { |
44 | 80cabfad | bellard | } |
45 | 80cabfad | bellard | |
46 | f929aad6 | bellard | /* MSDOS compatibility mode FPU exception support */
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47 | d537cf6c | pbrook | static qemu_irq ferr_irq;
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48 | f929aad6 | bellard | /* XXX: add IGNNE support */
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49 | f929aad6 | bellard | void cpu_set_ferr(CPUX86State *s)
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50 | f929aad6 | bellard | { |
51 | d537cf6c | pbrook | qemu_irq_raise(ferr_irq); |
52 | f929aad6 | bellard | } |
53 | f929aad6 | bellard | |
54 | f929aad6 | bellard | static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
55 | f929aad6 | bellard | { |
56 | d537cf6c | pbrook | qemu_irq_lower(ferr_irq); |
57 | f929aad6 | bellard | } |
58 | f929aad6 | bellard | |
59 | 28ab0e2e | bellard | /* TSC handling */
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60 | 28ab0e2e | bellard | uint64_t cpu_get_tsc(CPUX86State *env) |
61 | 28ab0e2e | bellard | { |
62 | 1dce7c3c | bellard | /* Note: when using kqemu, it is more logical to return the host TSC
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63 | 1dce7c3c | bellard | because kqemu does not trap the RDTSC instruction for
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64 | 1dce7c3c | bellard | performance reasons */
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65 | 1dce7c3c | bellard | #if USE_KQEMU
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66 | 1dce7c3c | bellard | if (env->kqemu_enabled) {
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67 | 1dce7c3c | bellard | return cpu_get_real_ticks();
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68 | 1dce7c3c | bellard | } else
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69 | 1dce7c3c | bellard | #endif
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70 | 1dce7c3c | bellard | { |
71 | 1dce7c3c | bellard | return cpu_get_ticks();
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72 | 1dce7c3c | bellard | } |
73 | 28ab0e2e | bellard | } |
74 | 28ab0e2e | bellard | |
75 | a5954d5c | bellard | /* SMM support */
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76 | a5954d5c | bellard | void cpu_smm_update(CPUState *env)
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77 | a5954d5c | bellard | { |
78 | a5954d5c | bellard | if (i440fx_state && env == first_cpu)
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79 | a5954d5c | bellard | i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
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80 | a5954d5c | bellard | } |
81 | a5954d5c | bellard | |
82 | a5954d5c | bellard | |
83 | 3de388f6 | bellard | /* IRQ handling */
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84 | 3de388f6 | bellard | int cpu_get_pic_interrupt(CPUState *env)
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85 | 3de388f6 | bellard | { |
86 | 3de388f6 | bellard | int intno;
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87 | 3de388f6 | bellard | |
88 | 3de388f6 | bellard | intno = apic_get_interrupt(env); |
89 | 3de388f6 | bellard | if (intno >= 0) { |
90 | 3de388f6 | bellard | /* set irq request if a PIC irq is still pending */
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91 | 3de388f6 | bellard | /* XXX: improve that */
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92 | 3de388f6 | bellard | pic_update_irq(isa_pic); |
93 | 3de388f6 | bellard | return intno;
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94 | 3de388f6 | bellard | } |
95 | 3de388f6 | bellard | /* read the irq from the PIC */
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96 | 3de388f6 | bellard | intno = pic_read_irq(isa_pic); |
97 | 3de388f6 | bellard | return intno;
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98 | 3de388f6 | bellard | } |
99 | 3de388f6 | bellard | |
100 | d537cf6c | pbrook | static void pic_irq_request(void *opaque, int irq, int level) |
101 | 3de388f6 | bellard | { |
102 | 59b8ad81 | bellard | CPUState *env = opaque; |
103 | 3de388f6 | bellard | if (level)
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104 | 59b8ad81 | bellard | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
105 | 3de388f6 | bellard | else
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106 | 59b8ad81 | bellard | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
107 | 3de388f6 | bellard | } |
108 | 3de388f6 | bellard | |
109 | b0a21b53 | bellard | /* PC cmos mappings */
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110 | b0a21b53 | bellard | |
111 | 80cabfad | bellard | #define REG_EQUIPMENT_BYTE 0x14 |
112 | 80cabfad | bellard | |
113 | 777428f2 | bellard | static int cmos_get_fd_drive_type(int fd0) |
114 | 777428f2 | bellard | { |
115 | 777428f2 | bellard | int val;
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116 | 777428f2 | bellard | |
117 | 777428f2 | bellard | switch (fd0) {
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118 | 777428f2 | bellard | case 0: |
119 | 777428f2 | bellard | /* 1.44 Mb 3"5 drive */
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120 | 777428f2 | bellard | val = 4;
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121 | 777428f2 | bellard | break;
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122 | 777428f2 | bellard | case 1: |
123 | 777428f2 | bellard | /* 2.88 Mb 3"5 drive */
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124 | 777428f2 | bellard | val = 5;
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125 | 777428f2 | bellard | break;
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126 | 777428f2 | bellard | case 2: |
127 | 777428f2 | bellard | /* 1.2 Mb 5"5 drive */
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128 | 777428f2 | bellard | val = 2;
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129 | 777428f2 | bellard | break;
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130 | 777428f2 | bellard | default:
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131 | 777428f2 | bellard | val = 0;
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132 | 777428f2 | bellard | break;
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133 | 777428f2 | bellard | } |
134 | 777428f2 | bellard | return val;
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135 | 777428f2 | bellard | } |
136 | 777428f2 | bellard | |
137 | ba6c2377 | bellard | static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
138 | ba6c2377 | bellard | { |
139 | ba6c2377 | bellard | RTCState *s = rtc_state; |
140 | ba6c2377 | bellard | int cylinders, heads, sectors;
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141 | ba6c2377 | bellard | bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
142 | ba6c2377 | bellard | rtc_set_memory(s, type_ofs, 47);
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143 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs, cylinders); |
144 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
145 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 2, heads);
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146 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 3, 0xff); |
147 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 4, 0xff); |
148 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
149 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 6, cylinders);
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150 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
151 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 8, sectors);
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152 | ba6c2377 | bellard | } |
153 | ba6c2377 | bellard | |
154 | ba6c2377 | bellard | /* hd_table must contain 4 block drivers */
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155 | ba6c2377 | bellard | static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table) |
156 | 80cabfad | bellard | { |
157 | b0a21b53 | bellard | RTCState *s = rtc_state; |
158 | 80cabfad | bellard | int val;
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159 | b41a2cd1 | bellard | int fd0, fd1, nb;
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160 | ba6c2377 | bellard | int i;
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161 | b0a21b53 | bellard | |
162 | b0a21b53 | bellard | /* various important CMOS locations needed by PC/Bochs bios */
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163 | 80cabfad | bellard | |
164 | 80cabfad | bellard | /* memory size */
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165 | 333190eb | bellard | val = 640; /* base memory in K */ |
166 | 333190eb | bellard | rtc_set_memory(s, 0x15, val);
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167 | 333190eb | bellard | rtc_set_memory(s, 0x16, val >> 8); |
168 | 333190eb | bellard | |
169 | 80cabfad | bellard | val = (ram_size / 1024) - 1024; |
170 | 80cabfad | bellard | if (val > 65535) |
171 | 80cabfad | bellard | val = 65535;
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172 | b0a21b53 | bellard | rtc_set_memory(s, 0x17, val);
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173 | b0a21b53 | bellard | rtc_set_memory(s, 0x18, val >> 8); |
174 | b0a21b53 | bellard | rtc_set_memory(s, 0x30, val);
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175 | b0a21b53 | bellard | rtc_set_memory(s, 0x31, val >> 8); |
176 | 80cabfad | bellard | |
177 | 9da98861 | bellard | if (ram_size > (16 * 1024 * 1024)) |
178 | 9da98861 | bellard | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
179 | 9da98861 | bellard | else
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180 | 9da98861 | bellard | val = 0;
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181 | 80cabfad | bellard | if (val > 65535) |
182 | 80cabfad | bellard | val = 65535;
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183 | b0a21b53 | bellard | rtc_set_memory(s, 0x34, val);
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184 | b0a21b53 | bellard | rtc_set_memory(s, 0x35, val >> 8); |
185 | 80cabfad | bellard | |
186 | 80cabfad | bellard | switch(boot_device) {
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187 | 80cabfad | bellard | case 'a': |
188 | 80cabfad | bellard | case 'b': |
189 | b0a21b53 | bellard | rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */ |
190 | 52ca8d6a | bellard | if (!fd_bootchk)
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191 | 52ca8d6a | bellard | rtc_set_memory(s, 0x38, 0x01); /* disable signature check */ |
192 | 80cabfad | bellard | break;
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193 | 80cabfad | bellard | default:
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194 | 80cabfad | bellard | case 'c': |
195 | b0a21b53 | bellard | rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */ |
196 | 80cabfad | bellard | break;
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197 | 80cabfad | bellard | case 'd': |
198 | b0a21b53 | bellard | rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */ |
199 | 80cabfad | bellard | break;
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200 | 80cabfad | bellard | } |
201 | 80cabfad | bellard | |
202 | b41a2cd1 | bellard | /* floppy type */
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203 | b41a2cd1 | bellard | |
204 | baca51fa | bellard | fd0 = fdctrl_get_drive_type(floppy_controller, 0);
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205 | baca51fa | bellard | fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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206 | 80cabfad | bellard | |
207 | 777428f2 | bellard | val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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208 | b0a21b53 | bellard | rtc_set_memory(s, 0x10, val);
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209 | b0a21b53 | bellard | |
210 | b0a21b53 | bellard | val = 0;
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211 | b41a2cd1 | bellard | nb = 0;
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212 | 80cabfad | bellard | if (fd0 < 3) |
213 | 80cabfad | bellard | nb++; |
214 | 80cabfad | bellard | if (fd1 < 3) |
215 | 80cabfad | bellard | nb++; |
216 | 80cabfad | bellard | switch (nb) {
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217 | 80cabfad | bellard | case 0: |
218 | 80cabfad | bellard | break;
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219 | 80cabfad | bellard | case 1: |
220 | b0a21b53 | bellard | val |= 0x01; /* 1 drive, ready for boot */ |
221 | 80cabfad | bellard | break;
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222 | 80cabfad | bellard | case 2: |
223 | b0a21b53 | bellard | val |= 0x41; /* 2 drives, ready for boot */ |
224 | 80cabfad | bellard | break;
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225 | 80cabfad | bellard | } |
226 | b0a21b53 | bellard | val |= 0x02; /* FPU is there */ |
227 | b0a21b53 | bellard | val |= 0x04; /* PS/2 mouse installed */ |
228 | b0a21b53 | bellard | rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
229 | b0a21b53 | bellard | |
230 | ba6c2377 | bellard | /* hard drives */
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231 | ba6c2377 | bellard | |
232 | ba6c2377 | bellard | rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
233 | ba6c2377 | bellard | if (hd_table[0]) |
234 | ba6c2377 | bellard | cmos_init_hd(0x19, 0x1b, hd_table[0]); |
235 | ba6c2377 | bellard | if (hd_table[1]) |
236 | ba6c2377 | bellard | cmos_init_hd(0x1a, 0x24, hd_table[1]); |
237 | ba6c2377 | bellard | |
238 | ba6c2377 | bellard | val = 0;
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239 | 40b6ecc6 | bellard | for (i = 0; i < 4; i++) { |
240 | ba6c2377 | bellard | if (hd_table[i]) {
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241 | 46d4767d | bellard | int cylinders, heads, sectors, translation;
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242 | 46d4767d | bellard | /* NOTE: bdrv_get_geometry_hint() returns the physical
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243 | 46d4767d | bellard | geometry. It is always such that: 1 <= sects <= 63, 1
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244 | 46d4767d | bellard | <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
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245 | 46d4767d | bellard | geometry can be different if a translation is done. */
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246 | 46d4767d | bellard | translation = bdrv_get_translation_hint(hd_table[i]); |
247 | 46d4767d | bellard | if (translation == BIOS_ATA_TRANSLATION_AUTO) {
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248 | 46d4767d | bellard | bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); |
249 | 46d4767d | bellard | if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
250 | 46d4767d | bellard | /* No translation. */
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251 | 46d4767d | bellard | translation = 0;
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252 | 46d4767d | bellard | } else {
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253 | 46d4767d | bellard | /* LBA translation. */
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254 | 46d4767d | bellard | translation = 1;
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255 | 46d4767d | bellard | } |
256 | 40b6ecc6 | bellard | } else {
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257 | 46d4767d | bellard | translation--; |
258 | ba6c2377 | bellard | } |
259 | ba6c2377 | bellard | val |= translation << (i * 2);
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260 | ba6c2377 | bellard | } |
261 | 40b6ecc6 | bellard | } |
262 | ba6c2377 | bellard | rtc_set_memory(s, 0x39, val);
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263 | 80cabfad | bellard | } |
264 | 80cabfad | bellard | |
265 | 59b8ad81 | bellard | void ioport_set_a20(int enable) |
266 | 59b8ad81 | bellard | { |
267 | 59b8ad81 | bellard | /* XXX: send to all CPUs ? */
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268 | 59b8ad81 | bellard | cpu_x86_set_a20(first_cpu, enable); |
269 | 59b8ad81 | bellard | } |
270 | 59b8ad81 | bellard | |
271 | 59b8ad81 | bellard | int ioport_get_a20(void) |
272 | 59b8ad81 | bellard | { |
273 | 59b8ad81 | bellard | return ((first_cpu->a20_mask >> 20) & 1); |
274 | 59b8ad81 | bellard | } |
275 | 59b8ad81 | bellard | |
276 | e1a23744 | bellard | static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
277 | e1a23744 | bellard | { |
278 | 59b8ad81 | bellard | ioport_set_a20((val >> 1) & 1); |
279 | e1a23744 | bellard | /* XXX: bit 0 is fast reset */
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280 | e1a23744 | bellard | } |
281 | e1a23744 | bellard | |
282 | e1a23744 | bellard | static uint32_t ioport92_read(void *opaque, uint32_t addr) |
283 | e1a23744 | bellard | { |
284 | 59b8ad81 | bellard | return ioport_get_a20() << 1; |
285 | e1a23744 | bellard | } |
286 | e1a23744 | bellard | |
287 | 80cabfad | bellard | /***********************************************************/
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288 | 80cabfad | bellard | /* Bochs BIOS debug ports */
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289 | 80cabfad | bellard | |
290 | b41a2cd1 | bellard | void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
291 | 80cabfad | bellard | { |
292 | a2f659ee | bellard | static const char shutdown_str[8] = "Shutdown"; |
293 | a2f659ee | bellard | static int shutdown_index = 0; |
294 | a2f659ee | bellard | |
295 | 80cabfad | bellard | switch(addr) {
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296 | 80cabfad | bellard | /* Bochs BIOS messages */
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297 | 80cabfad | bellard | case 0x400: |
298 | 80cabfad | bellard | case 0x401: |
299 | 80cabfad | bellard | fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
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300 | 80cabfad | bellard | exit(1);
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301 | 80cabfad | bellard | case 0x402: |
302 | 80cabfad | bellard | case 0x403: |
303 | 80cabfad | bellard | #ifdef DEBUG_BIOS
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304 | 80cabfad | bellard | fprintf(stderr, "%c", val);
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305 | 80cabfad | bellard | #endif
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306 | 80cabfad | bellard | break;
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307 | a2f659ee | bellard | case 0x8900: |
308 | a2f659ee | bellard | /* same as Bochs power off */
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309 | a2f659ee | bellard | if (val == shutdown_str[shutdown_index]) {
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310 | a2f659ee | bellard | shutdown_index++; |
311 | a2f659ee | bellard | if (shutdown_index == 8) { |
312 | a2f659ee | bellard | shutdown_index = 0;
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313 | a2f659ee | bellard | qemu_system_shutdown_request(); |
314 | a2f659ee | bellard | } |
315 | a2f659ee | bellard | } else {
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316 | a2f659ee | bellard | shutdown_index = 0;
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317 | a2f659ee | bellard | } |
318 | a2f659ee | bellard | break;
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319 | 80cabfad | bellard | |
320 | 80cabfad | bellard | /* LGPL'ed VGA BIOS messages */
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321 | 80cabfad | bellard | case 0x501: |
322 | 80cabfad | bellard | case 0x502: |
323 | 80cabfad | bellard | fprintf(stderr, "VGA BIOS panic, line %d\n", val);
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324 | 80cabfad | bellard | exit(1);
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325 | 80cabfad | bellard | case 0x500: |
326 | 80cabfad | bellard | case 0x503: |
327 | 80cabfad | bellard | #ifdef DEBUG_BIOS
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328 | 80cabfad | bellard | fprintf(stderr, "%c", val);
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329 | 80cabfad | bellard | #endif
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330 | 80cabfad | bellard | break;
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331 | 80cabfad | bellard | } |
332 | 80cabfad | bellard | } |
333 | 80cabfad | bellard | |
334 | 80cabfad | bellard | void bochs_bios_init(void) |
335 | 80cabfad | bellard | { |
336 | b41a2cd1 | bellard | register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
337 | b41a2cd1 | bellard | register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
338 | b41a2cd1 | bellard | register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
339 | b41a2cd1 | bellard | register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
340 | a2f659ee | bellard | register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
341 | b41a2cd1 | bellard | |
342 | b41a2cd1 | bellard | register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
343 | b41a2cd1 | bellard | register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
344 | b41a2cd1 | bellard | register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
345 | b41a2cd1 | bellard | register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
346 | 80cabfad | bellard | } |
347 | 80cabfad | bellard | |
348 | 642a4f96 | ths | /* Generate an initial boot sector which sets state and jump to
|
349 | 642a4f96 | ths | a specified vector */
|
350 | 3f6c925f | balrog | static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip) |
351 | 642a4f96 | ths | { |
352 | 642a4f96 | ths | uint8_t bootsect[512], *p;
|
353 | 642a4f96 | ths | int i;
|
354 | 642a4f96 | ths | |
355 | 642a4f96 | ths | if (bs_table[0] == NULL) { |
356 | 642a4f96 | ths | fprintf(stderr, "A disk image must be given for 'hda' when booting "
|
357 | 642a4f96 | ths | "a Linux kernel\n");
|
358 | 642a4f96 | ths | exit(1);
|
359 | 642a4f96 | ths | } |
360 | 642a4f96 | ths | |
361 | 642a4f96 | ths | memset(bootsect, 0, sizeof(bootsect)); |
362 | 642a4f96 | ths | |
363 | 642a4f96 | ths | /* Copy the MSDOS partition table if possible */
|
364 | 642a4f96 | ths | bdrv_read(bs_table[0], 0, bootsect, 1); |
365 | 642a4f96 | ths | |
366 | 642a4f96 | ths | /* Make sure we have a partition signature */
|
367 | 642a4f96 | ths | bootsect[510] = 0x55; |
368 | 642a4f96 | ths | bootsect[511] = 0xaa; |
369 | 642a4f96 | ths | |
370 | 642a4f96 | ths | /* Actual code */
|
371 | 642a4f96 | ths | p = bootsect; |
372 | 642a4f96 | ths | *p++ = 0xfa; /* CLI */ |
373 | 642a4f96 | ths | *p++ = 0xfc; /* CLD */ |
374 | 642a4f96 | ths | |
375 | 642a4f96 | ths | for (i = 0; i < 6; i++) { |
376 | 642a4f96 | ths | if (i == 1) /* Skip CS */ |
377 | 642a4f96 | ths | continue;
|
378 | 642a4f96 | ths | |
379 | 642a4f96 | ths | *p++ = 0xb8; /* MOV AX,imm16 */ |
380 | 642a4f96 | ths | *p++ = segs[i]; |
381 | 642a4f96 | ths | *p++ = segs[i] >> 8;
|
382 | 642a4f96 | ths | *p++ = 0x8e; /* MOV <seg>,AX */ |
383 | 642a4f96 | ths | *p++ = 0xc0 + (i << 3); |
384 | 642a4f96 | ths | } |
385 | 642a4f96 | ths | |
386 | 642a4f96 | ths | for (i = 0; i < 8; i++) { |
387 | 642a4f96 | ths | *p++ = 0x66; /* 32-bit operand size */ |
388 | 642a4f96 | ths | *p++ = 0xb8 + i; /* MOV <reg>,imm32 */ |
389 | 642a4f96 | ths | *p++ = gpr[i]; |
390 | 642a4f96 | ths | *p++ = gpr[i] >> 8;
|
391 | 642a4f96 | ths | *p++ = gpr[i] >> 16;
|
392 | 642a4f96 | ths | *p++ = gpr[i] >> 24;
|
393 | 642a4f96 | ths | } |
394 | 642a4f96 | ths | |
395 | 642a4f96 | ths | *p++ = 0xea; /* JMP FAR */ |
396 | 642a4f96 | ths | *p++ = ip; /* IP */
|
397 | 642a4f96 | ths | *p++ = ip >> 8;
|
398 | 642a4f96 | ths | *p++ = segs[1]; /* CS */ |
399 | 642a4f96 | ths | *p++ = segs[1] >> 8; |
400 | 642a4f96 | ths | |
401 | 642a4f96 | ths | bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect)); |
402 | 642a4f96 | ths | } |
403 | 80cabfad | bellard | |
404 | 80cabfad | bellard | int load_kernel(const char *filename, uint8_t *addr, |
405 | 80cabfad | bellard | uint8_t *real_addr) |
406 | 80cabfad | bellard | { |
407 | 80cabfad | bellard | int fd, size;
|
408 | 80cabfad | bellard | int setup_sects;
|
409 | 80cabfad | bellard | |
410 | 096b7ea4 | bellard | fd = open(filename, O_RDONLY | O_BINARY); |
411 | 80cabfad | bellard | if (fd < 0) |
412 | 80cabfad | bellard | return -1; |
413 | 80cabfad | bellard | |
414 | 80cabfad | bellard | /* load 16 bit code */
|
415 | 80cabfad | bellard | if (read(fd, real_addr, 512) != 512) |
416 | 80cabfad | bellard | goto fail;
|
417 | 80cabfad | bellard | setup_sects = real_addr[0x1F1];
|
418 | 80cabfad | bellard | if (!setup_sects)
|
419 | 80cabfad | bellard | setup_sects = 4;
|
420 | 80cabfad | bellard | if (read(fd, real_addr + 512, setup_sects * 512) != |
421 | 80cabfad | bellard | setup_sects * 512)
|
422 | 80cabfad | bellard | goto fail;
|
423 | 642a4f96 | ths | |
424 | 80cabfad | bellard | /* load 32 bit code */
|
425 | 80cabfad | bellard | size = read(fd, addr, 16 * 1024 * 1024); |
426 | 80cabfad | bellard | if (size < 0) |
427 | 80cabfad | bellard | goto fail;
|
428 | 80cabfad | bellard | close(fd); |
429 | 80cabfad | bellard | return size;
|
430 | 80cabfad | bellard | fail:
|
431 | 80cabfad | bellard | close(fd); |
432 | 80cabfad | bellard | return -1; |
433 | 80cabfad | bellard | } |
434 | 80cabfad | bellard | |
435 | 642a4f96 | ths | static long get_file_size(FILE *f) |
436 | 642a4f96 | ths | { |
437 | 642a4f96 | ths | long where, size;
|
438 | 642a4f96 | ths | |
439 | 642a4f96 | ths | /* XXX: on Unix systems, using fstat() probably makes more sense */
|
440 | 642a4f96 | ths | |
441 | 642a4f96 | ths | where = ftell(f); |
442 | 642a4f96 | ths | fseek(f, 0, SEEK_END);
|
443 | 642a4f96 | ths | size = ftell(f); |
444 | 642a4f96 | ths | fseek(f, where, SEEK_SET); |
445 | 642a4f96 | ths | |
446 | 642a4f96 | ths | return size;
|
447 | 642a4f96 | ths | } |
448 | 642a4f96 | ths | |
449 | 642a4f96 | ths | static void load_linux(const char *kernel_filename, |
450 | 642a4f96 | ths | const char *initrd_filename, |
451 | 642a4f96 | ths | const char *kernel_cmdline) |
452 | 642a4f96 | ths | { |
453 | 642a4f96 | ths | uint16_t protocol; |
454 | 642a4f96 | ths | uint32_t gpr[8];
|
455 | 642a4f96 | ths | uint16_t seg[6];
|
456 | 642a4f96 | ths | uint16_t real_seg; |
457 | 642a4f96 | ths | int setup_size, kernel_size, initrd_size, cmdline_size;
|
458 | 642a4f96 | ths | uint32_t initrd_max; |
459 | 642a4f96 | ths | uint8_t header[1024];
|
460 | 642a4f96 | ths | uint8_t *real_addr, *prot_addr, *cmdline_addr, *initrd_addr; |
461 | 642a4f96 | ths | FILE *f, *fi; |
462 | 642a4f96 | ths | |
463 | 642a4f96 | ths | /* Align to 16 bytes as a paranoia measure */
|
464 | 642a4f96 | ths | cmdline_size = (strlen(kernel_cmdline)+16) & ~15; |
465 | 642a4f96 | ths | |
466 | 642a4f96 | ths | /* load the kernel header */
|
467 | 642a4f96 | ths | f = fopen(kernel_filename, "rb");
|
468 | 642a4f96 | ths | if (!f || !(kernel_size = get_file_size(f)) ||
|
469 | 642a4f96 | ths | fread(header, 1, 1024, f) != 1024) { |
470 | 642a4f96 | ths | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
471 | 642a4f96 | ths | kernel_filename); |
472 | 642a4f96 | ths | exit(1);
|
473 | 642a4f96 | ths | } |
474 | 642a4f96 | ths | |
475 | 642a4f96 | ths | /* kernel protocol version */
|
476 | 642a4f96 | ths | fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202)); |
477 | 642a4f96 | ths | if (ldl_p(header+0x202) == 0x53726448) |
478 | 642a4f96 | ths | protocol = lduw_p(header+0x206);
|
479 | 642a4f96 | ths | else
|
480 | 642a4f96 | ths | protocol = 0;
|
481 | 642a4f96 | ths | |
482 | 642a4f96 | ths | if (protocol < 0x200 || !(header[0x211] & 0x01)) { |
483 | 642a4f96 | ths | /* Low kernel */
|
484 | 642a4f96 | ths | real_addr = phys_ram_base + 0x90000;
|
485 | 642a4f96 | ths | cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
|
486 | 642a4f96 | ths | prot_addr = phys_ram_base + 0x10000;
|
487 | 642a4f96 | ths | } else if (protocol < 0x202) { |
488 | 642a4f96 | ths | /* High but ancient kernel */
|
489 | 642a4f96 | ths | real_addr = phys_ram_base + 0x90000;
|
490 | 642a4f96 | ths | cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
|
491 | 642a4f96 | ths | prot_addr = phys_ram_base + 0x100000;
|
492 | 642a4f96 | ths | } else {
|
493 | 642a4f96 | ths | /* High and recent kernel */
|
494 | 642a4f96 | ths | real_addr = phys_ram_base + 0x10000;
|
495 | 642a4f96 | ths | cmdline_addr = phys_ram_base + 0x20000;
|
496 | 642a4f96 | ths | prot_addr = phys_ram_base + 0x100000;
|
497 | 642a4f96 | ths | } |
498 | 642a4f96 | ths | |
499 | 642a4f96 | ths | fprintf(stderr, |
500 | 642a4f96 | ths | "qemu: real_addr = %#zx\n"
|
501 | 642a4f96 | ths | "qemu: cmdline_addr = %#zx\n"
|
502 | 642a4f96 | ths | "qemu: prot_addr = %#zx\n",
|
503 | 642a4f96 | ths | real_addr-phys_ram_base, |
504 | 642a4f96 | ths | cmdline_addr-phys_ram_base, |
505 | 642a4f96 | ths | prot_addr-phys_ram_base); |
506 | 642a4f96 | ths | |
507 | 642a4f96 | ths | /* highest address for loading the initrd */
|
508 | 642a4f96 | ths | if (protocol >= 0x203) |
509 | 642a4f96 | ths | initrd_max = ldl_p(header+0x22c);
|
510 | 642a4f96 | ths | else
|
511 | 642a4f96 | ths | initrd_max = 0x37ffffff;
|
512 | 642a4f96 | ths | |
513 | 642a4f96 | ths | if (initrd_max >= ram_size-ACPI_DATA_SIZE)
|
514 | 642a4f96 | ths | initrd_max = ram_size-ACPI_DATA_SIZE-1;
|
515 | 642a4f96 | ths | |
516 | 642a4f96 | ths | /* kernel command line */
|
517 | 642a4f96 | ths | pstrcpy(cmdline_addr, 4096, kernel_cmdline);
|
518 | 642a4f96 | ths | |
519 | 642a4f96 | ths | if (protocol >= 0x202) { |
520 | 642a4f96 | ths | stl_p(header+0x228, cmdline_addr-phys_ram_base);
|
521 | 642a4f96 | ths | } else {
|
522 | 642a4f96 | ths | stw_p(header+0x20, 0xA33F); |
523 | 642a4f96 | ths | stw_p(header+0x22, cmdline_addr-real_addr);
|
524 | 642a4f96 | ths | } |
525 | 642a4f96 | ths | |
526 | 642a4f96 | ths | /* loader type */
|
527 | 642a4f96 | ths | /* High nybble = B reserved for Qemu; low nybble is revision number.
|
528 | 642a4f96 | ths | If this code is substantially changed, you may want to consider
|
529 | 642a4f96 | ths | incrementing the revision. */
|
530 | 642a4f96 | ths | if (protocol >= 0x200) |
531 | 642a4f96 | ths | header[0x210] = 0xB0; |
532 | 642a4f96 | ths | |
533 | 642a4f96 | ths | /* heap */
|
534 | 642a4f96 | ths | if (protocol >= 0x201) { |
535 | 642a4f96 | ths | header[0x211] |= 0x80; /* CAN_USE_HEAP */ |
536 | 642a4f96 | ths | stw_p(header+0x224, cmdline_addr-real_addr-0x200); |
537 | 642a4f96 | ths | } |
538 | 642a4f96 | ths | |
539 | 642a4f96 | ths | /* load initrd */
|
540 | 642a4f96 | ths | if (initrd_filename) {
|
541 | 642a4f96 | ths | if (protocol < 0x200) { |
542 | 642a4f96 | ths | fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
|
543 | 642a4f96 | ths | exit(1);
|
544 | 642a4f96 | ths | } |
545 | 642a4f96 | ths | |
546 | 642a4f96 | ths | fi = fopen(initrd_filename, "rb");
|
547 | 642a4f96 | ths | if (!fi) {
|
548 | 642a4f96 | ths | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
549 | 642a4f96 | ths | initrd_filename); |
550 | 642a4f96 | ths | exit(1);
|
551 | 642a4f96 | ths | } |
552 | 642a4f96 | ths | |
553 | 642a4f96 | ths | initrd_size = get_file_size(fi); |
554 | 642a4f96 | ths | initrd_addr = phys_ram_base + ((initrd_max-initrd_size) & ~4095);
|
555 | 642a4f96 | ths | |
556 | 642a4f96 | ths | fprintf(stderr, "qemu: loading initrd (%#x bytes) at %#zx\n",
|
557 | 642a4f96 | ths | initrd_size, initrd_addr-phys_ram_base); |
558 | 642a4f96 | ths | |
559 | 642a4f96 | ths | if (fread(initrd_addr, 1, initrd_size, fi) != initrd_size) { |
560 | 642a4f96 | ths | fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
|
561 | 642a4f96 | ths | initrd_filename); |
562 | 642a4f96 | ths | exit(1);
|
563 | 642a4f96 | ths | } |
564 | 642a4f96 | ths | fclose(fi); |
565 | 642a4f96 | ths | |
566 | 642a4f96 | ths | stl_p(header+0x218, initrd_addr-phys_ram_base);
|
567 | 642a4f96 | ths | stl_p(header+0x21c, initrd_size);
|
568 | 642a4f96 | ths | } |
569 | 642a4f96 | ths | |
570 | 642a4f96 | ths | /* store the finalized header and load the rest of the kernel */
|
571 | 642a4f96 | ths | memcpy(real_addr, header, 1024);
|
572 | 642a4f96 | ths | |
573 | 642a4f96 | ths | setup_size = header[0x1f1];
|
574 | 642a4f96 | ths | if (setup_size == 0) |
575 | 642a4f96 | ths | setup_size = 4;
|
576 | 642a4f96 | ths | |
577 | 642a4f96 | ths | setup_size = (setup_size+1)*512; |
578 | 642a4f96 | ths | kernel_size -= setup_size; /* Size of protected-mode code */
|
579 | 642a4f96 | ths | |
580 | 642a4f96 | ths | if (fread(real_addr+1024, 1, setup_size-1024, f) != setup_size-1024 || |
581 | 642a4f96 | ths | fread(prot_addr, 1, kernel_size, f) != kernel_size) {
|
582 | 642a4f96 | ths | fprintf(stderr, "qemu: read error on kernel '%s'\n",
|
583 | 642a4f96 | ths | kernel_filename); |
584 | 642a4f96 | ths | exit(1);
|
585 | 642a4f96 | ths | } |
586 | 642a4f96 | ths | fclose(f); |
587 | 642a4f96 | ths | |
588 | 642a4f96 | ths | /* generate bootsector to set up the initial register state */
|
589 | 642a4f96 | ths | real_seg = (real_addr-phys_ram_base) >> 4;
|
590 | 642a4f96 | ths | seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg; |
591 | 642a4f96 | ths | seg[1] = real_seg+0x20; /* CS */ |
592 | 642a4f96 | ths | memset(gpr, 0, sizeof gpr); |
593 | 642a4f96 | ths | gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */ |
594 | 642a4f96 | ths | |
595 | 642a4f96 | ths | generate_bootsect(gpr, seg, 0);
|
596 | 642a4f96 | ths | } |
597 | 642a4f96 | ths | |
598 | 59b8ad81 | bellard | static void main_cpu_reset(void *opaque) |
599 | 59b8ad81 | bellard | { |
600 | 59b8ad81 | bellard | CPUState *env = opaque; |
601 | 59b8ad81 | bellard | cpu_reset(env); |
602 | 59b8ad81 | bellard | } |
603 | 59b8ad81 | bellard | |
604 | b41a2cd1 | bellard | static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
605 | b41a2cd1 | bellard | static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
606 | b41a2cd1 | bellard | static const int ide_irq[2] = { 14, 15 }; |
607 | b41a2cd1 | bellard | |
608 | b41a2cd1 | bellard | #define NE2000_NB_MAX 6 |
609 | b41a2cd1 | bellard | |
610 | 8d11df9e | bellard | static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
611 | b41a2cd1 | bellard | static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
612 | b41a2cd1 | bellard | |
613 | 8d11df9e | bellard | static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
614 | 8d11df9e | bellard | static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; |
615 | 8d11df9e | bellard | |
616 | 6508fe59 | bellard | static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
617 | 6508fe59 | bellard | static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
618 | 6508fe59 | bellard | |
619 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
620 | d537cf6c | pbrook | static void audio_init (PCIBus *pci_bus, qemu_irq *pic) |
621 | 6a36d84e | bellard | { |
622 | 6a36d84e | bellard | struct soundhw *c;
|
623 | 6a36d84e | bellard | int audio_enabled = 0; |
624 | 6a36d84e | bellard | |
625 | 6a36d84e | bellard | for (c = soundhw; !audio_enabled && c->name; ++c) {
|
626 | 6a36d84e | bellard | audio_enabled = c->enabled; |
627 | 6a36d84e | bellard | } |
628 | 6a36d84e | bellard | |
629 | 6a36d84e | bellard | if (audio_enabled) {
|
630 | 6a36d84e | bellard | AudioState *s; |
631 | 6a36d84e | bellard | |
632 | 6a36d84e | bellard | s = AUD_init (); |
633 | 6a36d84e | bellard | if (s) {
|
634 | 6a36d84e | bellard | for (c = soundhw; c->name; ++c) {
|
635 | 6a36d84e | bellard | if (c->enabled) {
|
636 | 6a36d84e | bellard | if (c->isa) {
|
637 | d537cf6c | pbrook | c->init.init_isa (s, pic); |
638 | 6a36d84e | bellard | } |
639 | 6a36d84e | bellard | else {
|
640 | 6a36d84e | bellard | if (pci_bus) {
|
641 | 6a36d84e | bellard | c->init.init_pci (pci_bus, s); |
642 | 6a36d84e | bellard | } |
643 | 6a36d84e | bellard | } |
644 | 6a36d84e | bellard | } |
645 | 6a36d84e | bellard | } |
646 | 6a36d84e | bellard | } |
647 | 6a36d84e | bellard | } |
648 | 6a36d84e | bellard | } |
649 | 6a36d84e | bellard | #endif
|
650 | 6a36d84e | bellard | |
651 | d537cf6c | pbrook | static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic) |
652 | a41b2ff2 | pbrook | { |
653 | a41b2ff2 | pbrook | static int nb_ne2k = 0; |
654 | a41b2ff2 | pbrook | |
655 | a41b2ff2 | pbrook | if (nb_ne2k == NE2000_NB_MAX)
|
656 | a41b2ff2 | pbrook | return;
|
657 | d537cf6c | pbrook | isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd); |
658 | a41b2ff2 | pbrook | nb_ne2k++; |
659 | a41b2ff2 | pbrook | } |
660 | a41b2ff2 | pbrook | |
661 | 80cabfad | bellard | /* PC hardware initialisation */
|
662 | b5ff2d6e | bellard | static void pc_init1(int ram_size, int vga_ram_size, int boot_device, |
663 | b5ff2d6e | bellard | DisplayState *ds, const char **fd_filename, int snapshot, |
664 | b5ff2d6e | bellard | const char *kernel_filename, const char *kernel_cmdline, |
665 | 3dbbdc25 | bellard | const char *initrd_filename, |
666 | 3dbbdc25 | bellard | int pci_enabled)
|
667 | 80cabfad | bellard | { |
668 | 80cabfad | bellard | char buf[1024]; |
669 | 642a4f96 | ths | int ret, linux_boot, i;
|
670 | 970ac5a3 | bellard | ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset; |
671 | 970ac5a3 | bellard | int bios_size, isa_bios_size, vga_bios_size;
|
672 | 46e50e9d | bellard | PCIBus *pci_bus; |
673 | 5c3ff3a7 | pbrook | int piix3_devfn = -1; |
674 | 59b8ad81 | bellard | CPUState *env; |
675 | a41b2ff2 | pbrook | NICInfo *nd; |
676 | d537cf6c | pbrook | qemu_irq *cpu_irq; |
677 | d537cf6c | pbrook | qemu_irq *i8259; |
678 | d592d303 | bellard | |
679 | 80cabfad | bellard | linux_boot = (kernel_filename != NULL);
|
680 | 80cabfad | bellard | |
681 | 59b8ad81 | bellard | /* init CPUs */
|
682 | 59b8ad81 | bellard | for(i = 0; i < smp_cpus; i++) { |
683 | 59b8ad81 | bellard | env = cpu_init(); |
684 | 59b8ad81 | bellard | if (i != 0) |
685 | ad49ff9d | bellard | env->hflags |= HF_HALTED_MASK; |
686 | 59b8ad81 | bellard | if (smp_cpus > 1) { |
687 | 59b8ad81 | bellard | /* XXX: enable it in all cases */
|
688 | 59b8ad81 | bellard | env->cpuid_features |= CPUID_APIC; |
689 | 59b8ad81 | bellard | } |
690 | a5954d5c | bellard | register_savevm("cpu", i, 4, cpu_save, cpu_load, env); |
691 | 59b8ad81 | bellard | qemu_register_reset(main_cpu_reset, env); |
692 | 59b8ad81 | bellard | if (pci_enabled) {
|
693 | 59b8ad81 | bellard | apic_init(env); |
694 | 59b8ad81 | bellard | } |
695 | 59b8ad81 | bellard | } |
696 | 59b8ad81 | bellard | |
697 | 80cabfad | bellard | /* allocate RAM */
|
698 | 970ac5a3 | bellard | ram_addr = qemu_ram_alloc(ram_size); |
699 | 970ac5a3 | bellard | cpu_register_physical_memory(0, ram_size, ram_addr);
|
700 | 80cabfad | bellard | |
701 | 970ac5a3 | bellard | /* allocate VGA RAM */
|
702 | 970ac5a3 | bellard | vga_ram_addr = qemu_ram_alloc(vga_ram_size); |
703 | 7587cf44 | bellard | |
704 | 970ac5a3 | bellard | /* BIOS load */
|
705 | 80cabfad | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); |
706 | 7587cf44 | bellard | bios_size = get_image_size(buf); |
707 | 7587cf44 | bellard | if (bios_size <= 0 || |
708 | 970ac5a3 | bellard | (bios_size % 65536) != 0) { |
709 | 7587cf44 | bellard | goto bios_error;
|
710 | 7587cf44 | bellard | } |
711 | 970ac5a3 | bellard | bios_offset = qemu_ram_alloc(bios_size); |
712 | 7587cf44 | bellard | ret = load_image(buf, phys_ram_base + bios_offset); |
713 | 7587cf44 | bellard | if (ret != bios_size) {
|
714 | 7587cf44 | bellard | bios_error:
|
715 | 970ac5a3 | bellard | fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
|
716 | 80cabfad | bellard | exit(1);
|
717 | 80cabfad | bellard | } |
718 | 7587cf44 | bellard | |
719 | 80cabfad | bellard | /* VGA BIOS load */
|
720 | de9258a8 | bellard | if (cirrus_vga_enabled) {
|
721 | de9258a8 | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); |
722 | de9258a8 | bellard | } else {
|
723 | de9258a8 | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
724 | de9258a8 | bellard | } |
725 | 970ac5a3 | bellard | vga_bios_size = get_image_size(buf); |
726 | 970ac5a3 | bellard | if (vga_bios_size <= 0 || vga_bios_size > 65536) |
727 | 970ac5a3 | bellard | goto vga_bios_error;
|
728 | 970ac5a3 | bellard | vga_bios_offset = qemu_ram_alloc(65536);
|
729 | 970ac5a3 | bellard | |
730 | 7587cf44 | bellard | ret = load_image(buf, phys_ram_base + vga_bios_offset); |
731 | 970ac5a3 | bellard | if (ret != vga_bios_size) {
|
732 | 970ac5a3 | bellard | vga_bios_error:
|
733 | 970ac5a3 | bellard | fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
|
734 | 970ac5a3 | bellard | exit(1);
|
735 | 970ac5a3 | bellard | } |
736 | 970ac5a3 | bellard | |
737 | 80cabfad | bellard | /* setup basic memory access */
|
738 | 7587cf44 | bellard | cpu_register_physical_memory(0xc0000, 0x10000, |
739 | 7587cf44 | bellard | vga_bios_offset | IO_MEM_ROM); |
740 | 7587cf44 | bellard | |
741 | 7587cf44 | bellard | /* map the last 128KB of the BIOS in ISA space */
|
742 | 7587cf44 | bellard | isa_bios_size = bios_size; |
743 | 7587cf44 | bellard | if (isa_bios_size > (128 * 1024)) |
744 | 7587cf44 | bellard | isa_bios_size = 128 * 1024; |
745 | 7587cf44 | bellard | cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, |
746 | 7587cf44 | bellard | IO_MEM_UNASSIGNED); |
747 | 7587cf44 | bellard | cpu_register_physical_memory(0x100000 - isa_bios_size,
|
748 | 7587cf44 | bellard | isa_bios_size, |
749 | 7587cf44 | bellard | (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
750 | 9ae02555 | ths | |
751 | 970ac5a3 | bellard | { |
752 | 970ac5a3 | bellard | ram_addr_t option_rom_offset; |
753 | 970ac5a3 | bellard | int size, offset;
|
754 | 970ac5a3 | bellard | |
755 | 970ac5a3 | bellard | offset = 0;
|
756 | 970ac5a3 | bellard | for (i = 0; i < nb_option_roms; i++) { |
757 | 970ac5a3 | bellard | size = get_image_size(option_rom[i]); |
758 | 970ac5a3 | bellard | if (size < 0) { |
759 | 970ac5a3 | bellard | fprintf(stderr, "Could not load option rom '%s'\n",
|
760 | 970ac5a3 | bellard | option_rom[i]); |
761 | 970ac5a3 | bellard | exit(1);
|
762 | 970ac5a3 | bellard | } |
763 | 970ac5a3 | bellard | if (size > (0x10000 - offset)) |
764 | 970ac5a3 | bellard | goto option_rom_error;
|
765 | 970ac5a3 | bellard | option_rom_offset = qemu_ram_alloc(size); |
766 | 970ac5a3 | bellard | ret = load_image(option_rom[i], phys_ram_base + option_rom_offset); |
767 | 970ac5a3 | bellard | if (ret != size) {
|
768 | 970ac5a3 | bellard | option_rom_error:
|
769 | 970ac5a3 | bellard | fprintf(stderr, "Too many option ROMS\n");
|
770 | 970ac5a3 | bellard | exit(1);
|
771 | 970ac5a3 | bellard | } |
772 | 970ac5a3 | bellard | size = (size + 4095) & ~4095; |
773 | 970ac5a3 | bellard | cpu_register_physical_memory(0xd0000 + offset,
|
774 | 970ac5a3 | bellard | size, option_rom_offset | IO_MEM_ROM); |
775 | 970ac5a3 | bellard | offset += size; |
776 | 970ac5a3 | bellard | } |
777 | 9ae02555 | ths | } |
778 | 9ae02555 | ths | |
779 | 7587cf44 | bellard | /* map all the bios at the top of memory */
|
780 | 7587cf44 | bellard | cpu_register_physical_memory((uint32_t)(-bios_size), |
781 | 7587cf44 | bellard | bios_size, bios_offset | IO_MEM_ROM); |
782 | 80cabfad | bellard | |
783 | 80cabfad | bellard | bochs_bios_init(); |
784 | 80cabfad | bellard | |
785 | 642a4f96 | ths | if (linux_boot)
|
786 | 642a4f96 | ths | load_linux(kernel_filename, initrd_filename, kernel_cmdline); |
787 | 80cabfad | bellard | |
788 | d537cf6c | pbrook | cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
|
789 | d537cf6c | pbrook | i8259 = i8259_init(cpu_irq[0]);
|
790 | d537cf6c | pbrook | ferr_irq = i8259[13];
|
791 | d537cf6c | pbrook | |
792 | 69b91039 | bellard | if (pci_enabled) {
|
793 | d537cf6c | pbrook | pci_bus = i440fx_init(&i440fx_state, i8259); |
794 | 8f1c91d8 | ths | piix3_devfn = piix3_init(pci_bus, -1);
|
795 | 46e50e9d | bellard | } else {
|
796 | 46e50e9d | bellard | pci_bus = NULL;
|
797 | 69b91039 | bellard | } |
798 | 69b91039 | bellard | |
799 | 80cabfad | bellard | /* init basic PC hardware */
|
800 | b41a2cd1 | bellard | register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
801 | 80cabfad | bellard | |
802 | f929aad6 | bellard | register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
803 | f929aad6 | bellard | |
804 | 1f04275e | bellard | if (cirrus_vga_enabled) {
|
805 | 1f04275e | bellard | if (pci_enabled) {
|
806 | 46e50e9d | bellard | pci_cirrus_vga_init(pci_bus, |
807 | 970ac5a3 | bellard | ds, phys_ram_base + vga_ram_addr, |
808 | 970ac5a3 | bellard | vga_ram_addr, vga_ram_size); |
809 | 1f04275e | bellard | } else {
|
810 | 970ac5a3 | bellard | isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr, |
811 | 970ac5a3 | bellard | vga_ram_addr, vga_ram_size); |
812 | 1f04275e | bellard | } |
813 | d34cab9f | ths | } else if (vmsvga_enabled) { |
814 | d34cab9f | ths | if (pci_enabled)
|
815 | d34cab9f | ths | pci_vmsvga_init(pci_bus, ds, phys_ram_base + ram_size, |
816 | d34cab9f | ths | ram_size, vga_ram_size); |
817 | d34cab9f | ths | else
|
818 | d34cab9f | ths | fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
|
819 | 1f04275e | bellard | } else {
|
820 | 89b6b508 | bellard | if (pci_enabled) {
|
821 | 970ac5a3 | bellard | pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr, |
822 | 970ac5a3 | bellard | vga_ram_addr, vga_ram_size, 0, 0); |
823 | 89b6b508 | bellard | } else {
|
824 | 970ac5a3 | bellard | isa_vga_init(ds, phys_ram_base + vga_ram_addr, |
825 | 970ac5a3 | bellard | vga_ram_addr, vga_ram_size); |
826 | 89b6b508 | bellard | } |
827 | 1f04275e | bellard | } |
828 | 80cabfad | bellard | |
829 | d537cf6c | pbrook | rtc_state = rtc_init(0x70, i8259[8]); |
830 | 80cabfad | bellard | |
831 | e1a23744 | bellard | register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
832 | e1a23744 | bellard | register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
833 | e1a23744 | bellard | |
834 | d592d303 | bellard | if (pci_enabled) {
|
835 | d592d303 | bellard | ioapic = ioapic_init(); |
836 | d592d303 | bellard | } |
837 | d537cf6c | pbrook | pit = pit_init(0x40, i8259[0]); |
838 | fd06c375 | bellard | pcspk_init(pit); |
839 | d592d303 | bellard | if (pci_enabled) {
|
840 | d592d303 | bellard | pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); |
841 | d592d303 | bellard | } |
842 | b41a2cd1 | bellard | |
843 | 8d11df9e | bellard | for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
844 | 8d11df9e | bellard | if (serial_hds[i]) {
|
845 | d537cf6c | pbrook | serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]); |
846 | 8d11df9e | bellard | } |
847 | 8d11df9e | bellard | } |
848 | b41a2cd1 | bellard | |
849 | 6508fe59 | bellard | for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
850 | 6508fe59 | bellard | if (parallel_hds[i]) {
|
851 | d537cf6c | pbrook | parallel_init(parallel_io[i], i8259[parallel_irq[i]], |
852 | d537cf6c | pbrook | parallel_hds[i]); |
853 | 6508fe59 | bellard | } |
854 | 6508fe59 | bellard | } |
855 | 6508fe59 | bellard | |
856 | a41b2ff2 | pbrook | for(i = 0; i < nb_nics; i++) { |
857 | a41b2ff2 | pbrook | nd = &nd_table[i]; |
858 | a41b2ff2 | pbrook | if (!nd->model) {
|
859 | a41b2ff2 | pbrook | if (pci_enabled) {
|
860 | a41b2ff2 | pbrook | nd->model = "ne2k_pci";
|
861 | a41b2ff2 | pbrook | } else {
|
862 | a41b2ff2 | pbrook | nd->model = "ne2k_isa";
|
863 | a41b2ff2 | pbrook | } |
864 | 69b91039 | bellard | } |
865 | a41b2ff2 | pbrook | if (strcmp(nd->model, "ne2k_isa") == 0) { |
866 | d537cf6c | pbrook | pc_init_ne2k_isa(nd, i8259); |
867 | a41b2ff2 | pbrook | } else if (pci_enabled) { |
868 | c4a7060c | blueswir1 | if (strcmp(nd->model, "?") == 0) |
869 | c4a7060c | blueswir1 | fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
|
870 | abcebc7e | ths | pci_nic_init(pci_bus, nd, -1);
|
871 | c4a7060c | blueswir1 | } else if (strcmp(nd->model, "?") == 0) { |
872 | c4a7060c | blueswir1 | fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
|
873 | c4a7060c | blueswir1 | exit(1);
|
874 | a41b2ff2 | pbrook | } else {
|
875 | a41b2ff2 | pbrook | fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
|
876 | a41b2ff2 | pbrook | exit(1);
|
877 | 69b91039 | bellard | } |
878 | a41b2ff2 | pbrook | } |
879 | b41a2cd1 | bellard | |
880 | a41b2ff2 | pbrook | if (pci_enabled) {
|
881 | d537cf6c | pbrook | pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1, i8259);
|
882 | a41b2ff2 | pbrook | } else {
|
883 | 69b91039 | bellard | for(i = 0; i < 2; i++) { |
884 | d537cf6c | pbrook | isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]], |
885 | 69b91039 | bellard | bs_table[2 * i], bs_table[2 * i + 1]); |
886 | 69b91039 | bellard | } |
887 | b41a2cd1 | bellard | } |
888 | 69b91039 | bellard | |
889 | d537cf6c | pbrook | i8042_init(i8259[1], i8259[12], 0x60); |
890 | 7c29d0c0 | bellard | DMA_init(0);
|
891 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
892 | d537cf6c | pbrook | audio_init(pci_enabled ? pci_bus : NULL, i8259);
|
893 | fb065187 | bellard | #endif
|
894 | 80cabfad | bellard | |
895 | d537cf6c | pbrook | floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd_table); |
896 | b41a2cd1 | bellard | |
897 | ba6c2377 | bellard | cmos_init(ram_size, boot_device, bs_table); |
898 | 69b91039 | bellard | |
899 | bb36d470 | bellard | if (pci_enabled && usb_enabled) {
|
900 | afcc3cdf | ths | usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
|
901 | bb36d470 | bellard | } |
902 | bb36d470 | bellard | |
903 | 6515b203 | bellard | if (pci_enabled && acpi_enabled) {
|
904 | 3fffc223 | ths | uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ |
905 | 0ff596d0 | pbrook | i2c_bus *smbus; |
906 | 0ff596d0 | pbrook | |
907 | 0ff596d0 | pbrook | /* TODO: Populate SPD eeprom data. */
|
908 | 7b717336 | ths | smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100); |
909 | 3fffc223 | ths | for (i = 0; i < 8; i++) { |
910 | 0ff596d0 | pbrook | smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256)); |
911 | 3fffc223 | ths | } |
912 | 6515b203 | bellard | } |
913 | a5954d5c | bellard | |
914 | a5954d5c | bellard | if (i440fx_state) {
|
915 | a5954d5c | bellard | i440fx_init_memory_mappings(i440fx_state); |
916 | a5954d5c | bellard | } |
917 | 96d30e48 | ths | #if 0
|
918 | 96d30e48 | ths | /* ??? Need to figure out some way for the user to
|
919 | 96d30e48 | ths | specify SCSI devices. */
|
920 | 7d8406be | pbrook | if (pci_enabled) {
|
921 | 7d8406be | pbrook | void *scsi;
|
922 | 96d30e48 | ths | BlockDriverState *bdrv;
|
923 | 96d30e48 | ths | |
924 | 96d30e48 | ths | scsi = lsi_scsi_init(pci_bus, -1);
|
925 | 96d30e48 | ths | bdrv = bdrv_new("scsidisk");
|
926 | 96d30e48 | ths | bdrv_open(bdrv, "scsi_disk.img", 0);
|
927 | 96d30e48 | ths | lsi_scsi_attach(scsi, bdrv, -1);
|
928 | 96d30e48 | ths | bdrv = bdrv_new("scsicd");
|
929 | 96d30e48 | ths | bdrv_open(bdrv, "scsi_cd.iso", 0);
|
930 | 96d30e48 | ths | bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM);
|
931 | 96d30e48 | ths | lsi_scsi_attach(scsi, bdrv, -1);
|
932 | 7d8406be | pbrook | }
|
933 | 96d30e48 | ths | #endif
|
934 | 80cabfad | bellard | } |
935 | b5ff2d6e | bellard | |
936 | 3dbbdc25 | bellard | static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device, |
937 | 3dbbdc25 | bellard | DisplayState *ds, const char **fd_filename, |
938 | 3dbbdc25 | bellard | int snapshot,
|
939 | 3dbbdc25 | bellard | const char *kernel_filename, |
940 | 3dbbdc25 | bellard | const char *kernel_cmdline, |
941 | 94fc95cd | j_mayer | const char *initrd_filename, |
942 | 94fc95cd | j_mayer | const char *cpu_model) |
943 | 3dbbdc25 | bellard | { |
944 | 3dbbdc25 | bellard | pc_init1(ram_size, vga_ram_size, boot_device, |
945 | 3dbbdc25 | bellard | ds, fd_filename, snapshot, |
946 | 3dbbdc25 | bellard | kernel_filename, kernel_cmdline, |
947 | 3dbbdc25 | bellard | initrd_filename, 1);
|
948 | 3dbbdc25 | bellard | } |
949 | 3dbbdc25 | bellard | |
950 | 3dbbdc25 | bellard | static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device, |
951 | 3dbbdc25 | bellard | DisplayState *ds, const char **fd_filename, |
952 | 3dbbdc25 | bellard | int snapshot,
|
953 | 3dbbdc25 | bellard | const char *kernel_filename, |
954 | 3dbbdc25 | bellard | const char *kernel_cmdline, |
955 | 94fc95cd | j_mayer | const char *initrd_filename, |
956 | 94fc95cd | j_mayer | const char *cpu_model) |
957 | 3dbbdc25 | bellard | { |
958 | 3dbbdc25 | bellard | pc_init1(ram_size, vga_ram_size, boot_device, |
959 | 3dbbdc25 | bellard | ds, fd_filename, snapshot, |
960 | 3dbbdc25 | bellard | kernel_filename, kernel_cmdline, |
961 | 3dbbdc25 | bellard | initrd_filename, 0);
|
962 | 3dbbdc25 | bellard | } |
963 | 3dbbdc25 | bellard | |
964 | b5ff2d6e | bellard | QEMUMachine pc_machine = { |
965 | b5ff2d6e | bellard | "pc",
|
966 | b5ff2d6e | bellard | "Standard PC",
|
967 | 3dbbdc25 | bellard | pc_init_pci, |
968 | 3dbbdc25 | bellard | }; |
969 | 3dbbdc25 | bellard | |
970 | 3dbbdc25 | bellard | QEMUMachine isapc_machine = { |
971 | 3dbbdc25 | bellard | "isapc",
|
972 | 3dbbdc25 | bellard | "ISA-only PC",
|
973 | 3dbbdc25 | bellard | pc_init_isa, |
974 | b5ff2d6e | bellard | }; |