root / hw / pci_host.h @ 7fc2f2c0
History | View | Annotate | Download (3.9 kB)
1 | 502a5395 | pbrook | /*
|
---|---|---|---|
2 | 502a5395 | pbrook | * QEMU Common PCI Host bridge configuration data space access routines.
|
3 | 502a5395 | pbrook | *
|
4 | 502a5395 | pbrook | * Copyright (c) 2006 Fabrice Bellard
|
5 | 5fafdf24 | ths | *
|
6 | 502a5395 | pbrook | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 | 502a5395 | pbrook | * of this software and associated documentation files (the "Software"), to deal
|
8 | 502a5395 | pbrook | * in the Software without restriction, including without limitation the rights
|
9 | 502a5395 | pbrook | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 | 502a5395 | pbrook | * copies of the Software, and to permit persons to whom the Software is
|
11 | 502a5395 | pbrook | * furnished to do so, subject to the following conditions:
|
12 | 502a5395 | pbrook | *
|
13 | 502a5395 | pbrook | * The above copyright notice and this permission notice shall be included in
|
14 | 502a5395 | pbrook | * all copies or substantial portions of the Software.
|
15 | 502a5395 | pbrook | *
|
16 | 502a5395 | pbrook | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 | 502a5395 | pbrook | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 | 502a5395 | pbrook | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 | 502a5395 | pbrook | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 | 502a5395 | pbrook | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 | 502a5395 | pbrook | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 | 502a5395 | pbrook | * THE SOFTWARE.
|
23 | 502a5395 | pbrook | */
|
24 | 502a5395 | pbrook | |
25 | 502a5395 | pbrook | /* Worker routines for a PCI host controller that uses an {address,data}
|
26 | 502a5395 | pbrook | register pair to access PCI configuration space. */
|
27 | 502a5395 | pbrook | |
28 | 8026037b | blueswir1 | /* debug PCI */
|
29 | 8026037b | blueswir1 | //#define DEBUG_PCI
|
30 | 8026037b | blueswir1 | |
31 | 8a14daa5 | Gerd Hoffmann | #include "sysbus.h" |
32 | 8a14daa5 | Gerd Hoffmann | |
33 | 8026037b | blueswir1 | #ifdef DEBUG_PCI
|
34 | 001faf32 | Blue Swirl | #define PCI_DPRINTF(fmt, ...) \
|
35 | 001faf32 | Blue Swirl | do { printf("pci_host_data: " fmt , ## __VA_ARGS__); } while (0) |
36 | 8026037b | blueswir1 | #else
|
37 | 001faf32 | Blue Swirl | #define PCI_DPRINTF(fmt, ...)
|
38 | 8026037b | blueswir1 | #endif
|
39 | 8026037b | blueswir1 | |
40 | 502a5395 | pbrook | typedef struct { |
41 | 8a14daa5 | Gerd Hoffmann | SysBusDevice busdev; |
42 | 502a5395 | pbrook | uint32_t config_reg; |
43 | 502a5395 | pbrook | PCIBus *bus; |
44 | 502a5395 | pbrook | } PCIHostState; |
45 | 502a5395 | pbrook | |
46 | 502a5395 | pbrook | static void pci_host_data_writeb(void* opaque, pci_addr_t addr, uint32_t val) |
47 | 502a5395 | pbrook | { |
48 | 502a5395 | pbrook | PCIHostState *s = opaque; |
49 | 8026037b | blueswir1 | |
50 | 8026037b | blueswir1 | PCI_DPRINTF("writeb addr " TARGET_FMT_plx " val %x\n", |
51 | 8026037b | blueswir1 | (target_phys_addr_t)addr, val); |
52 | 502a5395 | pbrook | if (s->config_reg & (1u << 31)) |
53 | 502a5395 | pbrook | pci_data_write(s->bus, s->config_reg | (addr & 3), val, 1); |
54 | 502a5395 | pbrook | } |
55 | 502a5395 | pbrook | |
56 | 502a5395 | pbrook | static void pci_host_data_writew(void* opaque, pci_addr_t addr, uint32_t val) |
57 | 502a5395 | pbrook | { |
58 | 502a5395 | pbrook | PCIHostState *s = opaque; |
59 | 502a5395 | pbrook | #ifdef TARGET_WORDS_BIGENDIAN
|
60 | 502a5395 | pbrook | val = bswap16(val); |
61 | 502a5395 | pbrook | #endif
|
62 | 8026037b | blueswir1 | PCI_DPRINTF("writew addr " TARGET_FMT_plx " val %x\n", |
63 | 8026037b | blueswir1 | (target_phys_addr_t)addr, val); |
64 | 502a5395 | pbrook | if (s->config_reg & (1u << 31)) |
65 | 502a5395 | pbrook | pci_data_write(s->bus, s->config_reg | (addr & 3), val, 2); |
66 | 502a5395 | pbrook | } |
67 | 502a5395 | pbrook | |
68 | 502a5395 | pbrook | static void pci_host_data_writel(void* opaque, pci_addr_t addr, uint32_t val) |
69 | 502a5395 | pbrook | { |
70 | 502a5395 | pbrook | PCIHostState *s = opaque; |
71 | 502a5395 | pbrook | #ifdef TARGET_WORDS_BIGENDIAN
|
72 | 502a5395 | pbrook | val = bswap32(val); |
73 | 502a5395 | pbrook | #endif
|
74 | 8026037b | blueswir1 | PCI_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", |
75 | 8026037b | blueswir1 | (target_phys_addr_t)addr, val); |
76 | 502a5395 | pbrook | if (s->config_reg & (1u << 31)) |
77 | 502a5395 | pbrook | pci_data_write(s->bus, s->config_reg, val, 4);
|
78 | 502a5395 | pbrook | } |
79 | 502a5395 | pbrook | |
80 | 502a5395 | pbrook | static uint32_t pci_host_data_readb(void* opaque, pci_addr_t addr) |
81 | 502a5395 | pbrook | { |
82 | 502a5395 | pbrook | PCIHostState *s = opaque; |
83 | 8026037b | blueswir1 | uint32_t val; |
84 | 8026037b | blueswir1 | |
85 | 502a5395 | pbrook | if (!(s->config_reg & (1 << 31))) |
86 | 502a5395 | pbrook | return 0xff; |
87 | 8026037b | blueswir1 | val = pci_data_read(s->bus, s->config_reg | (addr & 3), 1); |
88 | 8026037b | blueswir1 | PCI_DPRINTF("readb addr " TARGET_FMT_plx " val %x\n", |
89 | 8026037b | blueswir1 | (target_phys_addr_t)addr, val); |
90 | 8026037b | blueswir1 | return val;
|
91 | 502a5395 | pbrook | } |
92 | 502a5395 | pbrook | |
93 | 502a5395 | pbrook | static uint32_t pci_host_data_readw(void* opaque, pci_addr_t addr) |
94 | 502a5395 | pbrook | { |
95 | 502a5395 | pbrook | PCIHostState *s = opaque; |
96 | 502a5395 | pbrook | uint32_t val; |
97 | 502a5395 | pbrook | if (!(s->config_reg & (1 << 31))) |
98 | 502a5395 | pbrook | return 0xffff; |
99 | 502a5395 | pbrook | val = pci_data_read(s->bus, s->config_reg | (addr & 3), 2); |
100 | 8026037b | blueswir1 | PCI_DPRINTF("readw addr " TARGET_FMT_plx " val %x\n", |
101 | 8026037b | blueswir1 | (target_phys_addr_t)addr, val); |
102 | 502a5395 | pbrook | #ifdef TARGET_WORDS_BIGENDIAN
|
103 | 502a5395 | pbrook | val = bswap16(val); |
104 | 502a5395 | pbrook | #endif
|
105 | 502a5395 | pbrook | return val;
|
106 | 502a5395 | pbrook | } |
107 | 502a5395 | pbrook | |
108 | 502a5395 | pbrook | static uint32_t pci_host_data_readl(void* opaque, pci_addr_t addr) |
109 | 502a5395 | pbrook | { |
110 | 502a5395 | pbrook | PCIHostState *s = opaque; |
111 | 502a5395 | pbrook | uint32_t val; |
112 | 502a5395 | pbrook | if (!(s->config_reg & (1 << 31))) |
113 | 502a5395 | pbrook | return 0xffffffff; |
114 | 502a5395 | pbrook | val = pci_data_read(s->bus, s->config_reg | (addr & 3), 4); |
115 | 8026037b | blueswir1 | PCI_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", |
116 | 8026037b | blueswir1 | (target_phys_addr_t)addr, val); |
117 | 502a5395 | pbrook | #ifdef TARGET_WORDS_BIGENDIAN
|
118 | 502a5395 | pbrook | val = bswap32(val); |
119 | 502a5395 | pbrook | #endif
|
120 | 502a5395 | pbrook | return val;
|
121 | 502a5395 | pbrook | } |