Archipelago » qemu

/*

 * QEMU float support

 *

 * Derived from SoftFloat.

 */

/*============================================================================

This C source file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic

Package, Release 2b.

Written by John R. Hauser.  This work was made possible in part by the

International Computer Science Institute, located at Suite 600, 1947 Center

Street, Berkeley, California 94704.  Funding was partially provided by the

National Science Foundation under grant MIP-9311980.  The original version

of this code was written as part of a project to build a fixed-point vector

processor in collaboration with the University of California at Berkeley,

overseen by Profs. Nelson Morgan and John Wawrzynek.  More information

is available through the Web page `http://www.cs.berkeley.edu/~jhauser/

arithmetic/SoftFloat.html'.

THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort has

been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES

RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS

AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,

COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE

EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE

INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR

OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.

Derivative works are acceptable, even for commercial purposes, so long as

(1) the source code for the derivative work includes prominent notice that

the work is derivative, and (2) the source code includes prominent notice with

these four paragraphs for those parts of this code that are retained.

=============================================================================*/

#include "softfloat.h"

/*----------------------------------------------------------------------------

| Primitive arithmetic functions, including multi-word arithmetic, and

| division and square root approximations.  (Can be specialized to target if

| desired.)

*----------------------------------------------------------------------------*/

#include "softfloat-macros.h"

/*----------------------------------------------------------------------------

| Functions and definitions to determine:  (1) whether tininess for underflow

| is detected before or after rounding by default, (2) what (if anything)

| happens when exceptions are raised, (3) how signaling NaNs are distinguished

| from quiet NaNs, (4) the default generated quiet NaNs, and (5) how NaNs

| are propagated from function inputs to output.  These details are target-

| specific.

*----------------------------------------------------------------------------*/

#include "softfloat-specialize.h"

void set_float_rounding_mode(int val STATUS_PARAM)

{

    STATUS(float_rounding_mode) = val;

}

void set_float_exception_flags(int val STATUS_PARAM)

{

    STATUS(float_exception_flags) = val;

}

void set_floatx80_rounding_precision(int val STATUS_PARAM)

{

    STATUS(floatx80_rounding_precision) = val;

}

/*----------------------------------------------------------------------------

| Returns the fraction bits of the half-precision floating-point value `a'.

*----------------------------------------------------------------------------*/

INLINE uint32_t extractFloat16Frac(float16 a)

{

    return float16_val(a) & 0x3ff;

}

/*----------------------------------------------------------------------------

| Returns the exponent bits of the half-precision floating-point value `a'.

*----------------------------------------------------------------------------*/

INLINE int16 extractFloat16Exp(float16 a)

{

    return (float16_val(a) >> 10) & 0x1f;

}

/*----------------------------------------------------------------------------

| Returns the sign bit of the single-precision floating-point value `a'.

*----------------------------------------------------------------------------*/

INLINE flag extractFloat16Sign(float16 a)

{

    return float16_val(a)>>15;

}

/*----------------------------------------------------------------------------

| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6

| and 7, and returns the properly rounded 32-bit integer corresponding to the

| input.  If `zSign' is 1, the input is negated before being converted to an

| integer.  Bit 63 of `absZ' must be zero.  Ordinarily, the fixed-point input

| is simply rounded to an integer, with the inexact exception raised if the

| input cannot be represented exactly as an integer.  However, if the fixed-

| point input is too large, the invalid exception is raised and the largest

| positive or negative integer is returned.

*----------------------------------------------------------------------------*/

static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM)

{

    int8 roundingMode;

    flag roundNearestEven;

    int8 roundIncrement, roundBits;

    int32 z;

    roundingMode = STATUS(float_rounding_mode);

    roundNearestEven = ( roundingMode == float_round_nearest_even );

    roundIncrement = 0x40;

    if ( ! roundNearestEven ) {

        if ( roundingMode == float_round_to_zero ) {

            roundIncrement = 0;

        }

        else {

            roundIncrement = 0x7F;

            if ( zSign ) {

                if ( roundingMode == float_round_up ) roundIncrement = 0;

            }

            else {

                if ( roundingMode == float_round_down ) roundIncrement = 0;

            }

        }

    }

    roundBits = absZ & 0x7F;

    absZ = ( absZ + roundIncrement )>>7;

    absZ &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );

    z = absZ;

    if ( zSign ) z = - z;

    if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {

        float_raise( float_flag_invalid STATUS_VAR);

        return zSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;

    }

    if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact;

    return z;

}

/*----------------------------------------------------------------------------

| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and

| `absZ1', with binary point between bits 63 and 64 (between the input words),

| and returns the properly rounded 64-bit integer corresponding to the input.

| If `zSign' is 1, the input is negated before being converted to an integer.

| Ordinarily, the fixed-point input is simply rounded to an integer, with

| the inexact exception raised if the input cannot be represented exactly as

| an integer.  However, if the fixed-point input is too large, the invalid

| exception is raised and the largest positive or negative integer is

| returned.

*----------------------------------------------------------------------------*/

static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 STATUS_PARAM)

{

    int8 roundingMode;

    flag roundNearestEven, increment;

    int64 z;

    roundingMode = STATUS(float_rounding_mode);

    roundNearestEven = ( roundingMode == float_round_nearest_even );

    increment = ( (int64_t) absZ1 < 0 );

    if ( ! roundNearestEven ) {

        if ( roundingMode == float_round_to_zero ) {

            increment = 0;

        }

        else {

            if ( zSign ) {

                increment = ( roundingMode == float_round_down ) && absZ1;

            }

            else {

                increment = ( roundingMode == float_round_up ) && absZ1;

            }

        }

    }

    if ( increment ) {

        ++absZ0;

        if ( absZ0 == 0 ) goto overflow;

        absZ0 &= ~ ( ( (uint64_t) ( absZ1<<1 ) == 0 ) & roundNearestEven );

    }

    z = absZ0;

    if ( zSign ) z = - z;

    if ( z && ( ( z < 0 ) ^ zSign ) ) {

 overflow:

        float_raise( float_flag_invalid STATUS_VAR);

        return

              zSign ? (int64_t) LIT64( 0x8000000000000000 )

            : LIT64( 0x7FFFFFFFFFFFFFFF );

    }

    if ( absZ1 ) STATUS(float_exception_flags) |= float_flag_inexact;

    return z;

}

/*----------------------------------------------------------------------------

| Returns the fraction bits of the single-precision floating-point value `a'.

*----------------------------------------------------------------------------*/

INLINE uint32_t extractFloat32Frac( float32 a )

{

    return float32_val(a) & 0x007FFFFF;

}

/*----------------------------------------------------------------------------

| Returns the exponent bits of the single-precision floating-point value `a'.

*----------------------------------------------------------------------------*/

INLINE int16 extractFloat32Exp( float32 a )

{

    return ( float32_val(a)>>23 ) & 0xFF;

}

/*----------------------------------------------------------------------------

| Returns the sign bit of the single-precision floating-point value `a'.

*----------------------------------------------------------------------------*/

INLINE flag extractFloat32Sign( float32 a )

{

    return float32_val(a)>>31;

}

/*----------------------------------------------------------------------------

| If `a' is denormal and we are in flush-to-zero mode then set the

| input-denormal exception and return zero. Otherwise just return the value.

*----------------------------------------------------------------------------*/

static float32 float32_squash_input_denormal(float32 a STATUS_PARAM)

{

    if (STATUS(flush_inputs_to_zero)) {

        if (extractFloat32Exp(a) == 0 && extractFloat32Frac(a) != 0) {

            float_raise(float_flag_input_denormal STATUS_VAR);

            return make_float32(float32_val(a) & 0x80000000);

        }

    }

    return a;

}

/*----------------------------------------------------------------------------

| Normalizes the subnormal single-precision floating-point value represented

| by the denormalized significand `aSig'.  The normalized exponent and

| significand are stored at the locations pointed to by `zExpPtr' and

| `zSigPtr', respectively.

*----------------------------------------------------------------------------*/

static void

 normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr )

{

    int8 shiftCount;

    shiftCount = countLeadingZeros32( aSig ) - 8;

    *zSigPtr = aSig<<shiftCount;

    *zExpPtr = 1 - shiftCount;

}

/*----------------------------------------------------------------------------

| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a

| single-precision floating-point value, returning the result.  After being

| shifted into the proper positions, the three fields are simply added

| together to form the result.  This means that any integer portion of `zSig'

| will be added into the exponent.  Since a properly normalized significand

| will have an integer portion equal to 1, the `zExp' input should be 1 less

| than the desired result exponent whenever `zSig' is a complete, normalized

| significand.

*----------------------------------------------------------------------------*/

INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig )

{

    return make_float32(

          ( ( (uint32_t) zSign )<<31 ) + ( ( (uint32_t) zExp )<<23 ) + zSig);

}

/*----------------------------------------------------------------------------

| Takes an abstract floating-point value having sign `zSign', exponent `zExp',

| and significand `zSig', and returns the proper single-precision floating-

| point value corresponding to the abstract input.  Ordinarily, the abstract

| value is simply rounded and packed into the single-precision format, with

| the inexact exception raised if the abstract input cannot be represented

| exactly.  However, if the abstract value is too large, the overflow and

| inexact exceptions are raised and an infinity or maximal finite value is

| returned.  If the abstract value is too small, the input value is rounded to

| a subnormal number, and the underflow and inexact exceptions are raised if

| the abstract input cannot be represented exactly as a subnormal single-

| precision floating-point number.

|     The input significand `zSig' has its binary point between bits 30

| and 29, which is 7 bits to the left of the usual location.  This shifted

| significand must be normalized or smaller.  If `zSig' is not normalized,

| `zExp' must be 0; in that case, the result returned is a subnormal number,

| and it must not require rounding.  In the usual case that `zSig' is

| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.

| The handling of underflow and overflow follows the IEC/IEEE Standard for

| Binary Floating-Point Arithmetic.

*----------------------------------------------------------------------------*/

static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM)

{

    int8 roundingMode;

    flag roundNearestEven;

    int8 roundIncrement, roundBits;

    flag isTiny;

    roundingMode = STATUS(float_rounding_mode);

    roundNearestEven = ( roundingMode == float_round_nearest_even );

    roundIncrement = 0x40;

    if ( ! roundNearestEven ) {

        if ( roundingMode == float_round_to_zero ) {

            roundIncrement = 0;

        }

        else {

            roundIncrement = 0x7F;

            if ( zSign ) {

                if ( roundingMode == float_round_up ) roundIncrement = 0;

            }

            else {

                if ( roundingMode == float_round_down ) roundIncrement = 0;

            }

        }

    }

    roundBits = zSig & 0x7F;

    if ( 0xFD <= (uint16_t) zExp ) {

        if (    ( 0xFD < zExp )

             || (    ( zExp == 0xFD )

                  && ( (int32_t) ( zSig + roundIncrement ) < 0 ) )

           ) {

            float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR);

            return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 ));

        }

        if ( zExp < 0 ) {

            if (STATUS(flush_to_zero)) {

                float_raise(float_flag_output_denormal STATUS_VAR);

                return packFloat32(zSign, 0, 0);

            }

            isTiny =

                   ( STATUS(float_detect_tininess) == float_tininess_before_rounding )

                || ( zExp < -1 )

                || ( zSig + roundIncrement < 0x80000000 );

            shift32RightJamming( zSig, - zExp, &zSig );

            zExp = 0;

            roundBits = zSig & 0x7F;

            if ( isTiny && roundBits ) float_raise( float_flag_underflow STATUS_VAR);

        }

    }

    if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact;

    zSig = ( zSig + roundIncrement )>>7;

    zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );

    if ( zSig == 0 ) zExp = 0;

    return packFloat32( zSign, zExp, zSig );

}

/*----------------------------------------------------------------------------

| Takes an abstract floating-point value having sign `zSign', exponent `zExp',

| and significand `zSig', and returns the proper single-precision floating-

| point value corresponding to the abstract input.  This routine is just like

| `roundAndPackFloat32' except that `zSig' does not have to be normalized.

| Bit 31 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''

| floating-point exponent.

*----------------------------------------------------------------------------*/

static float32

 normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM)

{

    int8 shiftCount;

    shiftCount = countLeadingZeros32( zSig ) - 1;

    return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount STATUS_VAR);

}

/*----------------------------------------------------------------------------

| Returns the fraction bits of the double-precision floating-point value `a'.

*----------------------------------------------------------------------------*/

INLINE uint64_t extractFloat64Frac( float64 a )

{

    return float64_val(a) & LIT64( 0x000FFFFFFFFFFFFF );

}

/*----------------------------------------------------------------------------

| Returns the exponent bits of the double-precision floating-point value `a'.

*----------------------------------------------------------------------------*/

INLINE int16 extractFloat64Exp( float64 a )

{

    return ( float64_val(a)>>52 ) & 0x7FF;

}

/*----------------------------------------------------------------------------

| Returns the sign bit of the double-precision floating-point value `a'.

*----------------------------------------------------------------------------*/

INLINE flag extractFloat64Sign( float64 a )

{

    return float64_val(a)>>63;

}

/*----------------------------------------------------------------------------

| If `a' is denormal and we are in flush-to-zero mode then set the

| input-denormal exception and return zero. Otherwise just return the value.

*----------------------------------------------------------------------------*/

static float64 float64_squash_input_denormal(float64 a STATUS_PARAM)

{

    if (STATUS(flush_inputs_to_zero)) {

        if (extractFloat64Exp(a) == 0 && extractFloat64Frac(a) != 0) {

            float_raise(float_flag_input_denormal STATUS_VAR);

            return make_float64(float64_val(a) & (1ULL << 63));

        }

    }

    return a;

}

/*----------------------------------------------------------------------------

| Normalizes the subnormal double-precision floating-point value represented

| by the denormalized significand `aSig'.  The normalized exponent and

| significand are stored at the locations pointed to by `zExpPtr' and

| `zSigPtr', respectively.

*----------------------------------------------------------------------------*/

static void

 normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr )

{

    int8 shiftCount;

    shiftCount = countLeadingZeros64( aSig ) - 11;

    *zSigPtr = aSig<<shiftCount;

    *zExpPtr = 1 - shiftCount;

}

/*----------------------------------------------------------------------------

| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a

| double-precision floating-point value, returning the result.  After being

| shifted into the proper positions, the three fields are simply added

| together to form the result.  This means that any integer portion of `zSig'

| will be added into the exponent.  Since a properly normalized significand

| will have an integer portion equal to 1, the `zExp' input should be 1 less

| than the desired result exponent whenever `zSig' is a complete, normalized

| significand.

*----------------------------------------------------------------------------*/

INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig )

{

    return make_float64(

        ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<52 ) + zSig);

}

/*----------------------------------------------------------------------------

| Takes an abstract floating-point value having sign `zSign', exponent `zExp',

| and significand `zSig', and returns the proper double-precision floating-

| point value corresponding to the abstract input.  Ordinarily, the abstract

| value is simply rounded and packed into the double-precision format, with

| the inexact exception raised if the abstract input cannot be represented

| exactly.  However, if the abstract value is too large, the overflow and

| inexact exceptions are raised and an infinity or maximal finite value is

| returned.  If the abstract value is too small, the input value is rounded

| to a subnormal number, and the underflow and inexact exceptions are raised

| if the abstract input cannot be represented exactly as a subnormal double-

| precision floating-point number.

|     The input significand `zSig' has its binary point between bits 62

| and 61, which is 10 bits to the left of the usual location.  This shifted

| significand must be normalized or smaller.  If `zSig' is not normalized,

| `zExp' must be 0; in that case, the result returned is a subnormal number,

| and it must not require rounding.  In the usual case that `zSig' is

| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.

| The handling of underflow and overflow follows the IEC/IEEE Standard for

| Binary Floating-Point Arithmetic.

*----------------------------------------------------------------------------*/

static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM)

{

    int8 roundingMode;

    flag roundNearestEven;

    int16 roundIncrement, roundBits;

    flag isTiny;

    roundingMode = STATUS(float_rounding_mode);

    roundNearestEven = ( roundingMode == float_round_nearest_even );

    roundIncrement = 0x200;

    if ( ! roundNearestEven ) {

        if ( roundingMode == float_round_to_zero ) {

            roundIncrement = 0;

        }

        else {

            roundIncrement = 0x3FF;

            if ( zSign ) {

                if ( roundingMode == float_round_up ) roundIncrement = 0;

            }

            else {

                if ( roundingMode == float_round_down ) roundIncrement = 0;

            }

        }

    }

    roundBits = zSig & 0x3FF;

    if ( 0x7FD <= (uint16_t) zExp ) {

        if (    ( 0x7FD < zExp )

             || (    ( zExp == 0x7FD )

                  && ( (int64_t) ( zSig + roundIncrement ) < 0 ) )

           ) {

            float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR);

            return packFloat64( zSign, 0x7FF, - ( roundIncrement == 0 ));

        }

        if ( zExp < 0 ) {

            if (STATUS(flush_to_zero)) {

                float_raise(float_flag_output_denormal STATUS_VAR);

                return packFloat64(zSign, 0, 0);

            }

            isTiny =

                   ( STATUS(float_detect_tininess) == float_tininess_before_rounding )

                || ( zExp < -1 )

                || ( zSig + roundIncrement < LIT64( 0x8000000000000000 ) );

            shift64RightJamming( zSig, - zExp, &zSig );

            zExp = 0;

            roundBits = zSig & 0x3FF;

            if ( isTiny && roundBits ) float_raise( float_flag_underflow STATUS_VAR);

        }

    }

    if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact;

    zSig = ( zSig + roundIncrement )>>10;

    zSig &= ~ ( ( ( roundBits ^ 0x200 ) == 0 ) & roundNearestEven );

    if ( zSig == 0 ) zExp = 0;

    return packFloat64( zSign, zExp, zSig );

}

/*----------------------------------------------------------------------------

| Takes an abstract floating-point value having sign `zSign', exponent `zExp',

| and significand `zSig', and returns the proper double-precision floating-

| point value corresponding to the abstract input.  This routine is just like

| `roundAndPackFloat64' except that `zSig' does not have to be normalized.

| Bit 63 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''

| floating-point exponent.

*----------------------------------------------------------------------------*/

static float64

 normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM)

{

    int8 shiftCount;

    shiftCount = countLeadingZeros64( zSig ) - 1;

    return roundAndPackFloat64( zSign, zExp - shiftCount, zSig<<shiftCount STATUS_VAR);

}

/*----------------------------------------------------------------------------

| Returns the fraction bits of the extended double-precision floating-point

| value `a'.

*----------------------------------------------------------------------------*/

INLINE uint64_t extractFloatx80Frac( floatx80 a )

{

    return a.low;

}

/*----------------------------------------------------------------------------

| Returns the exponent bits of the extended double-precision floating-point

| value `a'.

*----------------------------------------------------------------------------*/

INLINE int32 extractFloatx80Exp( floatx80 a )

{

    return a.high & 0x7FFF;

}

/*----------------------------------------------------------------------------

| Returns the sign bit of the extended double-precision floating-point value

| `a'.

*----------------------------------------------------------------------------*/

INLINE flag extractFloatx80Sign( floatx80 a )

{

    return a.high>>15;

}

/*----------------------------------------------------------------------------

| Normalizes the subnormal extended double-precision floating-point value

| represented by the denormalized significand `aSig'.  The normalized exponent

| and significand are stored at the locations pointed to by `zExpPtr' and

| `zSigPtr', respectively.

*----------------------------------------------------------------------------*/

static void

 normalizeFloatx80Subnormal( uint64_t aSig, int32 *zExpPtr, uint64_t *zSigPtr )

{

    int8 shiftCount;

    shiftCount = countLeadingZeros64( aSig );

    *zSigPtr = aSig<<shiftCount;

    *zExpPtr = 1 - shiftCount;

}

/*----------------------------------------------------------------------------

| Packs the sign `zSign', exponent `zExp', and significand `zSig' into an

| extended double-precision floating-point value, returning the result.

*----------------------------------------------------------------------------*/

INLINE floatx80 packFloatx80( flag zSign, int32 zExp, uint64_t zSig )

{

    floatx80 z;

    z.low = zSig;

    z.high = ( ( (uint16_t) zSign )<<15 ) + zExp;

    return z;

}

/*----------------------------------------------------------------------------

| Takes an abstract floating-point value having sign `zSign', exponent `zExp',

| and extended significand formed by the concatenation of `zSig0' and `zSig1',

| and returns the proper extended double-precision floating-point value

| corresponding to the abstract input.  Ordinarily, the abstract value is

| rounded and packed into the extended double-precision format, with the

| inexact exception raised if the abstract input cannot be represented

| exactly.  However, if the abstract value is too large, the overflow and

| inexact exceptions are raised and an infinity or maximal finite value is

| returned.  If the abstract value is too small, the input value is rounded to

| a subnormal number, and the underflow and inexact exceptions are raised if

| the abstract input cannot be represented exactly as a subnormal extended

| double-precision floating-point number.

|     If `roundingPrecision' is 32 or 64, the result is rounded to the same

| number of bits as single or double precision, respectively.  Otherwise, the

| result is rounded to the full precision of the extended double-precision

| format.

|     The input significand must be normalized or smaller.  If the input

| significand is not normalized, `zExp' must be 0; in that case, the result

| returned is a subnormal number, and it must not require rounding.  The

| handling of underflow and overflow follows the IEC/IEEE Standard for Binary

| Floating-Point Arithmetic.

*----------------------------------------------------------------------------*/

static floatx80

 roundAndPackFloatx80(

     int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1

 STATUS_PARAM)

{

    int8 roundingMode;

    flag roundNearestEven, increment, isTiny;

    int64 roundIncrement, roundMask, roundBits;

    roundingMode = STATUS(float_rounding_mode);

    roundNearestEven = ( roundingMode == float_round_nearest_even );

    if ( roundingPrecision == 80 ) goto precision80;

    if ( roundingPrecision == 64 ) {

        roundIncrement = LIT64( 0x0000000000000400 );

        roundMask = LIT64( 0x00000000000007FF );

    }

    else if ( roundingPrecision == 32 ) {

        roundIncrement = LIT64( 0x0000008000000000 );

        roundMask = LIT64( 0x000000FFFFFFFFFF );

    }

    else {

        goto precision80;

    }

    zSig0 |= ( zSig1 != 0 );

    if ( ! roundNearestEven ) {

        if ( roundingMode == float_round_to_zero ) {

            roundIncrement = 0;

        }

        else {

            roundIncrement = roundMask;

            if ( zSign ) {

                if ( roundingMode == float_round_up ) roundIncrement = 0;

            }

            else {

                if ( roundingMode == float_round_down ) roundIncrement = 0;

            }

        }

    }

    roundBits = zSig0 & roundMask;

    if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {

        if (    ( 0x7FFE < zExp )

             || ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) )

           ) {

            goto overflow;

        }

        if ( zExp <= 0 ) {

            if (STATUS(flush_to_zero)) {

                float_raise(float_flag_output_denormal STATUS_VAR);

                return packFloatx80(zSign, 0, 0);

            }

            isTiny =

                   ( STATUS(float_detect_tininess) == float_tininess_before_rounding )

                || ( zExp < 0 )

                || ( zSig0 <= zSig0 + roundIncrement );

            shift64RightJamming( zSig0, 1 - zExp, &zSig0 );

            zExp = 0;

            roundBits = zSig0 & roundMask;

            if ( isTiny && roundBits ) float_raise( float_flag_underflow STATUS_VAR);

            if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact;

            zSig0 += roundIncrement;

            if ( (int64_t) zSig0 < 0 ) zExp = 1;

            roundIncrement = roundMask + 1;

            if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {

                roundMask |= roundIncrement;

            }

            zSig0 &= ~ roundMask;

            return packFloatx80( zSign, zExp, zSig0 );

        }

    }

    if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact;

    zSig0 += roundIncrement;

    if ( zSig0 < roundIncrement ) {

        ++zExp;

        zSig0 = LIT64( 0x8000000000000000 );

    }

    roundIncrement = roundMask + 1;

    if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {

        roundMask |= roundIncrement;

    }

    zSig0 &= ~ roundMask;

    if ( zSig0 == 0 ) zExp = 0;

    return packFloatx80( zSign, zExp, zSig0 );

 precision80:

    increment = ( (int64_t) zSig1 < 0 );

    if ( ! roundNearestEven ) {

        if ( roundingMode == float_round_to_zero ) {

            increment = 0;

        }

        else {

            if ( zSign ) {

                increment = ( roundingMode == float_round_down ) && zSig1;

            }

            else {

                increment = ( roundingMode == float_round_up ) && zSig1;

            }

        }

    }

    if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {

        if (    ( 0x7FFE < zExp )

             || (    ( zExp == 0x7FFE )

                  && ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) )

                  && increment

                )

           ) {

            roundMask = 0;

 overflow:

            float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR);

            if (    ( roundingMode == float_round_to_zero )

                 || ( zSign && ( roundingMode == float_round_up ) )

                 || ( ! zSign && ( roundingMode == float_round_down ) )

               ) {

                return packFloatx80( zSign, 0x7FFE, ~ roundMask );

            }

            return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );

        }

        if ( zExp <= 0 ) {

            isTiny =

                   ( STATUS(float_detect_tininess) == float_tininess_before_rounding )

                || ( zExp < 0 )

                || ! increment

                || ( zSig0 < LIT64( 0xFFFFFFFFFFFFFFFF ) );

            shift64ExtraRightJamming( zSig0, zSig1, 1 - zExp, &zSig0, &zSig1 );

            zExp = 0;

            if ( isTiny && zSig1 ) float_raise( float_flag_underflow STATUS_VAR);

            if ( zSig1 ) STATUS(float_exception_flags) |= float_flag_inexact;

            if ( roundNearestEven ) {

                increment = ( (int64_t) zSig1 < 0 );

            }

            else {

                if ( zSign ) {

                    increment = ( roundingMode == float_round_down ) && zSig1;

                }

                else {

                    increment = ( roundingMode == float_round_up ) && zSig1;

                }

            }

            if ( increment ) {

                ++zSig0;

                zSig0 &=

                    ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );

                if ( (int64_t) zSig0 < 0 ) zExp = 1;

            }

            return packFloatx80( zSign, zExp, zSig0 );

        }

    }

    if ( zSig1 ) STATUS(float_exception_flags) |= float_flag_inexact;

    if ( increment ) {

        ++zSig0;

        if ( zSig0 == 0 ) {

            ++zExp;

            zSig0 = LIT64( 0x8000000000000000 );

        }

        else {

            zSig0 &= ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );

        }

    }

    else {

        if ( zSig0 == 0 ) zExp = 0;

    }

    return packFloatx80( zSign, zExp, zSig0 );

}

/*----------------------------------------------------------------------------

| Takes an abstract floating-point value having sign `zSign', exponent

| `zExp', and significand formed by the concatenation of `zSig0' and `zSig1',

| and returns the proper extended double-precision floating-point value

| corresponding to the abstract input.  This routine is just like

| `roundAndPackFloatx80' except that the input significand does not have to be

| normalized.

*----------------------------------------------------------------------------*/

static floatx80

 normalizeRoundAndPackFloatx80(

     int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1

 STATUS_PARAM)

{

    int8 shiftCount;

    if ( zSig0 == 0 ) {

        zSig0 = zSig1;

        zSig1 = 0;

        zExp -= 64;

    }

    shiftCount = countLeadingZeros64( zSig0 );

    shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );

    zExp -= shiftCount;

    return

        roundAndPackFloatx80( roundingPrecision, zSign, zExp, zSig0, zSig1 STATUS_VAR);

}

/*----------------------------------------------------------------------------

| Returns the least-significant 64 fraction bits of the quadruple-precision

| floating-point value `a'.

*----------------------------------------------------------------------------*/

INLINE uint64_t extractFloat128Frac1( float128 a )

{

    return a.low;

}

/*----------------------------------------------------------------------------

| Returns the most-significant 48 fraction bits of the quadruple-precision

| floating-point value `a'.

*----------------------------------------------------------------------------*/

INLINE uint64_t extractFloat128Frac0( float128 a )

{

    return a.high & LIT64( 0x0000FFFFFFFFFFFF );

}

/*----------------------------------------------------------------------------

| Returns the exponent bits of the quadruple-precision floating-point value

| `a'.

*----------------------------------------------------------------------------*/

INLINE int32 extractFloat128Exp( float128 a )

{

    return ( a.high>>48 ) & 0x7FFF;

}

/*----------------------------------------------------------------------------

| Returns the sign bit of the quadruple-precision floating-point value `a'.

*----------------------------------------------------------------------------*/

INLINE flag extractFloat128Sign( float128 a )

{

    return a.high>>63;

}

/*----------------------------------------------------------------------------

| Normalizes the subnormal quadruple-precision floating-point value

| represented by the denormalized significand formed by the concatenation of

| `aSig0' and `aSig1'.  The normalized exponent is stored at the location

| pointed to by `zExpPtr'.  The most significant 49 bits of the normalized

| significand are stored at the location pointed to by `zSig0Ptr', and the

| least significant 64 bits of the normalized significand are stored at the

| location pointed to by `zSig1Ptr'.

*----------------------------------------------------------------------------*/

static void

 normalizeFloat128Subnormal(

     uint64_t aSig0,

     uint64_t aSig1,

     int32 *zExpPtr,

     uint64_t *zSig0Ptr,

     uint64_t *zSig1Ptr

 )