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/*
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* QEMU PC System Emulator
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "vl.h" |
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|
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/* output Bochs bios info messages */
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//#define DEBUG_BIOS
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#define BIOS_FILENAME "bios.bin" |
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#define VGABIOS_FILENAME "vgabios.bin" |
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#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
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#define LINUX_BOOT_FILENAME "linux_boot.bin" |
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|
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#define KERNEL_LOAD_ADDR 0x00100000 |
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#define INITRD_LOAD_ADDR 0x00400000 |
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#define KERNEL_PARAMS_ADDR 0x00090000 |
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#define KERNEL_CMDLINE_ADDR 0x00099000 |
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|
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int speaker_data_on;
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int dummy_refresh_clock;
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static fdctrl_t *floppy_controller;
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static RTCState *rtc_state;
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static PITState *pit;
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static IOAPICState *ioapic;
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static USBPort *usb_root_ports[2]; |
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static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
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{ |
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} |
50 |
|
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/* MSDOS compatibility mode FPU exception support */
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/* XXX: add IGNNE support */
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void cpu_set_ferr(CPUX86State *s)
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{ |
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pic_set_irq(13, 1); |
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} |
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|
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static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
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{ |
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pic_set_irq(13, 0); |
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} |
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|
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/* TSC handling */
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uint64_t cpu_get_tsc(CPUX86State *env) |
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{ |
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return qemu_get_clock(vm_clock);
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} |
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|
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/* IRQ handling */
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int cpu_get_pic_interrupt(CPUState *env)
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{ |
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int intno;
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intno = apic_get_interrupt(env); |
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if (intno >= 0) { |
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/* set irq request if a PIC irq is still pending */
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/* XXX: improve that */
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pic_update_irq(isa_pic); |
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return intno;
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} |
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/* read the irq from the PIC */
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intno = pic_read_irq(isa_pic); |
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return intno;
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} |
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|
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static void pic_irq_request(void *opaque, int level) |
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{ |
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CPUState *env = opaque; |
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if (level)
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cpu_interrupt(env, CPU_INTERRUPT_HARD); |
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else
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cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
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} |
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|
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/* PC cmos mappings */
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|
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#define REG_EQUIPMENT_BYTE 0x14 |
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#define REG_IBM_CENTURY_BYTE 0x32 |
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#define REG_IBM_PS2_CENTURY_BYTE 0x37 |
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|
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|
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static inline int to_bcd(RTCState *s, int a) |
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{ |
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return ((a / 10) << 4) | (a % 10); |
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} |
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static int cmos_get_fd_drive_type(int fd0) |
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{ |
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int val;
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switch (fd0) {
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case 0: |
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/* 1.44 Mb 3"5 drive */
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val = 4;
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break;
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case 1: |
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/* 2.88 Mb 3"5 drive */
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val = 5;
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break;
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case 2: |
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/* 1.2 Mb 5"5 drive */
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val = 2;
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break;
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default:
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val = 0;
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break;
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} |
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return val;
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} |
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|
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static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
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{ |
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RTCState *s = rtc_state; |
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int cylinders, heads, sectors;
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bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
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rtc_set_memory(s, type_ofs, 47);
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rtc_set_memory(s, info_ofs, cylinders); |
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rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
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rtc_set_memory(s, info_ofs + 2, heads);
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rtc_set_memory(s, info_ofs + 3, 0xff); |
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rtc_set_memory(s, info_ofs + 4, 0xff); |
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rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
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rtc_set_memory(s, info_ofs + 6, cylinders);
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rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
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rtc_set_memory(s, info_ofs + 8, sectors);
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} |
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|
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/* hd_table must contain 4 block drivers */
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static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table) |
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{ |
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RTCState *s = rtc_state; |
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int val;
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int fd0, fd1, nb;
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time_t ti; |
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struct tm *tm;
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int i;
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/* set the CMOS date */
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time(&ti); |
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if (rtc_utc)
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tm = gmtime(&ti); |
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else
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tm = localtime(&ti); |
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rtc_set_date(s, tm); |
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val = to_bcd(s, (tm->tm_year / 100) + 19); |
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rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val); |
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rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val); |
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|
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/* various important CMOS locations needed by PC/Bochs bios */
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|
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/* memory size */
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val = 640; /* base memory in K */ |
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rtc_set_memory(s, 0x15, val);
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rtc_set_memory(s, 0x16, val >> 8); |
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val = (ram_size / 1024) - 1024; |
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if (val > 65535) |
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val = 65535;
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rtc_set_memory(s, 0x17, val);
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rtc_set_memory(s, 0x18, val >> 8); |
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rtc_set_memory(s, 0x30, val);
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rtc_set_memory(s, 0x31, val >> 8); |
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if (ram_size > (16 * 1024 * 1024)) |
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val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
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else
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val = 0;
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if (val > 65535) |
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val = 65535;
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rtc_set_memory(s, 0x34, val);
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rtc_set_memory(s, 0x35, val >> 8); |
194 |
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switch(boot_device) {
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case 'a': |
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case 'b': |
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rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */ |
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break;
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default:
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case 'c': |
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rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */ |
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break;
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case 'd': |
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rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */ |
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break;
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} |
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/* floppy type */
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fd0 = fdctrl_get_drive_type(floppy_controller, 0);
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fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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rtc_set_memory(s, 0x10, val);
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val = 0;
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nb = 0;
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if (fd0 < 3) |
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nb++; |
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if (fd1 < 3) |
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nb++; |
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switch (nb) {
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case 0: |
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break;
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case 1: |
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val |= 0x01; /* 1 drive, ready for boot */ |
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break;
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case 2: |
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val |= 0x41; /* 2 drives, ready for boot */ |
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break;
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} |
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val |= 0x02; /* FPU is there */ |
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val |= 0x04; /* PS/2 mouse installed */ |
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rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
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/* hard drives */
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rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
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if (hd_table[0]) |
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cmos_init_hd(0x19, 0x1b, hd_table[0]); |
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if (hd_table[1]) |
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cmos_init_hd(0x1a, 0x24, hd_table[1]); |
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val = 0;
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for (i = 0; i < 4; i++) { |
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if (hd_table[i]) {
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int cylinders, heads, sectors, translation;
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/* NOTE: bdrv_get_geometry_hint() returns the physical
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geometry. It is always such that: 1 <= sects <= 63, 1
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<= heads <= 16, 1 <= cylinders <= 16383. The BIOS
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geometry can be different if a translation is done. */
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translation = bdrv_get_translation_hint(hd_table[i]); |
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if (translation == BIOS_ATA_TRANSLATION_AUTO) {
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bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); |
256 |
if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
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/* No translation. */
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translation = 0;
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} else {
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/* LBA translation. */
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translation = 1;
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} |
263 |
} else {
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translation--; |
265 |
} |
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val |= translation << (i * 2);
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} |
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} |
269 |
rtc_set_memory(s, 0x39, val);
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|
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/* Disable check of 0x55AA signature on the last two bytes of
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first sector of disk. XXX: make it the default ? */
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// rtc_set_memory(s, 0x38, 1);
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} |
275 |
|
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static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val) |
277 |
{ |
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speaker_data_on = (val >> 1) & 1; |
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pit_set_gate(pit, 2, val & 1); |
280 |
} |
281 |
|
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static uint32_t speaker_ioport_read(void *opaque, uint32_t addr) |
283 |
{ |
284 |
int out;
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out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
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dummy_refresh_clock ^= 1;
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return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) | |
288 |
(dummy_refresh_clock << 4);
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} |
290 |
|
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void ioport_set_a20(int enable) |
292 |
{ |
293 |
/* XXX: send to all CPUs ? */
|
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cpu_x86_set_a20(first_cpu, enable); |
295 |
} |
296 |
|
297 |
int ioport_get_a20(void) |
298 |
{ |
299 |
return ((first_cpu->a20_mask >> 20) & 1); |
300 |
} |
301 |
|
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static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
303 |
{ |
304 |
ioport_set_a20((val >> 1) & 1); |
305 |
/* XXX: bit 0 is fast reset */
|
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} |
307 |
|
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static uint32_t ioport92_read(void *opaque, uint32_t addr) |
309 |
{ |
310 |
return ioport_get_a20() << 1; |
311 |
} |
312 |
|
313 |
/***********************************************************/
|
314 |
/* Bochs BIOS debug ports */
|
315 |
|
316 |
void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
317 |
{ |
318 |
static const char shutdown_str[8] = "Shutdown"; |
319 |
static int shutdown_index = 0; |
320 |
|
321 |
switch(addr) {
|
322 |
/* Bochs BIOS messages */
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323 |
case 0x400: |
324 |
case 0x401: |
325 |
fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
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326 |
exit(1);
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327 |
case 0x402: |
328 |
case 0x403: |
329 |
#ifdef DEBUG_BIOS
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330 |
fprintf(stderr, "%c", val);
|
331 |
#endif
|
332 |
break;
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333 |
case 0x8900: |
334 |
/* same as Bochs power off */
|
335 |
if (val == shutdown_str[shutdown_index]) {
|
336 |
shutdown_index++; |
337 |
if (shutdown_index == 8) { |
338 |
shutdown_index = 0;
|
339 |
qemu_system_shutdown_request(); |
340 |
} |
341 |
} else {
|
342 |
shutdown_index = 0;
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343 |
} |
344 |
break;
|
345 |
|
346 |
/* LGPL'ed VGA BIOS messages */
|
347 |
case 0x501: |
348 |
case 0x502: |
349 |
fprintf(stderr, "VGA BIOS panic, line %d\n", val);
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350 |
exit(1);
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351 |
case 0x500: |
352 |
case 0x503: |
353 |
#ifdef DEBUG_BIOS
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354 |
fprintf(stderr, "%c", val);
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355 |
#endif
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356 |
break;
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357 |
} |
358 |
} |
359 |
|
360 |
void bochs_bios_init(void) |
361 |
{ |
362 |
register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
363 |
register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
364 |
register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
365 |
register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
366 |
register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
367 |
|
368 |
register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
369 |
register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
370 |
register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
371 |
register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
372 |
} |
373 |
|
374 |
|
375 |
int load_kernel(const char *filename, uint8_t *addr, |
376 |
uint8_t *real_addr) |
377 |
{ |
378 |
int fd, size;
|
379 |
int setup_sects;
|
380 |
|
381 |
fd = open(filename, O_RDONLY | O_BINARY); |
382 |
if (fd < 0) |
383 |
return -1; |
384 |
|
385 |
/* load 16 bit code */
|
386 |
if (read(fd, real_addr, 512) != 512) |
387 |
goto fail;
|
388 |
setup_sects = real_addr[0x1F1];
|
389 |
if (!setup_sects)
|
390 |
setup_sects = 4;
|
391 |
if (read(fd, real_addr + 512, setup_sects * 512) != |
392 |
setup_sects * 512)
|
393 |
goto fail;
|
394 |
|
395 |
/* load 32 bit code */
|
396 |
size = read(fd, addr, 16 * 1024 * 1024); |
397 |
if (size < 0) |
398 |
goto fail;
|
399 |
close(fd); |
400 |
return size;
|
401 |
fail:
|
402 |
close(fd); |
403 |
return -1; |
404 |
} |
405 |
|
406 |
static void main_cpu_reset(void *opaque) |
407 |
{ |
408 |
CPUState *env = opaque; |
409 |
cpu_reset(env); |
410 |
} |
411 |
|
412 |
/*************************************************/
|
413 |
|
414 |
static void putb(uint8_t **pp, int val) |
415 |
{ |
416 |
uint8_t *q; |
417 |
q = *pp; |
418 |
*q++ = val; |
419 |
*pp = q; |
420 |
} |
421 |
|
422 |
static void putstr(uint8_t **pp, const char *str) |
423 |
{ |
424 |
uint8_t *q; |
425 |
q = *pp; |
426 |
while (*str)
|
427 |
*q++ = *str++; |
428 |
*pp = q; |
429 |
} |
430 |
|
431 |
static void putle16(uint8_t **pp, int val) |
432 |
{ |
433 |
uint8_t *q; |
434 |
q = *pp; |
435 |
*q++ = val; |
436 |
*q++ = val >> 8;
|
437 |
*pp = q; |
438 |
} |
439 |
|
440 |
static void putle32(uint8_t **pp, int val) |
441 |
{ |
442 |
uint8_t *q; |
443 |
q = *pp; |
444 |
*q++ = val; |
445 |
*q++ = val >> 8;
|
446 |
*q++ = val >> 16;
|
447 |
*q++ = val >> 24;
|
448 |
*pp = q; |
449 |
} |
450 |
|
451 |
static int mpf_checksum(const uint8_t *data, int len) |
452 |
{ |
453 |
int sum, i;
|
454 |
sum = 0;
|
455 |
for(i = 0; i < len; i++) |
456 |
sum += data[i]; |
457 |
return sum & 0xff; |
458 |
} |
459 |
|
460 |
/* Build the Multi Processor table in the BIOS. Same values as Bochs. */
|
461 |
static void bios_add_mptable(uint8_t *bios_data) |
462 |
{ |
463 |
uint8_t *mp_config_table, *q, *float_pointer_struct; |
464 |
int ioapic_id, offset, i, len;
|
465 |
|
466 |
if (smp_cpus <= 1) |
467 |
return;
|
468 |
|
469 |
mp_config_table = bios_data + 0xcc00;
|
470 |
q = mp_config_table; |
471 |
putstr(&q, "PCMP"); /* "PCMP signature */ |
472 |
putle16(&q, 0); /* table length (patched later) */ |
473 |
putb(&q, 4); /* spec rev */ |
474 |
putb(&q, 0); /* checksum (patched later) */ |
475 |
putstr(&q, "QEMUCPU "); /* OEM id */ |
476 |
putstr(&q, "0.1 "); /* vendor id */ |
477 |
putle32(&q, 0); /* OEM table ptr */ |
478 |
putle16(&q, 0); /* OEM table size */ |
479 |
putle16(&q, 20); /* entry count */ |
480 |
putle32(&q, 0xfee00000); /* local APIC addr */ |
481 |
putle16(&q, 0); /* ext table length */ |
482 |
putb(&q, 0); /* ext table checksum */ |
483 |
putb(&q, 0); /* reserved */ |
484 |
|
485 |
for(i = 0; i < smp_cpus; i++) { |
486 |
putb(&q, 0); /* entry type = processor */ |
487 |
putb(&q, i); /* APIC id */
|
488 |
putb(&q, 0x11); /* local APIC version number */ |
489 |
if (i == 0) |
490 |
putb(&q, 3); /* cpu flags: enabled, bootstrap cpu */ |
491 |
else
|
492 |
putb(&q, 1); /* cpu flags: enabled */ |
493 |
putb(&q, 0); /* cpu signature */ |
494 |
putb(&q, 6);
|
495 |
putb(&q, 0);
|
496 |
putb(&q, 0);
|
497 |
putle16(&q, 0x201); /* feature flags */ |
498 |
putle16(&q, 0);
|
499 |
|
500 |
putle16(&q, 0); /* reserved */ |
501 |
putle16(&q, 0);
|
502 |
putle16(&q, 0);
|
503 |
putle16(&q, 0);
|
504 |
} |
505 |
|
506 |
/* isa bus */
|
507 |
putb(&q, 1); /* entry type = bus */ |
508 |
putb(&q, 0); /* bus ID */ |
509 |
putstr(&q, "ISA ");
|
510 |
|
511 |
/* ioapic */
|
512 |
ioapic_id = smp_cpus; |
513 |
putb(&q, 2); /* entry type = I/O APIC */ |
514 |
putb(&q, ioapic_id); /* apic ID */
|
515 |
putb(&q, 0x11); /* I/O APIC version number */ |
516 |
putb(&q, 1); /* enable */ |
517 |
putle32(&q, 0xfec00000); /* I/O APIC addr */ |
518 |
|
519 |
/* irqs */
|
520 |
for(i = 0; i < 16; i++) { |
521 |
putb(&q, 3); /* entry type = I/O interrupt */ |
522 |
putb(&q, 0); /* interrupt type = vectored interrupt */ |
523 |
putb(&q, 0); /* flags: po=0, el=0 */ |
524 |
putb(&q, 0);
|
525 |
putb(&q, 0); /* source bus ID = ISA */ |
526 |
putb(&q, i); /* source bus IRQ */
|
527 |
putb(&q, ioapic_id); /* dest I/O APIC ID */
|
528 |
putb(&q, i); /* dest I/O APIC interrupt in */
|
529 |
} |
530 |
/* patch length */
|
531 |
len = q - mp_config_table; |
532 |
mp_config_table[4] = len;
|
533 |
mp_config_table[5] = len >> 8; |
534 |
|
535 |
mp_config_table[7] = -mpf_checksum(mp_config_table, q - mp_config_table);
|
536 |
|
537 |
/* align to 16 */
|
538 |
offset = q - bios_data; |
539 |
offset = (offset + 15) & ~15; |
540 |
float_pointer_struct = bios_data + offset; |
541 |
|
542 |
/* floating pointer structure */
|
543 |
q = float_pointer_struct; |
544 |
putstr(&q, "_MP_");
|
545 |
/* pointer to MP config table */
|
546 |
putle32(&q, mp_config_table - bios_data + 0x000f0000);
|
547 |
|
548 |
putb(&q, 1); /* length in 16 byte units */ |
549 |
putb(&q, 4); /* MP spec revision */ |
550 |
putb(&q, 0); /* checksum (patched later) */ |
551 |
putb(&q, 0); /* MP feature byte 1 */ |
552 |
|
553 |
putb(&q, 0);
|
554 |
putb(&q, 0);
|
555 |
putb(&q, 0);
|
556 |
putb(&q, 0);
|
557 |
float_pointer_struct[10] =
|
558 |
-mpf_checksum(float_pointer_struct, q - float_pointer_struct); |
559 |
} |
560 |
|
561 |
|
562 |
static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
563 |
static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
564 |
static const int ide_irq[2] = { 14, 15 }; |
565 |
|
566 |
#define NE2000_NB_MAX 6 |
567 |
|
568 |
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
569 |
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
570 |
|
571 |
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
572 |
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; |
573 |
|
574 |
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
575 |
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
576 |
|
577 |
/* PC hardware initialisation */
|
578 |
static void pc_init1(int ram_size, int vga_ram_size, int boot_device, |
579 |
DisplayState *ds, const char **fd_filename, int snapshot, |
580 |
const char *kernel_filename, const char *kernel_cmdline, |
581 |
const char *initrd_filename, |
582 |
int pci_enabled)
|
583 |
{ |
584 |
char buf[1024]; |
585 |
int ret, linux_boot, initrd_size, i, nb_nics1;
|
586 |
unsigned long bios_offset, vga_bios_offset; |
587 |
int bios_size, isa_bios_size;
|
588 |
PCIBus *pci_bus; |
589 |
CPUState *env; |
590 |
|
591 |
linux_boot = (kernel_filename != NULL);
|
592 |
|
593 |
/* init CPUs */
|
594 |
for(i = 0; i < smp_cpus; i++) { |
595 |
env = cpu_init(); |
596 |
if (i != 0) |
597 |
env->hflags |= HF_HALTED_MASK; |
598 |
if (smp_cpus > 1) { |
599 |
/* XXX: enable it in all cases */
|
600 |
env->cpuid_features |= CPUID_APIC; |
601 |
} |
602 |
register_savevm("cpu", i, 3, cpu_save, cpu_load, env); |
603 |
qemu_register_reset(main_cpu_reset, env); |
604 |
if (pci_enabled) {
|
605 |
apic_init(env); |
606 |
} |
607 |
} |
608 |
|
609 |
/* allocate RAM */
|
610 |
cpu_register_physical_memory(0, ram_size, 0); |
611 |
|
612 |
/* BIOS load */
|
613 |
bios_offset = ram_size + vga_ram_size; |
614 |
vga_bios_offset = bios_offset + 256 * 1024; |
615 |
|
616 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); |
617 |
bios_size = get_image_size(buf); |
618 |
if (bios_size <= 0 || |
619 |
(bios_size % 65536) != 0 || |
620 |
bios_size > (256 * 1024)) { |
621 |
goto bios_error;
|
622 |
} |
623 |
ret = load_image(buf, phys_ram_base + bios_offset); |
624 |
if (ret != bios_size) {
|
625 |
bios_error:
|
626 |
fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
|
627 |
exit(1);
|
628 |
} |
629 |
if (bios_size == 65536) { |
630 |
bios_add_mptable(phys_ram_base + bios_offset); |
631 |
} |
632 |
|
633 |
/* VGA BIOS load */
|
634 |
if (cirrus_vga_enabled) {
|
635 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); |
636 |
} else {
|
637 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
638 |
} |
639 |
ret = load_image(buf, phys_ram_base + vga_bios_offset); |
640 |
|
641 |
/* setup basic memory access */
|
642 |
cpu_register_physical_memory(0xc0000, 0x10000, |
643 |
vga_bios_offset | IO_MEM_ROM); |
644 |
|
645 |
/* map the last 128KB of the BIOS in ISA space */
|
646 |
isa_bios_size = bios_size; |
647 |
if (isa_bios_size > (128 * 1024)) |
648 |
isa_bios_size = 128 * 1024; |
649 |
cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, |
650 |
IO_MEM_UNASSIGNED); |
651 |
cpu_register_physical_memory(0x100000 - isa_bios_size,
|
652 |
isa_bios_size, |
653 |
(bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
654 |
/* map all the bios at the top of memory */
|
655 |
cpu_register_physical_memory((uint32_t)(-bios_size), |
656 |
bios_size, bios_offset | IO_MEM_ROM); |
657 |
|
658 |
bochs_bios_init(); |
659 |
|
660 |
if (linux_boot) {
|
661 |
uint8_t bootsect[512];
|
662 |
uint8_t old_bootsect[512];
|
663 |
|
664 |
if (bs_table[0] == NULL) { |
665 |
fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
|
666 |
exit(1);
|
667 |
} |
668 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME); |
669 |
ret = load_image(buf, bootsect); |
670 |
if (ret != sizeof(bootsect)) { |
671 |
fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
|
672 |
buf); |
673 |
exit(1);
|
674 |
} |
675 |
|
676 |
if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) { |
677 |
/* copy the MSDOS partition table */
|
678 |
memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40); |
679 |
} |
680 |
|
681 |
bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect)); |
682 |
|
683 |
/* now we can load the kernel */
|
684 |
ret = load_kernel(kernel_filename, |
685 |
phys_ram_base + KERNEL_LOAD_ADDR, |
686 |
phys_ram_base + KERNEL_PARAMS_ADDR); |
687 |
if (ret < 0) { |
688 |
fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
689 |
kernel_filename); |
690 |
exit(1);
|
691 |
} |
692 |
|
693 |
/* load initrd */
|
694 |
initrd_size = 0;
|
695 |
if (initrd_filename) {
|
696 |
initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR); |
697 |
if (initrd_size < 0) { |
698 |
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
699 |
initrd_filename); |
700 |
exit(1);
|
701 |
} |
702 |
} |
703 |
if (initrd_size > 0) { |
704 |
stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
|
705 |
stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
|
706 |
} |
707 |
pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
|
708 |
kernel_cmdline); |
709 |
stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F); |
710 |
stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
|
711 |
KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR); |
712 |
/* loader type */
|
713 |
stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01); |
714 |
} |
715 |
|
716 |
if (pci_enabled) {
|
717 |
pci_bus = i440fx_init(); |
718 |
piix3_init(pci_bus); |
719 |
} else {
|
720 |
pci_bus = NULL;
|
721 |
} |
722 |
|
723 |
/* init basic PC hardware */
|
724 |
register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
725 |
|
726 |
register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
727 |
|
728 |
if (cirrus_vga_enabled) {
|
729 |
if (pci_enabled) {
|
730 |
pci_cirrus_vga_init(pci_bus, |
731 |
ds, phys_ram_base + ram_size, ram_size, |
732 |
vga_ram_size); |
733 |
} else {
|
734 |
isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size, |
735 |
vga_ram_size); |
736 |
} |
737 |
} else {
|
738 |
vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size, |
739 |
vga_ram_size, 0, 0); |
740 |
} |
741 |
|
742 |
rtc_state = rtc_init(0x70, 8); |
743 |
register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL); |
744 |
register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL); |
745 |
|
746 |
register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
747 |
register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
748 |
|
749 |
if (pci_enabled) {
|
750 |
ioapic = ioapic_init(); |
751 |
} |
752 |
isa_pic = pic_init(pic_irq_request, first_cpu); |
753 |
pit = pit_init(0x40, 0); |
754 |
if (pci_enabled) {
|
755 |
pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); |
756 |
} |
757 |
|
758 |
for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
759 |
if (serial_hds[i]) {
|
760 |
serial_init(&pic_set_irq_new, isa_pic, |
761 |
serial_io[i], serial_irq[i], serial_hds[i]); |
762 |
} |
763 |
} |
764 |
|
765 |
for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
766 |
if (parallel_hds[i]) {
|
767 |
parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]); |
768 |
} |
769 |
} |
770 |
|
771 |
if (pci_enabled) {
|
772 |
for(i = 0; i < nb_nics; i++) { |
773 |
pci_ne2000_init(pci_bus, &nd_table[i]); |
774 |
} |
775 |
pci_piix3_ide_init(pci_bus, bs_table); |
776 |
} else {
|
777 |
nb_nics1 = nb_nics; |
778 |
if (nb_nics1 > NE2000_NB_MAX)
|
779 |
nb_nics1 = NE2000_NB_MAX; |
780 |
for(i = 0; i < nb_nics1; i++) { |
781 |
isa_ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]); |
782 |
} |
783 |
|
784 |
for(i = 0; i < 2; i++) { |
785 |
isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i], |
786 |
bs_table[2 * i], bs_table[2 * i + 1]); |
787 |
} |
788 |
} |
789 |
|
790 |
kbd_init(); |
791 |
DMA_init(0);
|
792 |
|
793 |
if (audio_enabled) {
|
794 |
AudioState *audio; |
795 |
|
796 |
audio = AUD_init(); |
797 |
if (audio) {
|
798 |
if (sb16_enabled)
|
799 |
SB16_init (audio); |
800 |
#ifdef CONFIG_ADLIB
|
801 |
if (adlib_enabled)
|
802 |
Adlib_init (audio); |
803 |
#endif
|
804 |
#ifdef CONFIG_GUS
|
805 |
if (gus_enabled)
|
806 |
GUS_init (audio); |
807 |
#endif
|
808 |
if (pci_enabled && es1370_enabled)
|
809 |
es1370_init (pci_bus, audio); |
810 |
} |
811 |
} |
812 |
|
813 |
floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table); |
814 |
|
815 |
cmos_init(ram_size, boot_device, bs_table); |
816 |
|
817 |
if (pci_enabled && usb_enabled) {
|
818 |
usb_uhci_init(pci_bus, usb_root_ports); |
819 |
usb_attach(usb_root_ports[0], vm_usb_hub);
|
820 |
} |
821 |
|
822 |
/* must be done after all PCI devices are instanciated */
|
823 |
/* XXX: should be done in the Bochs BIOS */
|
824 |
if (pci_enabled) {
|
825 |
pci_bios_init(); |
826 |
} |
827 |
} |
828 |
|
829 |
static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device, |
830 |
DisplayState *ds, const char **fd_filename, |
831 |
int snapshot,
|
832 |
const char *kernel_filename, |
833 |
const char *kernel_cmdline, |
834 |
const char *initrd_filename) |
835 |
{ |
836 |
pc_init1(ram_size, vga_ram_size, boot_device, |
837 |
ds, fd_filename, snapshot, |
838 |
kernel_filename, kernel_cmdline, |
839 |
initrd_filename, 1);
|
840 |
} |
841 |
|
842 |
static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device, |
843 |
DisplayState *ds, const char **fd_filename, |
844 |
int snapshot,
|
845 |
const char *kernel_filename, |
846 |
const char *kernel_cmdline, |
847 |
const char *initrd_filename) |
848 |
{ |
849 |
pc_init1(ram_size, vga_ram_size, boot_device, |
850 |
ds, fd_filename, snapshot, |
851 |
kernel_filename, kernel_cmdline, |
852 |
initrd_filename, 0);
|
853 |
} |
854 |
|
855 |
QEMUMachine pc_machine = { |
856 |
"pc",
|
857 |
"Standard PC",
|
858 |
pc_init_pci, |
859 |
}; |
860 |
|
861 |
QEMUMachine isapc_machine = { |
862 |
"isapc",
|
863 |
"ISA-only PC",
|
864 |
pc_init_isa, |
865 |
}; |