root / hw / versatile_pci.c @ 8034ce7d
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1 | 5fafdf24 | ths | /*
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2 | 502a5395 | pbrook | * ARM Versatile/PB PCI host controller
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3 | 502a5395 | pbrook | *
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4 | 0027b06d | Paul Brook | * Copyright (c) 2006-2009 CodeSourcery.
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5 | 502a5395 | pbrook | * Written by Paul Brook
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6 | 502a5395 | pbrook | *
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7 | 502a5395 | pbrook | * This code is licenced under the LGPL.
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8 | 502a5395 | pbrook | */
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9 | 502a5395 | pbrook | |
10 | 0027b06d | Paul Brook | #include "sysbus.h" |
11 | 87ecb68b | pbrook | #include "pci.h" |
12 | b6243d99 | Isaku Yamahata | #include "pci_host.h" |
13 | 0027b06d | Paul Brook | |
14 | 0027b06d | Paul Brook | typedef struct { |
15 | 0027b06d | Paul Brook | SysBusDevice busdev; |
16 | 0027b06d | Paul Brook | qemu_irq irq[4];
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17 | 0027b06d | Paul Brook | int realview;
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18 | 0027b06d | Paul Brook | int mem_config;
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19 | 0027b06d | Paul Brook | } PCIVPBState; |
20 | 502a5395 | pbrook | |
21 | c227f099 | Anthony Liguori | static inline uint32_t vpb_pci_config_addr(target_phys_addr_t addr) |
22 | 502a5395 | pbrook | { |
23 | 80b3ada7 | pbrook | return addr & 0xffffff; |
24 | 502a5395 | pbrook | } |
25 | 502a5395 | pbrook | |
26 | c227f099 | Anthony Liguori | static void pci_vpb_config_writeb (void *opaque, target_phys_addr_t addr, |
27 | 502a5395 | pbrook | uint32_t val) |
28 | 502a5395 | pbrook | { |
29 | 502a5395 | pbrook | pci_data_write(opaque, vpb_pci_config_addr (addr), val, 1);
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30 | 502a5395 | pbrook | } |
31 | 502a5395 | pbrook | |
32 | c227f099 | Anthony Liguori | static void pci_vpb_config_writew (void *opaque, target_phys_addr_t addr, |
33 | 502a5395 | pbrook | uint32_t val) |
34 | 502a5395 | pbrook | { |
35 | 502a5395 | pbrook | pci_data_write(opaque, vpb_pci_config_addr (addr), val, 2);
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36 | 502a5395 | pbrook | } |
37 | 502a5395 | pbrook | |
38 | c227f099 | Anthony Liguori | static void pci_vpb_config_writel (void *opaque, target_phys_addr_t addr, |
39 | 502a5395 | pbrook | uint32_t val) |
40 | 502a5395 | pbrook | { |
41 | 502a5395 | pbrook | pci_data_write(opaque, vpb_pci_config_addr (addr), val, 4);
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42 | 502a5395 | pbrook | } |
43 | 502a5395 | pbrook | |
44 | c227f099 | Anthony Liguori | static uint32_t pci_vpb_config_readb (void *opaque, target_phys_addr_t addr) |
45 | 502a5395 | pbrook | { |
46 | 502a5395 | pbrook | uint32_t val; |
47 | 502a5395 | pbrook | val = pci_data_read(opaque, vpb_pci_config_addr (addr), 1);
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48 | 502a5395 | pbrook | return val;
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49 | 502a5395 | pbrook | } |
50 | 502a5395 | pbrook | |
51 | c227f099 | Anthony Liguori | static uint32_t pci_vpb_config_readw (void *opaque, target_phys_addr_t addr) |
52 | 502a5395 | pbrook | { |
53 | 502a5395 | pbrook | uint32_t val; |
54 | 502a5395 | pbrook | val = pci_data_read(opaque, vpb_pci_config_addr (addr), 2);
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55 | 502a5395 | pbrook | return val;
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56 | 502a5395 | pbrook | } |
57 | 502a5395 | pbrook | |
58 | c227f099 | Anthony Liguori | static uint32_t pci_vpb_config_readl (void *opaque, target_phys_addr_t addr) |
59 | 502a5395 | pbrook | { |
60 | 502a5395 | pbrook | uint32_t val; |
61 | 502a5395 | pbrook | val = pci_data_read(opaque, vpb_pci_config_addr (addr), 4);
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62 | 502a5395 | pbrook | return val;
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63 | 502a5395 | pbrook | } |
64 | 502a5395 | pbrook | |
65 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const pci_vpb_config_write[] = { |
66 | 502a5395 | pbrook | &pci_vpb_config_writeb, |
67 | 502a5395 | pbrook | &pci_vpb_config_writew, |
68 | 502a5395 | pbrook | &pci_vpb_config_writel, |
69 | 502a5395 | pbrook | }; |
70 | 502a5395 | pbrook | |
71 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const pci_vpb_config_read[] = { |
72 | 502a5395 | pbrook | &pci_vpb_config_readb, |
73 | 502a5395 | pbrook | &pci_vpb_config_readw, |
74 | 502a5395 | pbrook | &pci_vpb_config_readl, |
75 | 502a5395 | pbrook | }; |
76 | 502a5395 | pbrook | |
77 | d2b59317 | pbrook | static int pci_vpb_map_irq(PCIDevice *d, int irq_num) |
78 | d2b59317 | pbrook | { |
79 | d2b59317 | pbrook | return irq_num;
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80 | d2b59317 | pbrook | } |
81 | d2b59317 | pbrook | |
82 | 5d4e84c8 | Juan Quintela | static void pci_vpb_set_irq(void *opaque, int irq_num, int level) |
83 | 502a5395 | pbrook | { |
84 | 5d4e84c8 | Juan Quintela | qemu_irq *pic = opaque; |
85 | 5d4e84c8 | Juan Quintela | |
86 | 97aff481 | Paul Brook | qemu_set_irq(pic[irq_num], level); |
87 | 502a5395 | pbrook | } |
88 | 502a5395 | pbrook | |
89 | c227f099 | Anthony Liguori | static void pci_vpb_map(SysBusDevice *dev, target_phys_addr_t base) |
90 | 502a5395 | pbrook | { |
91 | 0027b06d | Paul Brook | PCIVPBState *s = (PCIVPBState *)dev; |
92 | 0027b06d | Paul Brook | /* Selfconfig area. */
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93 | 0027b06d | Paul Brook | cpu_register_physical_memory(base + 0x01000000, 0x1000000, s->mem_config); |
94 | 0027b06d | Paul Brook | /* Normal config area. */
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95 | 0027b06d | Paul Brook | cpu_register_physical_memory(base + 0x02000000, 0x1000000, s->mem_config); |
96 | 0027b06d | Paul Brook | |
97 | 0027b06d | Paul Brook | if (s->realview) {
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98 | 0027b06d | Paul Brook | /* IO memory area. */
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99 | 968d683c | Alexander Graf | isa_mmio_init(base + 0x03000000, 0x00100000); |
100 | 0027b06d | Paul Brook | } |
101 | 0027b06d | Paul Brook | } |
102 | 0027b06d | Paul Brook | |
103 | 81a322d4 | Gerd Hoffmann | static int pci_vpb_init(SysBusDevice *dev) |
104 | 0027b06d | Paul Brook | { |
105 | 0027b06d | Paul Brook | PCIVPBState *s = FROM_SYSBUS(PCIVPBState, dev); |
106 | 0027b06d | Paul Brook | PCIBus *bus; |
107 | 97aff481 | Paul Brook | int i;
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108 | e69954b9 | pbrook | |
109 | 97aff481 | Paul Brook | for (i = 0; i < 4; i++) { |
110 | 0027b06d | Paul Brook | sysbus_init_irq(dev, &s->irq[i]); |
111 | e69954b9 | pbrook | } |
112 | 02e2da45 | Paul Brook | bus = pci_register_bus(&dev->qdev, "pci",
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113 | 02e2da45 | Paul Brook | pci_vpb_set_irq, pci_vpb_map_irq, s->irq, |
114 | 520128bd | Isaku Yamahata | PCI_DEVFN(11, 0), 4); |
115 | 0027b06d | Paul Brook | |
116 | 502a5395 | pbrook | /* ??? Register memory space. */
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117 | 502a5395 | pbrook | |
118 | 1eed09cb | Avi Kivity | s->mem_config = cpu_register_io_memory(pci_vpb_config_read, |
119 | 2507c12a | Alexander Graf | pci_vpb_config_write, bus, |
120 | 387c3e96 | Alexander Graf | DEVICE_LITTLE_ENDIAN); |
121 | 0027b06d | Paul Brook | sysbus_init_mmio_cb(dev, 0x04000000, pci_vpb_map);
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122 | e69954b9 | pbrook | |
123 | 0027b06d | Paul Brook | pci_create_simple(bus, -1, "versatile_pci_host"); |
124 | 81a322d4 | Gerd Hoffmann | return 0; |
125 | 0027b06d | Paul Brook | } |
126 | e69954b9 | pbrook | |
127 | 81a322d4 | Gerd Hoffmann | static int pci_realview_init(SysBusDevice *dev) |
128 | 0027b06d | Paul Brook | { |
129 | 0027b06d | Paul Brook | PCIVPBState *s = FROM_SYSBUS(PCIVPBState, dev); |
130 | 0027b06d | Paul Brook | s->realview = 1;
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131 | 81a322d4 | Gerd Hoffmann | return pci_vpb_init(dev);
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132 | 0027b06d | Paul Brook | } |
133 | 502a5395 | pbrook | |
134 | 81a322d4 | Gerd Hoffmann | static int versatile_pci_host_init(PCIDevice *d) |
135 | 0027b06d | Paul Brook | { |
136 | deb54399 | aliguori | pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_XILINX); |
137 | e69954b9 | pbrook | /* Both boards have the same device ID. Oh well. */
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138 | a770dc7e | aliguori | pci_config_set_device_id(d->config, PCI_DEVICE_ID_XILINX_XC2VP30); |
139 | a408b1de | Michael S. Tsirkin | pci_set_word(d->config + PCI_STATUS, |
140 | a408b1de | Michael S. Tsirkin | PCI_STATUS_66MHZ | PCI_STATUS_DEVSEL_MEDIUM); |
141 | 173a543b | blueswir1 | pci_config_set_class(d->config, PCI_CLASS_PROCESSOR_CO); |
142 | 01764fe0 | Michael S. Tsirkin | pci_set_byte(d->config + PCI_LATENCY_TIMER, 0x10);
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143 | 81a322d4 | Gerd Hoffmann | return 0; |
144 | 0027b06d | Paul Brook | } |
145 | 502a5395 | pbrook | |
146 | 0aab0d3a | Gerd Hoffmann | static PCIDeviceInfo versatile_pci_host_info = {
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147 | 0aab0d3a | Gerd Hoffmann | .qdev.name = "versatile_pci_host",
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148 | 0aab0d3a | Gerd Hoffmann | .qdev.size = sizeof(PCIDevice),
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149 | 0aab0d3a | Gerd Hoffmann | .init = versatile_pci_host_init, |
150 | 0aab0d3a | Gerd Hoffmann | }; |
151 | 0aab0d3a | Gerd Hoffmann | |
152 | 0027b06d | Paul Brook | static void versatile_pci_register_devices(void) |
153 | 0027b06d | Paul Brook | { |
154 | 0027b06d | Paul Brook | sysbus_register_dev("versatile_pci", sizeof(PCIVPBState), pci_vpb_init); |
155 | 0027b06d | Paul Brook | sysbus_register_dev("realview_pci", sizeof(PCIVPBState), |
156 | 0027b06d | Paul Brook | pci_realview_init); |
157 | 0aab0d3a | Gerd Hoffmann | pci_qdev_register(&versatile_pci_host_info); |
158 | 502a5395 | pbrook | } |
159 | 0027b06d | Paul Brook | |
160 | 0027b06d | Paul Brook | device_init(versatile_pci_register_devices) |