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/*
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 * QEMU Floppy disk emulator
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 * 
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 * Copyright (c) 2003 Jocelyn Mayer
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 * 
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <inttypes.h>
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#include "vl.h"
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/********************************************************/
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/* debug Floppy devices */
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//#define DEBUG_FLOPPY
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#ifdef DEBUG_FLOPPY
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#define FLOPPY_DPRINTF(fmt, args...) \
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do { printf("FLOPPY: " fmt , ##args); } while (0)
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#else
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#define FLOPPY_DPRINTF(fmt, args...)
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#endif
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#define FLOPPY_ERROR(fmt, args...) \
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do { printf("FLOPPY ERROR: %s: " fmt, __func__ , ##args); } while (0)
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/********************************************************/
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/* Floppy drive emulation                               */
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/* Will always be a fixed parameter for us */
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#define FD_SECTOR_LEN 512
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#define FD_SECTOR_SC  2   /* Sector size code */
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/* Floppy disk drive emulation */
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typedef enum fdisk_type_t {
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    FDRIVE_DISK_288   = 0x01, /* 2.88 MB disk           */
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    FDRIVE_DISK_144   = 0x02, /* 1.44 MB disk           */
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    FDRIVE_DISK_720   = 0x03, /* 720 kB disk            */
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    FDRIVE_DISK_NONE  = 0x04, /* No disk                */
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} fdisk_type_t;
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typedef enum fdrive_type_t {
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    FDRIVE_DRV_144  = 0x00,   /* 1.44 MB 3"5 drive      */
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    FDRIVE_DRV_288  = 0x01,   /* 2.88 MB 3"5 drive      */
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    FDRIVE_DRV_120  = 0x02,   /* 1.2  MB 5"25 drive     */
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    FDRIVE_DRV_NONE = 0x03,   /* No drive connected     */
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} fdrive_type_t;
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typedef struct fdrive_t {
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    BlockDriverState *bs;
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    /* Drive status */
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    fdrive_type_t drive;
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    uint8_t motor;            /* on/off                 */
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    uint8_t perpendicular;    /* 2.88 MB access mode    */
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    uint8_t rv;               /* Revalidated            */
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    /* Position */
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    uint8_t head;
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    uint8_t track;
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    uint8_t sect;
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    /* Last operation status */
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    uint8_t dir;              /* Direction              */
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    uint8_t rw;               /* Read/write             */
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    /* Media */
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    fdisk_type_t disk;        /* Disk type              */
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    uint8_t last_sect;        /* Nb sector per track    */
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    uint8_t max_track;        /* Nb of tracks           */
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    uint8_t ro;               /* Is read-only           */
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} fdrive_t;
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static void fd_init (fdrive_t *drv)
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{
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    /* Drive */
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    drv->bs = NULL;
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//    drv->drive = FDRIVE_DRV_288;
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    drv->drive = FDRIVE_DRV_144;
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    drv->motor = 0;
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    drv->perpendicular = 0;
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    drv->rv = 0;
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    /* Disk */
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    drv->disk = FDRIVE_DISK_NONE;
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    drv->last_sect = 1;
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    drv->max_track = 0;
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}
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static int _fd_sector (uint8_t head, uint8_t track,
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                        uint8_t sect, uint8_t last_sect)
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{
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    return (((track * 2) + head) * last_sect) + sect - 1;
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}
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/* Returns current position, in sectors, for given drive */
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static int fd_sector (fdrive_t *drv)
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{
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    return _fd_sector(drv->head, drv->track, drv->sect, drv->last_sect);
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}
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static int fd_seek (fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
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                    int enable_seek)
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{
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    uint32_t sector;
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    if (track > drv->max_track) {
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        FLOPPY_ERROR("try to read %d %02x %02x (max=%d %02x %02x)\n",
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                     head, track, sect, 1, drv->max_track, drv->last_sect);
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        return 2;
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    }
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    if (sect > drv->last_sect) {
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        FLOPPY_ERROR("try to read %d %02x %02x (max=%d %02x %02x)\n",
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                     head, track, sect, 1, drv->max_track, drv->last_sect);
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        return 3;
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    }
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    sector = _fd_sector(head, track, sect, drv->last_sect);
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    if (sector != fd_sector(drv)) {
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#if 0
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        if (!enable_seek) {
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            FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
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                         head, track, sect, 1, drv->max_track, drv->last_sect);
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            return 4;
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        }
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#endif
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        drv->head = head;
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        drv->track = track;
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        drv->sect = sect;
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        return 1;
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    }
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    return 0;
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}
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/* Set drive back to track 0 */
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static void fd_recalibrate (fdrive_t *drv)
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{
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    FLOPPY_DPRINTF("recalibrate\n");
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    drv->head = 0;
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    drv->track = 0;
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    drv->sect = 1;
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    drv->dir = 1;
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    drv->rw = 0;
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}
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/* Revalidate a disk drive after a disk change */
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static void fd_revalidate (fdrive_t *drv, int ro)
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{
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    int64_t nb_sectors;
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    FLOPPY_DPRINTF("revalidate\n");
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    drv->rv = 0;
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    if (drv->bs != NULL) {
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        bdrv_get_geometry(drv->bs, &nb_sectors);
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#if 1
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        if (nb_sectors > 2880) 
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#endif
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        {
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            /* Pretend we have a 2.88 MB disk */
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            drv->disk = FDRIVE_DISK_288;
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            drv->last_sect = 36;
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            drv->max_track = 80;
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#if 1
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        } else if (nb_sectors > 1440) {
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            /* Pretend we have a 1.44 MB disk */
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            drv->disk = FDRIVE_DISK_144;
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            drv->last_sect = 18;
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            drv->max_track = 80;
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        } else {
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            /* Pretend we have a 720 kB disk */
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            drv->disk = FDRIVE_DISK_720;
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            drv->last_sect = 9;
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            drv->max_track = 80;
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#endif
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        }
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    } else {
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        drv->disk = FDRIVE_DISK_NONE;
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        drv->last_sect = 1; /* Avoid eventual divide by 0 bugs */
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    }
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    drv->ro = ro;
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    drv->rv = 1;
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}
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/* Motor control */
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static void fd_start (fdrive_t *drv)
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{
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    drv->motor = 1;
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}
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static void fd_stop (fdrive_t *drv)
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{
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    drv->motor = 0;
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}
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/* Re-initialise a drives (motor off, repositioned) */
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static void fd_reset (fdrive_t *drv)
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{
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    fd_stop(drv);
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    fd_recalibrate(drv);
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}
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/********************************************************/
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/* Intel 82078 floppy disk controler emulation          */
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static void fdctrl_reset (int do_irq);
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static void fdctrl_reset_fifo (void);
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static int fdctrl_transfer_handler (void *opaque, target_ulong addr, int size);
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static void fdctrl_raise_irq (uint8_t status);
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static uint32_t fdctrl_read_statusB (CPUState *env, uint32_t reg);
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static uint32_t fdctrl_read_dor (CPUState *env, uint32_t reg);
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static void fdctrl_write_dor (CPUState *env, uint32_t reg, uint32_t value);
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static uint32_t fdctrl_read_tape (CPUState *env, uint32_t reg);
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static void fdctrl_write_tape (CPUState *env, uint32_t reg, uint32_t value);
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static uint32_t fdctrl_read_main_status (CPUState *env, uint32_t reg);
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static void fdctrl_write_rate (CPUState *env, uint32_t reg, uint32_t value);
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static uint32_t fdctrl_read_data (CPUState *env, uint32_t reg);
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static void fdctrl_write_data (CPUState *env, uint32_t reg, uint32_t value);
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static uint32_t fdctrl_read_dir (CPUState *env, uint32_t reg);
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enum {
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    FD_CTRL_ACTIVE = 0x01,
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    FD_CTRL_RESET  = 0x02,
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    FD_CTRL_SLEEP  = 0x04,
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    FD_CTRL_BUSY   = 0x08,
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    FD_CTRL_INTR   = 0x10,
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};
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enum {
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    FD_DIR_WRITE   = 0,
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    FD_DIR_READ    = 1,
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    FD_DIR_SCANE   = 2,
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    FD_DIR_SCANL   = 3,
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    FD_DIR_SCANH   = 4,
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};
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enum {
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    FD_STATE_CMD    = 0x00,
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    FD_STATE_STATUS = 0x01,
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    FD_STATE_DATA   = 0x02,
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    FD_STATE_STATE  = 0x03,
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    FD_STATE_MULTI  = 0x10,
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    FD_STATE_SEEK   = 0x20,
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};
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#define FD_STATE(state) ((state) & FD_STATE_STATE)
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#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
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#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
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typedef struct fdctrl_t {
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    /* Controler's identification */
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    uint8_t version;
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    /* HW */
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    int irq_lvl;
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    int dma_chann;
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    /* Controler state */
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    uint8_t state;
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    uint8_t dma_en;
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    uint8_t cur_drv;
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    uint8_t bootsel;
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    /* Command FIFO */
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    uint8_t fifo[FD_SECTOR_LEN];
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    uint32_t data_pos;
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    uint32_t data_len;
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    uint8_t data_state;
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    uint8_t data_dir;
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    uint8_t int_status;
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    /* States kept only to be returned back */
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    /* Timers state */
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    uint8_t timer0;
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    uint8_t timer1;
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    /* precompensation */
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    uint8_t precomp_trk;
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    uint8_t config;
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    uint8_t lock;
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    /* Power down config (also with status regB access mode */
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    uint8_t pwrd;
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    /* Floppy drives */
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    fdrive_t drives[2];
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} fdctrl_t;
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static fdctrl_t fdctrl;
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void fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, uint32_t base,
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                  char boot_device)
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{
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//    int io_mem;
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    int i;
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    FLOPPY_DPRINTF("init controler\n");
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    memset(&fdctrl, 0, sizeof(fdctrl));
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    fdctrl.version = 0x90; /* Intel 82078 controler */
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    fdctrl.irq_lvl = irq_lvl;
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    fdctrl.dma_chann = dma_chann;
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    fdctrl.config = 0x40; /* Implicit seek, polling & FIFO enabled */
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    if (fdctrl.dma_chann != -1) {
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        fdctrl.dma_en = 1;
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        DMA_register_channel(dma_chann, fdctrl_transfer_handler, &fdctrl);
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    } else {
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        fdctrl.dma_en = 0;
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    }
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    for (i = 0; i < MAX_FD; i++)
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        fd_init(&fdctrl.drives[i]);
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    fdctrl_reset(0);
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    fdctrl.state = FD_CTRL_ACTIVE;
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    if (mem_mapped) {
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        FLOPPY_ERROR("memory mapped floppy not supported by now !\n");
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#if 0
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        io_mem = cpu_register_io_memory(0, fdctrl_mem_read, fdctrl_mem_write);
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        cpu_register_physical_memory(base, 0x08, io_mem);
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#endif
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    } else {
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        register_ioport_read(base + 0x01, 1, fdctrl_read_statusB, 1);
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        register_ioport_read(base + 0x02, 1, fdctrl_read_dor, 1);
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        register_ioport_write(base + 0x02, 1, fdctrl_write_dor, 1);
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        register_ioport_read(base + 0x03, 1, fdctrl_read_tape, 1);
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        register_ioport_write(base + 0x03, 1, fdctrl_write_tape, 1);
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        register_ioport_read(base + 0x04, 1, fdctrl_read_main_status, 1);
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        register_ioport_write(base + 0x04, 1, fdctrl_write_rate, 1);
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        register_ioport_read(base + 0x05, 1, fdctrl_read_data, 1);
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        register_ioport_write(base + 0x05, 1, fdctrl_write_data, 1);
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        register_ioport_read(base + 0x07, 1, fdctrl_read_dir, 1);
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    }
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    if (boot_device == 'b')
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        fdctrl.bootsel = 1;
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    else
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        fdctrl.bootsel = 0;
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#if defined (TARGET_I386)
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    cmos_register_fd(fdctrl.drives[0].drive, fdctrl.drives[1].drive);
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#endif
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}
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int fdctrl_disk_change (int idx, const unsigned char *filename, int ro)
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{
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    fdrive_t *drv;
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    if (idx < 0 || idx > 1)
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        return -1;
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    FLOPPY_DPRINTF("disk %d change: %s (%s)\n", idx, filename,
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                   ro == 0 ? "rw" : "ro");
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    drv = &fdctrl.drives[idx];
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    if (fd_table[idx] != NULL) {
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        bdrv_close(fd_table[idx]);
357 8977f3c1 bellard
        fd_table[idx] = NULL;
358 8977f3c1 bellard
    }
359 8977f3c1 bellard
    fd_table[idx] = bdrv_open(filename, ro);
360 8977f3c1 bellard
    drv->bs = fd_table[idx];
361 8977f3c1 bellard
    if (fd_table[idx] == NULL)
362 8977f3c1 bellard
        return -1;
363 8977f3c1 bellard
    fd_revalidate(drv, ro);
364 8977f3c1 bellard
#if 0
365 8977f3c1 bellard
    fd_recalibrate(drv);
366 8977f3c1 bellard
    fdctrl_reset_fifo();
367 8977f3c1 bellard
    fdctrl_raise_irq(0x20);
368 8977f3c1 bellard
#endif
369 8977f3c1 bellard
370 8977f3c1 bellard
    return 0;
371 8977f3c1 bellard
}
372 8977f3c1 bellard
373 8977f3c1 bellard
/* Change IRQ state */
374 8977f3c1 bellard
static void fdctrl_reset_irq (void)
375 8977f3c1 bellard
{
376 8977f3c1 bellard
    if (fdctrl.state & FD_CTRL_INTR) {
377 8977f3c1 bellard
        pic_set_irq(fdctrl.irq_lvl, 0);
378 8977f3c1 bellard
        fdctrl.state &= ~(FD_CTRL_INTR | FD_CTRL_SLEEP | FD_CTRL_BUSY);
379 8977f3c1 bellard
    }
380 8977f3c1 bellard
}
381 8977f3c1 bellard
382 8977f3c1 bellard
static void fdctrl_raise_irq (uint8_t status)
383 8977f3c1 bellard
{
384 8977f3c1 bellard
    if (~(fdctrl.state & FD_CTRL_INTR)) {
385 8977f3c1 bellard
        pic_set_irq(fdctrl.irq_lvl, 1);
386 8977f3c1 bellard
        fdctrl.state |= FD_CTRL_INTR;
387 8977f3c1 bellard
    }
388 8977f3c1 bellard
    FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", status);
389 8977f3c1 bellard
    fdctrl.int_status = status;
390 8977f3c1 bellard
}
391 8977f3c1 bellard
392 8977f3c1 bellard
/* Reset controler */
393 8977f3c1 bellard
static void fdctrl_reset (int do_irq)
394 8977f3c1 bellard
{
395 8977f3c1 bellard
    int i;
396 8977f3c1 bellard
397 8977f3c1 bellard
    FLOPPY_DPRINTF("reset controler\n");
398 8977f3c1 bellard
    fdctrl_reset_irq();
399 8977f3c1 bellard
    /* Initialise controler */
400 8977f3c1 bellard
    fdctrl.cur_drv = 0;
401 8977f3c1 bellard
    /* FIFO state */
402 8977f3c1 bellard
    fdctrl.data_pos = 0;
403 8977f3c1 bellard
    fdctrl.data_len = 0;
404 8977f3c1 bellard
    fdctrl.data_state = FD_STATE_CMD;
405 8977f3c1 bellard
    fdctrl.data_dir = FD_DIR_WRITE;
406 8977f3c1 bellard
    for (i = 0; i < MAX_FD; i++)
407 8977f3c1 bellard
        fd_reset(&fdctrl.drives[i]);
408 8977f3c1 bellard
    fdctrl_reset_fifo();
409 8977f3c1 bellard
    if (do_irq)
410 8977f3c1 bellard
        fdctrl_raise_irq(0x20);
411 8977f3c1 bellard
}
412 8977f3c1 bellard
413 8977f3c1 bellard
/* Status B register : 0x01 (read-only) */
414 8977f3c1 bellard
static uint32_t fdctrl_read_statusB (CPUState *env, uint32_t reg)
415 8977f3c1 bellard
{
416 8977f3c1 bellard
    fdctrl_reset_irq();
417 8977f3c1 bellard
    FLOPPY_DPRINTF("status register: 0x00\n");
418 8977f3c1 bellard
419 8977f3c1 bellard
    return 0;
420 8977f3c1 bellard
}
421 8977f3c1 bellard
422 8977f3c1 bellard
/* Digital output register : 0x02 */
423 8977f3c1 bellard
static uint32_t fdctrl_read_dor (CPUState *env, uint32_t reg)
424 8977f3c1 bellard
{
425 8977f3c1 bellard
    fdrive_t *cur_drv, *drv0, *drv1;
426 8977f3c1 bellard
    uint32_t retval = 0;
427 8977f3c1 bellard
428 8977f3c1 bellard
    drv0 = &fdctrl.drives[fdctrl.bootsel];
429 8977f3c1 bellard
    drv1 = &fdctrl.drives[1 - fdctrl.bootsel];
430 8977f3c1 bellard
    cur_drv = fdctrl.cur_drv == 0 ? drv0 : drv1;
431 8977f3c1 bellard
    /* Drive motors state indicators */
432 8977f3c1 bellard
    retval |= drv1->motor << 5;
433 8977f3c1 bellard
    retval |= drv0->motor << 4;
434 8977f3c1 bellard
    /* DMA enable */
435 8977f3c1 bellard
    retval |= fdctrl.dma_en << 3;
436 8977f3c1 bellard
    /* Reset indicator */
437 8977f3c1 bellard
    retval |= (fdctrl.state & FD_CTRL_RESET) == 0 ? 0x04 : 0;
438 8977f3c1 bellard
    /* Selected drive */
439 8977f3c1 bellard
    retval |= fdctrl.cur_drv;
440 8977f3c1 bellard
    FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
441 8977f3c1 bellard
442 8977f3c1 bellard
    return retval;
443 8977f3c1 bellard
}
444 8977f3c1 bellard
445 8977f3c1 bellard
static void fdctrl_write_dor (CPUState *env, uint32_t reg, uint32_t value)
446 8977f3c1 bellard
{
447 8977f3c1 bellard
    fdrive_t *drv0, *drv1;
448 8977f3c1 bellard
    
449 8977f3c1 bellard
    fdctrl_reset_irq();
450 8977f3c1 bellard
    drv0 = &fdctrl.drives[fdctrl.bootsel];
451 8977f3c1 bellard
    drv1 = &fdctrl.drives[1 - fdctrl.bootsel];
452 8977f3c1 bellard
    /* Reset mode */
453 8977f3c1 bellard
    if (fdctrl.state & FD_CTRL_RESET) {
454 8977f3c1 bellard
        if (!(value & 0x04)) {
455 8977f3c1 bellard
            FLOPPY_DPRINTF("Floppy controler in RESET state !\n");
456 8977f3c1 bellard
            return;
457 8977f3c1 bellard
        }
458 8977f3c1 bellard
    }
459 8977f3c1 bellard
    FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
460 8977f3c1 bellard
    /* Drive motors state indicators */
461 8977f3c1 bellard
    if (value & 0x20)
462 8977f3c1 bellard
        fd_start(drv1);
463 8977f3c1 bellard
    else
464 8977f3c1 bellard
        fd_stop(drv1);
465 8977f3c1 bellard
    if (value & 0x10)
466 8977f3c1 bellard
        fd_start(drv0);
467 8977f3c1 bellard
    else
468 8977f3c1 bellard
        fd_stop(drv0);
469 8977f3c1 bellard
    /* DMA enable */
470 8977f3c1 bellard
#if 0
471 8977f3c1 bellard
    if (fdctrl.dma_chann != -1)
472 8977f3c1 bellard
        fdctrl.dma_en = 1 - ((value >> 3) & 1);
473 8977f3c1 bellard
#endif
474 8977f3c1 bellard
    /* Reset */
475 8977f3c1 bellard
    if (!(value & 0x04)) {
476 8977f3c1 bellard
        if (!(fdctrl.state & FD_CTRL_RESET)) {
477 8977f3c1 bellard
            FLOPPY_DPRINTF("controler enter RESET state\n");
478 8977f3c1 bellard
            fdctrl.state |= FD_CTRL_RESET;
479 8977f3c1 bellard
            fdctrl_reset(1);
480 8977f3c1 bellard
        }
481 8977f3c1 bellard
    } else {
482 8977f3c1 bellard
        if (fdctrl.state & FD_CTRL_RESET) {
483 8977f3c1 bellard
            FLOPPY_DPRINTF("controler out of RESET state\n");
484 8977f3c1 bellard
            fdctrl.state &= ~(FD_CTRL_RESET | FD_CTRL_SLEEP);
485 8977f3c1 bellard
        }
486 8977f3c1 bellard
    }
487 8977f3c1 bellard
    /* Selected drive */
488 8977f3c1 bellard
    fdctrl.cur_drv = value & 1;
489 8977f3c1 bellard
}
490 8977f3c1 bellard
491 8977f3c1 bellard
/* Tape drive register : 0x03 */
492 8977f3c1 bellard
static uint32_t fdctrl_read_tape (CPUState *env, uint32_t reg)
493 8977f3c1 bellard
{
494 8977f3c1 bellard
    uint32_t retval = 0;
495 8977f3c1 bellard
496 8977f3c1 bellard
    fdctrl_reset_irq();
497 8977f3c1 bellard
    /* Disk boot selection indicator */
498 8977f3c1 bellard
    retval |= fdctrl.bootsel << 2;
499 8977f3c1 bellard
    /* Tape indicators: never allowed */
500 8977f3c1 bellard
    FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
501 8977f3c1 bellard
502 8977f3c1 bellard
    return retval;
503 8977f3c1 bellard
}
504 8977f3c1 bellard
505 8977f3c1 bellard
static void fdctrl_write_tape (CPUState *env, uint32_t reg, uint32_t value)
506 8977f3c1 bellard
{
507 8977f3c1 bellard
    fdctrl_reset_irq();
508 8977f3c1 bellard
    /* Reset mode */
509 8977f3c1 bellard
    if (fdctrl.state & FD_CTRL_RESET) {
510 8977f3c1 bellard
        FLOPPY_DPRINTF("Floppy controler in RESET state !\n");
511 8977f3c1 bellard
        return;
512 8977f3c1 bellard
    }
513 8977f3c1 bellard
    FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
514 8977f3c1 bellard
    /* Disk boot selection indicator */
515 8977f3c1 bellard
    fdctrl.bootsel = (value >> 2) & 1;
516 8977f3c1 bellard
    /* Tape indicators: never allow */
517 8977f3c1 bellard
}
518 8977f3c1 bellard
519 8977f3c1 bellard
/* Main status register : 0x04 (read) */
520 8977f3c1 bellard
static uint32_t fdctrl_read_main_status (CPUState *env, uint32_t reg)
521 8977f3c1 bellard
{
522 8977f3c1 bellard
    uint32_t retval = 0;
523 8977f3c1 bellard
524 8977f3c1 bellard
    fdctrl_reset_irq();
525 8977f3c1 bellard
    fdctrl.state &= ~(FD_CTRL_SLEEP | FD_CTRL_RESET);
526 8977f3c1 bellard
    if (!(fdctrl.state & FD_CTRL_BUSY)) {
527 8977f3c1 bellard
        /* Data transfer allowed */
528 8977f3c1 bellard
        retval |= 0x80;
529 8977f3c1 bellard
        /* Data transfer direction indicator */
530 8977f3c1 bellard
        if (fdctrl.data_dir == FD_DIR_READ)
531 8977f3c1 bellard
            retval |= 0x40;
532 8977f3c1 bellard
    }
533 8977f3c1 bellard
    /* Should handle 0x20 for SPECIFY command */
534 8977f3c1 bellard
    /* Command busy indicator */
535 8977f3c1 bellard
    if (FD_STATE(fdctrl.data_state) == FD_STATE_DATA ||
536 8977f3c1 bellard
        FD_STATE(fdctrl.data_state) == FD_STATE_STATUS)
537 8977f3c1 bellard
        retval |= 0x10;
538 8977f3c1 bellard
    FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
539 8977f3c1 bellard
540 8977f3c1 bellard
    return retval;
541 8977f3c1 bellard
}
542 8977f3c1 bellard
543 8977f3c1 bellard
/* Data select rate register : 0x04 (write) */
544 8977f3c1 bellard
static void fdctrl_write_rate (CPUState *env, uint32_t reg, uint32_t value)
545 8977f3c1 bellard
{
546 8977f3c1 bellard
    fdctrl_reset_irq();
547 8977f3c1 bellard
    /* Reset mode */
548 8977f3c1 bellard
    if (fdctrl.state & FD_CTRL_RESET) {
549 8977f3c1 bellard
        if (reg != 0x2 || !(value & 0x04)) {
550 8977f3c1 bellard
            FLOPPY_DPRINTF("Floppy controler in RESET state !\n");
551 8977f3c1 bellard
            return;
552 8977f3c1 bellard
        }
553 8977f3c1 bellard
    }
554 8977f3c1 bellard
    FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
555 8977f3c1 bellard
    /* Reset: autoclear */
556 8977f3c1 bellard
    if (value & 0x80) {
557 8977f3c1 bellard
        fdctrl.state |= FD_CTRL_RESET;
558 8977f3c1 bellard
        fdctrl_reset(1);
559 8977f3c1 bellard
        fdctrl.state &= ~FD_CTRL_RESET;
560 8977f3c1 bellard
    }
561 8977f3c1 bellard
    if (value & 0x40) {
562 8977f3c1 bellard
        fdctrl.state |= FD_CTRL_SLEEP;
563 8977f3c1 bellard
        fdctrl_reset(1);
564 8977f3c1 bellard
    }
565 8977f3c1 bellard
//        fdctrl.precomp = (value >> 2) & 0x07;
566 8977f3c1 bellard
}
567 8977f3c1 bellard
568 8977f3c1 bellard
/* Digital input register : 0x07 (read-only) */
569 8977f3c1 bellard
static uint32_t fdctrl_read_dir (CPUState *env, uint32_t reg)
570 8977f3c1 bellard
{
571 8977f3c1 bellard
    fdrive_t *drv0, *drv1;
572 8977f3c1 bellard
    uint32_t retval = 0;
573 8977f3c1 bellard
574 8977f3c1 bellard
    fdctrl_reset_irq();
575 8977f3c1 bellard
    drv0 = &fdctrl.drives[fdctrl.bootsel];
576 8977f3c1 bellard
    drv1 = &fdctrl.drives[1 - fdctrl.bootsel];
577 8977f3c1 bellard
    if (drv0->rv || drv1->rv)
578 8977f3c1 bellard
        retval |= 0x80;
579 8977f3c1 bellard
    if (retval != 0)
580 8977f3c1 bellard
        FLOPPY_ERROR("Floppy digital input register: 0x%02x\n", retval);
581 8977f3c1 bellard
    drv0->rv = 0;
582 8977f3c1 bellard
    drv1->rv = 0;
583 8977f3c1 bellard
584 8977f3c1 bellard
    return retval;
585 8977f3c1 bellard
}
586 8977f3c1 bellard
587 8977f3c1 bellard
/* FIFO state control */
588 8977f3c1 bellard
static void fdctrl_reset_fifo (void)
589 8977f3c1 bellard
{
590 8977f3c1 bellard
    fdctrl.data_dir = FD_DIR_WRITE;
591 8977f3c1 bellard
    fdctrl.data_pos = 0;
592 8977f3c1 bellard
    fdctrl.data_state = FD_STATE_CMD;
593 8977f3c1 bellard
}
594 8977f3c1 bellard
595 8977f3c1 bellard
/* Set FIFO status for the host to read */
596 8977f3c1 bellard
static void fdctrl_set_fifo (int fifo_len, int do_irq)
597 8977f3c1 bellard
{
598 8977f3c1 bellard
    fdctrl.data_dir = FD_DIR_READ;
599 8977f3c1 bellard
    fdctrl.data_len = fifo_len;
600 8977f3c1 bellard
    fdctrl.data_pos = 0;
601 8977f3c1 bellard
    fdctrl.data_state = FD_STATE_STATUS;
602 8977f3c1 bellard
    if (do_irq)
603 8977f3c1 bellard
        fdctrl_raise_irq(0x00);
604 8977f3c1 bellard
}
605 8977f3c1 bellard
606 8977f3c1 bellard
/* Set an error: unimplemented/unknown command */
607 8977f3c1 bellard
static void fdctrl_unimplemented (void)
608 8977f3c1 bellard
{
609 8977f3c1 bellard
#if 0
610 8977f3c1 bellard
    fdrive_t *cur_drv, *drv0, *drv1;
611 8977f3c1 bellard

612 8977f3c1 bellard
    drv0 = &fdctrl.drives[fdctrl.bootsel];
613 8977f3c1 bellard
    drv1 = &fdctrl.drives[1 - fdctrl.bootsel];
614 8977f3c1 bellard
    cur_drv = fdctrl.cur_drv == 0 ? drv0 : drv1;
615 8977f3c1 bellard
    fdctrl.fifo[0] = 0x60 | (cur_drv->head << 1) | fdctrl.cur_drv;
616 8977f3c1 bellard
    fdctrl.fifo[1] = 0x00;
617 8977f3c1 bellard
    fdctrl.fifo[2] = 0x00;
618 8977f3c1 bellard
    fdctrl_set_fifo(3, 1);
619 8977f3c1 bellard
#else
620 8977f3c1 bellard
    fdctrl_reset_fifo();
621 8977f3c1 bellard
#endif
622 8977f3c1 bellard
}
623 8977f3c1 bellard
624 8977f3c1 bellard
/* Callback for transfer end (stop or abort) */
625 8977f3c1 bellard
static void fdctrl_stop_transfer (uint8_t status0, uint8_t status1,
626 8977f3c1 bellard
                                  uint8_t status2)
627 8977f3c1 bellard
{
628 8977f3c1 bellard
    fdrive_t *cur_drv, *drv0, *drv1;
629 8977f3c1 bellard
630 8977f3c1 bellard
    drv0 = &fdctrl.drives[fdctrl.bootsel];
631 8977f3c1 bellard
    drv1 = &fdctrl.drives[1 - fdctrl.bootsel];
632 8977f3c1 bellard
    cur_drv = fdctrl.cur_drv == 0 ? drv0 : drv1;
633 8977f3c1 bellard
    FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
634 8977f3c1 bellard
                   status0, status1, status2,
635 8977f3c1 bellard
                   status0 | (cur_drv->head << 1) | fdctrl.cur_drv);
636 8977f3c1 bellard
    fdctrl.fifo[0] = status0 | (cur_drv->head << 1) | fdctrl.cur_drv;
637 8977f3c1 bellard
    fdctrl.fifo[1] = status1;
638 8977f3c1 bellard
    fdctrl.fifo[2] = status2;
639 8977f3c1 bellard
    fdctrl.fifo[3] = cur_drv->track;
640 8977f3c1 bellard
    fdctrl.fifo[4] = cur_drv->head;
641 8977f3c1 bellard
    fdctrl.fifo[5] = cur_drv->sect;
642 8977f3c1 bellard
    fdctrl.fifo[6] = FD_SECTOR_SC;
643 8977f3c1 bellard
    fdctrl.data_dir = FD_DIR_READ;
644 8977f3c1 bellard
    if (fdctrl.state & FD_CTRL_BUSY)
645 8977f3c1 bellard
        DMA_release_DREQ(fdctrl.dma_chann);
646 8977f3c1 bellard
    fdctrl_set_fifo(7, 1);
647 8977f3c1 bellard
}
648 8977f3c1 bellard
649 8977f3c1 bellard
/* Prepare a data transfer (either DMA or FIFO) */
650 8977f3c1 bellard
static void fdctrl_start_transfer (int direction)
651 8977f3c1 bellard
{
652 8977f3c1 bellard
    fdrive_t *cur_drv, *drv0, *drv1;
653 8977f3c1 bellard
    uint8_t kh, kt, ks;
654 8977f3c1 bellard
    int did_seek;
655 8977f3c1 bellard
656 8977f3c1 bellard
    drv0 = &fdctrl.drives[fdctrl.bootsel];
657 8977f3c1 bellard
    drv1 = &fdctrl.drives[1 - fdctrl.bootsel];
658 8977f3c1 bellard
    fdctrl.cur_drv = fdctrl.fifo[1] & 1;
659 8977f3c1 bellard
    cur_drv = fdctrl.cur_drv == 0 ? drv0 : drv1;
660 8977f3c1 bellard
    kt = fdctrl.fifo[2];
661 8977f3c1 bellard
    kh = fdctrl.fifo[3];
662 8977f3c1 bellard
    ks = fdctrl.fifo[4];
663 8977f3c1 bellard
    FLOPPY_DPRINTF("Start tranfert at %d %d %02x %02x (%d)\n",
664 8977f3c1 bellard
                   fdctrl.cur_drv, kh, kt, ks,
665 8977f3c1 bellard
                   _fd_sector(kh, kt, ks, cur_drv->last_sect));
666 8977f3c1 bellard
    did_seek = 0;
667 8977f3c1 bellard
    switch (fd_seek(cur_drv, kh, kt, ks, fdctrl.config & 0x40)) {
668 8977f3c1 bellard
    case 2:
669 8977f3c1 bellard
        /* sect too big */
670 8977f3c1 bellard
        fdctrl_stop_transfer(0x40, 0x00, 0x00);
671 8977f3c1 bellard
        fdctrl.fifo[3] = kt;
672 8977f3c1 bellard
        fdctrl.fifo[4] = kh;
673 8977f3c1 bellard
        fdctrl.fifo[5] = ks;
674 8977f3c1 bellard
        return;
675 8977f3c1 bellard
    case 3:
676 8977f3c1 bellard
        /* track too big */
677 8977f3c1 bellard
        fdctrl_stop_transfer(0x40, 0x80, 0x00);
678 8977f3c1 bellard
        fdctrl.fifo[3] = kt;
679 8977f3c1 bellard
        fdctrl.fifo[4] = kh;
680 8977f3c1 bellard
        fdctrl.fifo[5] = ks;
681 8977f3c1 bellard
        return;
682 8977f3c1 bellard
    case 4:
683 8977f3c1 bellard
        /* No seek enabled */
684 8977f3c1 bellard
        fdctrl_stop_transfer(0x40, 0x00, 0x00);
685 8977f3c1 bellard
        fdctrl.fifo[3] = kt;
686 8977f3c1 bellard
        fdctrl.fifo[4] = kh;
687 8977f3c1 bellard
        fdctrl.fifo[5] = ks;
688 8977f3c1 bellard
        return;
689 8977f3c1 bellard
    case 1:
690 8977f3c1 bellard
        did_seek = 1;
691 8977f3c1 bellard
        break;
692 8977f3c1 bellard
    default:
693 8977f3c1 bellard
        break;
694 8977f3c1 bellard
    }
695 8977f3c1 bellard
    /* Set the FIFO state */
696 8977f3c1 bellard
    fdctrl.data_dir = direction;
697 8977f3c1 bellard
    fdctrl.data_pos = 0;
698 8977f3c1 bellard
    fdctrl.data_state = FD_STATE_DATA; /* FIFO ready for data */
699 8977f3c1 bellard
    if (fdctrl.fifo[0] & 0x80)
700 8977f3c1 bellard
        fdctrl.data_state |= FD_STATE_MULTI;
701 8977f3c1 bellard
    if (did_seek)
702 8977f3c1 bellard
        fdctrl.data_state |= FD_STATE_SEEK;
703 8977f3c1 bellard
    if (fdctrl.dma_en) {
704 8977f3c1 bellard
        int dma_mode;
705 8977f3c1 bellard
        /* DMA transfer are enabled. Check if DMA channel is well programmed */
706 8977f3c1 bellard
        dma_mode = DMA_get_channel_mode(fdctrl.dma_chann);
707 8977f3c1 bellard
        dma_mode = (dma_mode >> 2) & 3;
708 8977f3c1 bellard
        FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d)\n", dma_mode, direction,
709 8977f3c1 bellard
                       (128 << fdctrl.fifo[5]) *
710 8977f3c1 bellard
                       (cur_drv->last_sect - ks + 1));
711 8977f3c1 bellard
        if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
712 8977f3c1 bellard
              direction == FD_DIR_SCANH) && dma_mode == 0) ||
713 8977f3c1 bellard
            (direction == FD_DIR_WRITE && dma_mode == 2) ||
714 8977f3c1 bellard
            (direction == FD_DIR_READ && dma_mode == 1)) {
715 8977f3c1 bellard
            /* No access is allowed until DMA transfer has completed */
716 8977f3c1 bellard
            fdctrl.state |= FD_CTRL_BUSY;
717 8977f3c1 bellard
            /* Now, we just have to wait for the DMA controler to
718 8977f3c1 bellard
             * recall us...
719 8977f3c1 bellard
             */
720 8977f3c1 bellard
            DMA_hold_DREQ(fdctrl.dma_chann);
721 f9e92e97 bellard
            DMA_schedule(fdctrl.dma_chann);
722 8977f3c1 bellard
            return;
723 8977f3c1 bellard
        }
724 8977f3c1 bellard
    }
725 8977f3c1 bellard
    FLOPPY_DPRINTF("start non-DMA transfer\n");
726 8977f3c1 bellard
    /* IO based transfer: calculate len */
727 8977f3c1 bellard
    if (fdctrl.fifo[5] == 00) {
728 8977f3c1 bellard
        fdctrl.data_len = fdctrl.fifo[8];
729 8977f3c1 bellard
    } else {
730 8977f3c1 bellard
        fdctrl.data_len = 128 << fdctrl.fifo[5];
731 8977f3c1 bellard
        fdctrl.data_len *= (cur_drv->last_sect - ks + 1);
732 8977f3c1 bellard
        if (fdctrl.fifo[0] & 0x80)
733 8977f3c1 bellard
            fdctrl.data_len *= 2;
734 8977f3c1 bellard
    }
735 8977f3c1 bellard
    fdctrl_raise_irq(0x00);
736 8977f3c1 bellard
737 8977f3c1 bellard
    return;
738 8977f3c1 bellard
}
739 8977f3c1 bellard
740 8977f3c1 bellard
/* Prepare a transfer of deleted data */
741 8977f3c1 bellard
static void fdctrl_start_transfer_del (int direction)
742 8977f3c1 bellard
{
743 8977f3c1 bellard
    /* We don't handle deleted data,
744 8977f3c1 bellard
     * so we don't return *ANYTHING*
745 8977f3c1 bellard
     */
746 8977f3c1 bellard
    fdctrl_stop_transfer(0x60, 0x00, 0x00);
747 8977f3c1 bellard
}
748 8977f3c1 bellard
749 8977f3c1 bellard
/* handlers for DMA transfers */
750 f9e92e97 bellard
/* XXX: the partial transfer logic seems to be broken */
751 f9e92e97 bellard
static int fdctrl_transfer_handler (void *opaque, target_ulong addr, int size)
752 8977f3c1 bellard
{
753 8977f3c1 bellard
    fdrive_t *cur_drv, *drv0, *drv1;
754 8977f3c1 bellard
    int len;
755 8977f3c1 bellard
    uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
756 f9e92e97 bellard
    uint8_t tmpbuf[FD_SECTOR_LEN];
757 8977f3c1 bellard
758 8977f3c1 bellard
    fdctrl_reset_irq();
759 8977f3c1 bellard
    if (!(fdctrl.state & FD_CTRL_BUSY)) {
760 8977f3c1 bellard
        FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
761 8977f3c1 bellard
        return 0;
762 8977f3c1 bellard
    }
763 8977f3c1 bellard
    drv0 = &fdctrl.drives[fdctrl.bootsel];
764 8977f3c1 bellard
    drv1 = &fdctrl.drives[1 - fdctrl.bootsel];
765 8977f3c1 bellard
    cur_drv = fdctrl.cur_drv == 0 ? drv0 : drv1;
766 8977f3c1 bellard
    if (fdctrl.data_dir == FD_DIR_SCANE || fdctrl.data_dir == FD_DIR_SCANL ||
767 8977f3c1 bellard
        fdctrl.data_dir == FD_DIR_SCANH)
768 8977f3c1 bellard
        status2 = 0x04;
769 8977f3c1 bellard
    for (fdctrl.data_len = size; fdctrl.data_pos < fdctrl.data_len;
770 8977f3c1 bellard
         fdctrl.data_pos += len) {
771 8977f3c1 bellard
        len = size - fdctrl.data_pos;
772 8977f3c1 bellard
        if (len > FD_SECTOR_LEN)
773 8977f3c1 bellard
            len = FD_SECTOR_LEN;
774 8977f3c1 bellard
        FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x %02x "
775 8977f3c1 bellard
                       "(%d-0x%08x)\n", len, size, fdctrl.data_pos,
776 8977f3c1 bellard
                       fdctrl.data_len, fdctrl.cur_drv, cur_drv->head,
777 8977f3c1 bellard
                       cur_drv->track, cur_drv->sect, fd_sector(cur_drv),
778 8977f3c1 bellard
                       fd_sector(cur_drv) * 512);
779 8977f3c1 bellard
        if (fdctrl.data_dir != FD_DIR_WRITE) {
780 8977f3c1 bellard
            /* READ & SCAN commands */
781 69e5bc90 bellard
            if (cur_drv->bs == NULL) {
782 69e5bc90 bellard
                fdctrl_stop_transfer(0x40, 0x00, 0x00);
783 69e5bc90 bellard
                goto transfer_error;
784 69e5bc90 bellard
            }
785 f9e92e97 bellard
            if (bdrv_read(cur_drv->bs, fd_sector(cur_drv), tmpbuf, 1) < 0) {
786 8977f3c1 bellard
                FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
787 8977f3c1 bellard
                               fd_sector(cur_drv));
788 8977f3c1 bellard
                /* Sure, image size is too small... */
789 f9e92e97 bellard
                memset(tmpbuf, 0, FD_SECTOR_LEN);
790 8977f3c1 bellard
            }
791 8977f3c1 bellard
            if (fdctrl.data_dir == FD_DIR_READ) {
792 f9e92e97 bellard
                cpu_physical_memory_write(addr + fdctrl.data_pos,
793 f9e92e97 bellard
                                          tmpbuf, len);
794 8977f3c1 bellard
                if (len < FD_SECTOR_LEN) {
795 f9e92e97 bellard
                    memcpy(&fdctrl.fifo[0], tmpbuf + len, FD_SECTOR_LEN - len);
796 f9e92e97 bellard
                    memset(&fdctrl.fifo[FD_SECTOR_LEN - len], 0, len);
797 8977f3c1 bellard
                }
798 8977f3c1 bellard
            } else {
799 8977f3c1 bellard
                int ret;
800 f9e92e97 bellard
                /* XXX: what to do if not enough data ? */
801 f9e92e97 bellard
                cpu_physical_memory_read(addr + fdctrl.data_pos, 
802 f9e92e97 bellard
                                         fdctrl.fifo, len); 
803 f9e92e97 bellard
                if (len < FD_SECTOR_LEN) {
804 f9e92e97 bellard
                    memset(&fdctrl.fifo[len], 0, FD_SECTOR_LEN - len);
805 f9e92e97 bellard
                }
806 f9e92e97 bellard
                ret = memcmp(tmpbuf, fdctrl.fifo, FD_SECTOR_LEN);
807 8977f3c1 bellard
                if (ret == 0) {
808 8977f3c1 bellard
                    status2 = 0x08;
809 8977f3c1 bellard
                    goto end_transfer;
810 8977f3c1 bellard
                }
811 8977f3c1 bellard
                if ((ret < 0 && fdctrl.data_dir == FD_DIR_SCANL) ||
812 8977f3c1 bellard
                    (ret > 0 && fdctrl.data_dir == FD_DIR_SCANH)) {
813 8977f3c1 bellard
                    status2 = 0x00;
814 8977f3c1 bellard
                    goto end_transfer;
815 8977f3c1 bellard
                }
816 8977f3c1 bellard
            }
817 8977f3c1 bellard
        } else {
818 8977f3c1 bellard
            /* WRITE commands */
819 f9e92e97 bellard
            cpu_physical_memory_read(addr + fdctrl.data_pos, tmpbuf, len);
820 f9e92e97 bellard
            if (len < FD_SECTOR_LEN) {
821 f9e92e97 bellard
                memset(tmpbuf + len, 0, FD_SECTOR_LEN - len);
822 f9e92e97 bellard
            }
823 8977f3c1 bellard
            if (cur_drv->bs == NULL ||
824 f9e92e97 bellard
                bdrv_write(cur_drv->bs, fd_sector(cur_drv), tmpbuf, 1) < 0) {
825 8977f3c1 bellard
                FLOPPY_ERROR("writting sector %d\n", fd_sector(cur_drv));
826 8977f3c1 bellard
                fdctrl_stop_transfer(0x60, 0x00, 0x00);
827 8977f3c1 bellard
                goto transfer_error;
828 8977f3c1 bellard
            }
829 8977f3c1 bellard
        }
830 8977f3c1 bellard
        if (len == FD_SECTOR_LEN) {
831 8977f3c1 bellard
            /* Seek to next sector */
832 8977f3c1 bellard
            if (cur_drv->sect == cur_drv->last_sect) {
833 8977f3c1 bellard
                if (cur_drv->head == 0) {
834 8977f3c1 bellard
                    cur_drv->head = 1;
835 8977f3c1 bellard
                } else {
836 8977f3c1 bellard
                    cur_drv->track++;
837 8977f3c1 bellard
                    cur_drv->head = 0;
838 8977f3c1 bellard
                }
839 8977f3c1 bellard
                cur_drv->sect = 1;
840 8977f3c1 bellard
                FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
841 8977f3c1 bellard
                               cur_drv->head, cur_drv->track, cur_drv->sect,
842 8977f3c1 bellard
                               fd_sector(cur_drv));
843 8977f3c1 bellard
                if (cur_drv->head == 0) {
844 8977f3c1 bellard
                    FLOPPY_DPRINTF("end transfer\n");
845 8977f3c1 bellard
                    goto end_transfer;
846 8977f3c1 bellard
                }
847 8977f3c1 bellard
                if (!FD_MULTI_TRACK(fdctrl.data_state)) {
848 8977f3c1 bellard
                    /* Single track read */
849 8977f3c1 bellard
                    FLOPPY_DPRINTF("single track transfert: end transfer\n");
850 8977f3c1 bellard
//                    status1 |= 0x80;
851 8977f3c1 bellard
                    goto end_transfer;
852 8977f3c1 bellard
                }
853 8977f3c1 bellard
            } else {
854 8977f3c1 bellard
                cur_drv->sect++;
855 8977f3c1 bellard
                FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
856 8977f3c1 bellard
                               cur_drv->head, cur_drv->track, cur_drv->sect,
857 8977f3c1 bellard
                               fd_sector(cur_drv));
858 8977f3c1 bellard
            }
859 8977f3c1 bellard
        }
860 8977f3c1 bellard
    }
861 8977f3c1 bellard
end_transfer:
862 8977f3c1 bellard
    if (fdctrl.data_dir == FD_DIR_SCANE ||
863 8977f3c1 bellard
        fdctrl.data_dir == FD_DIR_SCANL ||
864 8977f3c1 bellard
        fdctrl.data_dir == FD_DIR_SCANH)
865 8977f3c1 bellard
        status2 = 0x08;
866 8977f3c1 bellard
    if (FD_DID_SEEK(fdctrl.data_state))
867 8977f3c1 bellard
        status0 |= 0x20;
868 8977f3c1 bellard
    fdctrl_stop_transfer(status0, status1, status2);
869 8977f3c1 bellard
transfer_error:
870 8977f3c1 bellard
871 8977f3c1 bellard
    return fdctrl.data_pos;
872 8977f3c1 bellard
}
873 8977f3c1 bellard
874 8977f3c1 bellard
/* Data register : 0x05 */
875 8977f3c1 bellard
static uint32_t fdctrl_read_data (CPUState *env, uint32_t reg)
876 8977f3c1 bellard
{
877 8977f3c1 bellard
    fdrive_t *cur_drv, *drv0, *drv1;
878 8977f3c1 bellard
    uint32_t retval = 0;
879 8977f3c1 bellard
    int pos, len;
880 8977f3c1 bellard
881 8977f3c1 bellard
    fdctrl_reset_irq();
882 8977f3c1 bellard
    drv0 = &fdctrl.drives[fdctrl.bootsel];
883 8977f3c1 bellard
    drv1 = &fdctrl.drives[1 - fdctrl.bootsel];
884 8977f3c1 bellard
    cur_drv = fdctrl.cur_drv == 0 ? drv0 : drv1;
885 8977f3c1 bellard
    fdctrl.state &= ~FD_CTRL_SLEEP;
886 8977f3c1 bellard
    if (FD_STATE(fdctrl.data_state) == FD_STATE_CMD) {
887 8977f3c1 bellard
        FLOPPY_ERROR("can't read data in CMD state\n");
888 8977f3c1 bellard
        return 0;
889 8977f3c1 bellard
    }
890 8977f3c1 bellard
    pos = fdctrl.data_pos;
891 8977f3c1 bellard
    if (FD_STATE(fdctrl.data_state) == FD_STATE_DATA) {
892 8977f3c1 bellard
        pos %= FD_SECTOR_LEN;
893 8977f3c1 bellard
        if (pos == 0) {
894 8977f3c1 bellard
            len = fdctrl.data_len - fdctrl.data_pos;
895 8977f3c1 bellard
            if (len > FD_SECTOR_LEN)
896 8977f3c1 bellard
                len = FD_SECTOR_LEN;
897 8977f3c1 bellard
            bdrv_read(cur_drv->bs, fd_sector(cur_drv),
898 8977f3c1 bellard
                      fdctrl.fifo, len);
899 8977f3c1 bellard
        }
900 8977f3c1 bellard
    }
901 8977f3c1 bellard
    retval = fdctrl.fifo[pos];
902 8977f3c1 bellard
    if (++fdctrl.data_pos == fdctrl.data_len) {
903 8977f3c1 bellard
        fdctrl.data_pos = 0;
904 8977f3c1 bellard
        /* Switch from transfert mode to status mode
905 8977f3c1 bellard
         * then from status mode to command mode
906 8977f3c1 bellard
         */
907 8977f3c1 bellard
        if (FD_STATE(fdctrl.data_state) == FD_STATE_DATA)
908 8977f3c1 bellard
            fdctrl_stop_transfer(0x20, 0x00, 0x00);
909 8977f3c1 bellard
        else
910 8977f3c1 bellard
            fdctrl_reset_fifo();
911 8977f3c1 bellard
    }
912 8977f3c1 bellard
    FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
913 8977f3c1 bellard
914 8977f3c1 bellard
    return retval;
915 8977f3c1 bellard
}
916 8977f3c1 bellard
917 8977f3c1 bellard
static void fdctrl_write_data (CPUState *env, uint32_t reg, uint32_t value)
918 8977f3c1 bellard
{
919 8977f3c1 bellard
    fdrive_t *cur_drv, *drv0, *drv1;
920 8977f3c1 bellard
921 8977f3c1 bellard
    fdctrl_reset_irq();
922 8977f3c1 bellard
    drv0 = &fdctrl.drives[fdctrl.bootsel];
923 8977f3c1 bellard
    drv1 = &fdctrl.drives[1 - fdctrl.bootsel];
924 8977f3c1 bellard
    cur_drv = fdctrl.cur_drv == 0 ? drv0 : drv1;
925 8977f3c1 bellard
    /* Reset mode */
926 8977f3c1 bellard
    if (fdctrl.state & FD_CTRL_RESET) {
927 8977f3c1 bellard
        FLOPPY_DPRINTF("Floppy controler in RESET state !\n");
928 8977f3c1 bellard
        return;
929 8977f3c1 bellard
    }
930 8977f3c1 bellard
    fdctrl.state &= ~FD_CTRL_SLEEP;
931 8977f3c1 bellard
    if ((fdctrl.data_state & FD_STATE_STATE) == FD_STATE_STATUS) {
932 8977f3c1 bellard
        FLOPPY_ERROR("can't write data in status mode\n");
933 8977f3c1 bellard
        return;
934 8977f3c1 bellard
    }
935 8977f3c1 bellard
    /* Is it write command time ? */
936 8977f3c1 bellard
    if (FD_STATE(fdctrl.data_state) == FD_STATE_DATA) {
937 8977f3c1 bellard
        /* FIFO data write */
938 8977f3c1 bellard
        fdctrl.fifo[fdctrl.data_pos++] = value;
939 8977f3c1 bellard
        if (fdctrl.data_pos % FD_SECTOR_LEN == (FD_SECTOR_LEN - 1) ||
940 8977f3c1 bellard
            fdctrl.data_pos == fdctrl.data_len) {
941 8977f3c1 bellard
            bdrv_write(cur_drv->bs, fd_sector(cur_drv),
942 8977f3c1 bellard
                       fdctrl.fifo, FD_SECTOR_LEN);
943 8977f3c1 bellard
        }
944 8977f3c1 bellard
        /* Switch from transfert mode to status mode
945 8977f3c1 bellard
         * then from status mode to command mode
946 8977f3c1 bellard
         */
947 8977f3c1 bellard
        if (FD_STATE(fdctrl.data_state) == FD_STATE_DATA)
948 8977f3c1 bellard
            fdctrl_stop_transfer(0x20, 0x00, 0x00);
949 8977f3c1 bellard
        return;
950 8977f3c1 bellard
    }
951 8977f3c1 bellard
    if (fdctrl.data_pos == 0) {
952 8977f3c1 bellard
        /* Command */
953 8977f3c1 bellard
        switch (value & 0x5F) {
954 8977f3c1 bellard
        case 0x46:
955 8977f3c1 bellard
            /* READ variants */
956 8977f3c1 bellard
            FLOPPY_DPRINTF("READ command\n");
957 8977f3c1 bellard
            /* 8 parameters cmd */
958 8977f3c1 bellard
            fdctrl.data_len = 9;
959 8977f3c1 bellard
            goto enqueue;
960 8977f3c1 bellard
        case 0x4C:
961 8977f3c1 bellard
            /* READ_DELETED variants */
962 8977f3c1 bellard
            FLOPPY_DPRINTF("READ_DELETED command\n");
963 8977f3c1 bellard
            /* 8 parameters cmd */
964 8977f3c1 bellard
            fdctrl.data_len = 9;
965 8977f3c1 bellard
            goto enqueue;
966 8977f3c1 bellard
        case 0x50:
967 8977f3c1 bellard
            /* SCAN_EQUAL variants */
968 8977f3c1 bellard
            FLOPPY_DPRINTF("SCAN_EQUAL command\n");
969 8977f3c1 bellard
            /* 8 parameters cmd */
970 8977f3c1 bellard
            fdctrl.data_len = 9;
971 8977f3c1 bellard
            goto enqueue;
972 8977f3c1 bellard
        case 0x56:
973 8977f3c1 bellard
            /* VERIFY variants */
974 8977f3c1 bellard
            FLOPPY_DPRINTF("VERIFY command\n");
975 8977f3c1 bellard
            /* 8 parameters cmd */
976 8977f3c1 bellard
            fdctrl.data_len = 9;
977 8977f3c1 bellard
            goto enqueue;
978 8977f3c1 bellard
        case 0x59:
979 8977f3c1 bellard
            /* SCAN_LOW_OR_EQUAL variants */
980 8977f3c1 bellard
            FLOPPY_DPRINTF("SCAN_LOW_OR_EQUAL command\n");
981 8977f3c1 bellard
            /* 8 parameters cmd */
982 8977f3c1 bellard
            fdctrl.data_len = 9;
983 8977f3c1 bellard
            goto enqueue;
984 8977f3c1 bellard
        case 0x5D:
985 8977f3c1 bellard
            /* SCAN_HIGH_OR_EQUAL variants */
986 8977f3c1 bellard
            FLOPPY_DPRINTF("SCAN_HIGH_OR_EQUAL command\n");
987 8977f3c1 bellard
            /* 8 parameters cmd */
988 8977f3c1 bellard
            fdctrl.data_len = 9;
989 8977f3c1 bellard
            goto enqueue;
990 8977f3c1 bellard
        default:
991 8977f3c1 bellard
            break;
992 8977f3c1 bellard
        }
993 8977f3c1 bellard
        switch (value & 0x7F) {
994 8977f3c1 bellard
        case 0x45:
995 8977f3c1 bellard
            /* WRITE variants */
996 8977f3c1 bellard
            FLOPPY_DPRINTF("WRITE command\n");
997 8977f3c1 bellard
            /* 8 parameters cmd */
998 8977f3c1 bellard
            fdctrl.data_len = 9;
999 8977f3c1 bellard
            goto enqueue;
1000 8977f3c1 bellard
        case 0x49:
1001 8977f3c1 bellard
            /* WRITE_DELETED variants */
1002 8977f3c1 bellard
            FLOPPY_DPRINTF("WRITE_DELETED command\n");
1003 8977f3c1 bellard
            /* 8 parameters cmd */
1004 8977f3c1 bellard
            fdctrl.data_len = 9;
1005 8977f3c1 bellard
            goto enqueue;
1006 8977f3c1 bellard
        default:
1007 8977f3c1 bellard
            break;
1008 8977f3c1 bellard
        }
1009 8977f3c1 bellard
        switch (value) {
1010 8977f3c1 bellard
        case 0x03:
1011 8977f3c1 bellard
            /* SPECIFY */
1012 8977f3c1 bellard
            FLOPPY_DPRINTF("SPECIFY command\n");
1013 8977f3c1 bellard
            /* 1 parameter cmd */
1014 8977f3c1 bellard
            fdctrl.data_len = 3;
1015 8977f3c1 bellard
            goto enqueue;
1016 8977f3c1 bellard
        case 0x04:
1017 8977f3c1 bellard
            /* SENSE_DRIVE_STATUS */
1018 8977f3c1 bellard
            FLOPPY_DPRINTF("SENSE_DRIVE_STATUS command\n");
1019 8977f3c1 bellard
            /* 1 parameter cmd */
1020 8977f3c1 bellard
            fdctrl.data_len = 2;
1021 8977f3c1 bellard
            goto enqueue;
1022 8977f3c1 bellard
        case 0x07:
1023 8977f3c1 bellard
            /* RECALIBRATE */
1024 8977f3c1 bellard
            FLOPPY_DPRINTF("RECALIBRATE command\n");
1025 8977f3c1 bellard
            /* 1 parameter cmd */
1026 8977f3c1 bellard
            fdctrl.data_len = 2;
1027 8977f3c1 bellard
            goto enqueue;
1028 8977f3c1 bellard
        case 0x08:
1029 8977f3c1 bellard
            /* SENSE_INTERRUPT_STATUS */
1030 8977f3c1 bellard
            FLOPPY_DPRINTF("SENSE_INTERRUPT_STATUS command (%02x)\n",
1031 8977f3c1 bellard
                           fdctrl.int_status);
1032 8977f3c1 bellard
            /* No parameters cmd: returns status if no interrupt */
1033 8977f3c1 bellard
            fdctrl.fifo[0] =
1034 8977f3c1 bellard
                fdctrl.int_status | (cur_drv->head << 2) | fdctrl.cur_drv;
1035 8977f3c1 bellard
            fdctrl.fifo[1] = cur_drv->track;
1036 8977f3c1 bellard
            fdctrl_set_fifo(2, 0);
1037 8977f3c1 bellard
            return;
1038 8977f3c1 bellard
        case 0x0E:
1039 8977f3c1 bellard
            /* DUMPREG */
1040 8977f3c1 bellard
            FLOPPY_DPRINTF("DUMPREG command\n");
1041 8977f3c1 bellard
            /* Drives position */
1042 8977f3c1 bellard
            fdctrl.fifo[0] = drv0->track;
1043 8977f3c1 bellard
            fdctrl.fifo[1] = drv1->track;
1044 8977f3c1 bellard
            fdctrl.fifo[2] = 0;
1045 8977f3c1 bellard
            fdctrl.fifo[3] = 0;
1046 8977f3c1 bellard
            /* timers */
1047 8977f3c1 bellard
            fdctrl.fifo[4] = fdctrl.timer0;
1048 8977f3c1 bellard
            fdctrl.fifo[5] = (fdctrl.timer1 << 1) | fdctrl.dma_en;
1049 8977f3c1 bellard
            fdctrl.fifo[6] = cur_drv->last_sect;
1050 8977f3c1 bellard
            fdctrl.fifo[7] = (fdctrl.lock << 7) |
1051 8977f3c1 bellard
                    (cur_drv->perpendicular << 2);
1052 8977f3c1 bellard
            fdctrl.fifo[8] = fdctrl.config;
1053 8977f3c1 bellard
            fdctrl.fifo[9] = fdctrl.precomp_trk;
1054 8977f3c1 bellard
            fdctrl_set_fifo(10, 0);
1055 8977f3c1 bellard
            return;
1056 8977f3c1 bellard
        case 0x0F:
1057 8977f3c1 bellard
            /* SEEK */
1058 8977f3c1 bellard
            FLOPPY_DPRINTF("SEEK command\n");
1059 8977f3c1 bellard
            /* 2 parameters cmd */
1060 8977f3c1 bellard
            fdctrl.data_len = 3;
1061 8977f3c1 bellard
            goto enqueue;
1062 8977f3c1 bellard
        case 0x10:
1063 8977f3c1 bellard
            /* VERSION */
1064 8977f3c1 bellard
            FLOPPY_DPRINTF("VERSION command\n");
1065 8977f3c1 bellard
            /* No parameters cmd */
1066 8977f3c1 bellard
            /* Controler's version */
1067 8977f3c1 bellard
            fdctrl.fifo[0] = fdctrl.version;
1068 8977f3c1 bellard
            fdctrl_set_fifo(1, 1);
1069 8977f3c1 bellard
            return;
1070 8977f3c1 bellard
        case 0x12:
1071 8977f3c1 bellard
            /* PERPENDICULAR_MODE */
1072 8977f3c1 bellard
            FLOPPY_DPRINTF("PERPENDICULAR_MODE command\n");
1073 8977f3c1 bellard
            /* 1 parameter cmd */
1074 8977f3c1 bellard
            fdctrl.data_len = 2;
1075 8977f3c1 bellard
            goto enqueue;
1076 8977f3c1 bellard
        case 0x13:
1077 8977f3c1 bellard
            /* CONFIGURE */
1078 8977f3c1 bellard
            FLOPPY_DPRINTF("CONFIGURE command\n");
1079 8977f3c1 bellard
            /* 3 parameters cmd */
1080 8977f3c1 bellard
            fdctrl.data_len = 4;
1081 8977f3c1 bellard
            goto enqueue;
1082 8977f3c1 bellard
        case 0x14:
1083 8977f3c1 bellard
            /* UNLOCK */
1084 8977f3c1 bellard
            FLOPPY_DPRINTF("UNLOCK command\n");
1085 8977f3c1 bellard
            /* No parameters cmd */
1086 8977f3c1 bellard
            fdctrl.lock = 0;
1087 8977f3c1 bellard
            fdctrl.fifo[0] = 0;
1088 8977f3c1 bellard
            fdctrl_set_fifo(1, 0);
1089 8977f3c1 bellard
            return;
1090 8977f3c1 bellard
        case 0x17:
1091 8977f3c1 bellard
            /* POWERDOWN_MODE */
1092 8977f3c1 bellard
            FLOPPY_DPRINTF("POWERDOWN_MODE command\n");
1093 8977f3c1 bellard
            /* 2 parameters cmd */
1094 8977f3c1 bellard
            fdctrl.data_len = 3;
1095 8977f3c1 bellard
            goto enqueue;
1096 8977f3c1 bellard
        case 0x18:
1097 8977f3c1 bellard
            /* PART_ID */
1098 8977f3c1 bellard
            FLOPPY_DPRINTF("PART_ID command\n");
1099 8977f3c1 bellard
            /* No parameters cmd */
1100 8977f3c1 bellard
            fdctrl.fifo[0] = 0x41; /* Stepping 1 */
1101 8977f3c1 bellard
            fdctrl_set_fifo(1, 0);
1102 8977f3c1 bellard
            return;
1103 8977f3c1 bellard
        case 0x2C:
1104 8977f3c1 bellard
            /* SAVE */
1105 8977f3c1 bellard
            FLOPPY_DPRINTF("SAVE command\n");
1106 8977f3c1 bellard
            /* No parameters cmd */
1107 8977f3c1 bellard
            fdctrl.fifo[0] = 0;
1108 8977f3c1 bellard
            fdctrl.fifo[1] = 0;
1109 8977f3c1 bellard
            /* Drives position */
1110 8977f3c1 bellard
            fdctrl.fifo[2] = drv0->track;
1111 8977f3c1 bellard
            fdctrl.fifo[3] = drv1->track;
1112 8977f3c1 bellard
            fdctrl.fifo[4] = 0;
1113 8977f3c1 bellard
            fdctrl.fifo[5] = 0;
1114 8977f3c1 bellard
            /* timers */
1115 8977f3c1 bellard
            fdctrl.fifo[6] = fdctrl.timer0;
1116 8977f3c1 bellard
            fdctrl.fifo[7] = fdctrl.timer1;
1117 8977f3c1 bellard
            fdctrl.fifo[8] = cur_drv->last_sect;
1118 8977f3c1 bellard
            fdctrl.fifo[9] = (fdctrl.lock << 7) |
1119 8977f3c1 bellard
                    (cur_drv->perpendicular << 2);
1120 8977f3c1 bellard
            fdctrl.fifo[10] = fdctrl.config;
1121 8977f3c1 bellard
            fdctrl.fifo[11] = fdctrl.precomp_trk;
1122 8977f3c1 bellard
            fdctrl.fifo[12] = fdctrl.pwrd;
1123 8977f3c1 bellard
            fdctrl.fifo[13] = 0;
1124 8977f3c1 bellard
            fdctrl.fifo[14] = 0;
1125 8977f3c1 bellard
            fdctrl_set_fifo(15, 1);
1126 8977f3c1 bellard
            return;
1127 8977f3c1 bellard
        case 0x33:
1128 8977f3c1 bellard
            /* OPTION */
1129 8977f3c1 bellard
            FLOPPY_DPRINTF("OPTION command\n");
1130 8977f3c1 bellard
            /* 1 parameter cmd */
1131 8977f3c1 bellard
            fdctrl.data_len = 2;
1132 8977f3c1 bellard
            goto enqueue;
1133 8977f3c1 bellard
        case 0x42:
1134 8977f3c1 bellard
            /* READ_TRACK */
1135 8977f3c1 bellard
            FLOPPY_DPRINTF("READ_TRACK command\n");
1136 8977f3c1 bellard
            /* 8 parameters cmd */
1137 8977f3c1 bellard
            fdctrl.data_len = 9;
1138 8977f3c1 bellard
            goto enqueue;
1139 8977f3c1 bellard
        case 0x4A:
1140 8977f3c1 bellard
            /* READ_ID */
1141 8977f3c1 bellard
            FLOPPY_DPRINTF("READ_ID command\n");
1142 8977f3c1 bellard
            /* 1 parameter cmd */
1143 8977f3c1 bellard
            fdctrl.data_len = 2;
1144 8977f3c1 bellard
            goto enqueue;
1145 8977f3c1 bellard
        case 0x4C:
1146 8977f3c1 bellard
            /* RESTORE */
1147 8977f3c1 bellard
            FLOPPY_DPRINTF("RESTORE command\n");
1148 8977f3c1 bellard
            /* 17 parameters cmd */
1149 8977f3c1 bellard
            fdctrl.data_len = 18;
1150 8977f3c1 bellard
            goto enqueue;
1151 8977f3c1 bellard
        case 0x4D:
1152 8977f3c1 bellard
            /* FORMAT_TRACK */
1153 8977f3c1 bellard
            FLOPPY_DPRINTF("FORMAT_TRACK command\n");
1154 8977f3c1 bellard
            /* 5 parameters cmd */
1155 8977f3c1 bellard
            fdctrl.data_len = 9;
1156 8977f3c1 bellard
            goto enqueue;
1157 8977f3c1 bellard
        case 0x8E:
1158 8977f3c1 bellard
            /* DRIVE_SPECIFICATION_COMMAND */
1159 8977f3c1 bellard
            FLOPPY_DPRINTF("DRIVE_SPECIFICATION_COMMAND command\n");
1160 8977f3c1 bellard
            /* 5 parameters cmd */
1161 8977f3c1 bellard
            fdctrl.data_len = 6;
1162 8977f3c1 bellard
            goto enqueue;
1163 8977f3c1 bellard
        case 0x8F:
1164 8977f3c1 bellard
            /* RELATIVE_SEEK_OUT */
1165 8977f3c1 bellard
            FLOPPY_DPRINTF("RELATIVE_SEEK_OUT command\n");
1166 8977f3c1 bellard
            /* 2 parameters cmd */
1167 8977f3c1 bellard
            fdctrl.data_len = 3;
1168 8977f3c1 bellard
            goto enqueue;
1169 8977f3c1 bellard
        case 0x94:
1170 8977f3c1 bellard
            /* LOCK */
1171 8977f3c1 bellard
            FLOPPY_DPRINTF("LOCK command\n");
1172 8977f3c1 bellard
            /* No parameters cmd */
1173 8977f3c1 bellard
            fdctrl.lock = 1;
1174 8977f3c1 bellard
            fdctrl.fifo[0] = 0x10;
1175 8977f3c1 bellard
            fdctrl_set_fifo(1, 1);
1176 8977f3c1 bellard
            return;
1177 8977f3c1 bellard
        case 0xCD:
1178 8977f3c1 bellard
            /* FORMAT_AND_WRITE */
1179 8977f3c1 bellard
            FLOPPY_DPRINTF("FORMAT_AND_WRITE command\n");
1180 8977f3c1 bellard
            /* 10 parameters cmd */
1181 8977f3c1 bellard
            fdctrl.data_len = 11;
1182 8977f3c1 bellard
            goto enqueue;
1183 8977f3c1 bellard
        case 0xCF:
1184 8977f3c1 bellard
            /* RELATIVE_SEEK_IN */
1185 8977f3c1 bellard
            FLOPPY_DPRINTF("RELATIVE_SEEK_IN command\n");
1186 8977f3c1 bellard
            /* 2 parameters cmd */
1187 8977f3c1 bellard
            fdctrl.data_len = 3;
1188 8977f3c1 bellard
            goto enqueue;
1189 8977f3c1 bellard
        default:
1190 8977f3c1 bellard
            /* Unknown command */
1191 8977f3c1 bellard
            FLOPPY_ERROR("unknown command: 0x%02x\n", value);
1192 8977f3c1 bellard
            fdctrl_unimplemented();
1193 8977f3c1 bellard
            return;
1194 8977f3c1 bellard
        }
1195 8977f3c1 bellard
    }
1196 8977f3c1 bellard
enqueue:
1197 8977f3c1 bellard
    fdctrl.fifo[fdctrl.data_pos] = value;
1198 8977f3c1 bellard
    if (++fdctrl.data_pos == fdctrl.data_len) {
1199 8977f3c1 bellard
        /* We now have all parameters
1200 8977f3c1 bellard
         * and will be able to treat the command
1201 8977f3c1 bellard
         */
1202 8977f3c1 bellard
        switch (fdctrl.fifo[0] & 0x1F) {
1203 8977f3c1 bellard
        case 0x06:
1204 8977f3c1 bellard
        {
1205 8977f3c1 bellard
            /* READ variants */
1206 8977f3c1 bellard
            FLOPPY_DPRINTF("treat READ command\n");
1207 8977f3c1 bellard
            fdctrl_start_transfer(FD_DIR_READ);
1208 8977f3c1 bellard
            return;
1209 8977f3c1 bellard
        }
1210 8977f3c1 bellard
        case 0x0C:
1211 8977f3c1 bellard
            /* READ_DELETED variants */
1212 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat READ_DELETED command\n");
1213 8977f3c1 bellard
            FLOPPY_ERROR("treat READ_DELETED command\n");
1214 8977f3c1 bellard
            fdctrl_start_transfer_del(1);
1215 8977f3c1 bellard
            return;
1216 8977f3c1 bellard
        case 0x16:
1217 8977f3c1 bellard
            /* VERIFY variants */
1218 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat VERIFY command\n");
1219 8977f3c1 bellard
            FLOPPY_ERROR("treat VERIFY command\n");
1220 8977f3c1 bellard
            fdctrl_stop_transfer(0x20, 0x00, 0x00);
1221 8977f3c1 bellard
            return;
1222 8977f3c1 bellard
        case 0x10:
1223 8977f3c1 bellard
            /* SCAN_EQUAL variants */
1224 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat SCAN_EQUAL command\n");
1225 8977f3c1 bellard
            FLOPPY_ERROR("treat SCAN_EQUAL command\n");
1226 8977f3c1 bellard
            fdctrl_start_transfer(FD_DIR_SCANE);
1227 8977f3c1 bellard
            return;
1228 8977f3c1 bellard
        case 0x19:
1229 8977f3c1 bellard
            /* SCAN_LOW_OR_EQUAL variants */
1230 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat SCAN_LOW_OR_EQUAL command\n");
1231 8977f3c1 bellard
            FLOPPY_ERROR("treat SCAN_LOW_OR_EQUAL command\n");
1232 8977f3c1 bellard
            fdctrl_start_transfer(FD_DIR_SCANL);
1233 8977f3c1 bellard
            return;
1234 8977f3c1 bellard
        case 0x1D:
1235 8977f3c1 bellard
            /* SCAN_HIGH_OR_EQUAL variants */
1236 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat SCAN_HIGH_OR_EQUAL command\n");
1237 8977f3c1 bellard
            FLOPPY_ERROR("treat SCAN_HIGH_OR_EQUAL command\n");
1238 8977f3c1 bellard
            fdctrl_start_transfer(FD_DIR_SCANH);
1239 8977f3c1 bellard
            return;
1240 8977f3c1 bellard
        default:
1241 8977f3c1 bellard
            break;
1242 8977f3c1 bellard
        }
1243 8977f3c1 bellard
        switch (fdctrl.fifo[0] & 0x3F) {
1244 8977f3c1 bellard
        case 0x05:
1245 8977f3c1 bellard
            /* WRITE variants */
1246 8977f3c1 bellard
            FLOPPY_DPRINTF("treat WRITE command (%02x)\n", fdctrl.fifo[0]);
1247 8977f3c1 bellard
            fdctrl_start_transfer(FD_DIR_WRITE);
1248 8977f3c1 bellard
            return;
1249 8977f3c1 bellard
        case 0x09:
1250 8977f3c1 bellard
            /* WRITE_DELETED variants */
1251 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat WRITE_DELETED command\n");
1252 8977f3c1 bellard
            FLOPPY_ERROR("treat WRITE_DELETED command\n");
1253 8977f3c1 bellard
            fdctrl_start_transfer_del(FD_DIR_WRITE);
1254 8977f3c1 bellard
            return;
1255 8977f3c1 bellard
        default:
1256 8977f3c1 bellard
            break;
1257 8977f3c1 bellard
        }
1258 8977f3c1 bellard
        switch (fdctrl.fifo[0]) {
1259 8977f3c1 bellard
        case 0x03:
1260 8977f3c1 bellard
            /* SPECIFY */
1261 8977f3c1 bellard
            FLOPPY_DPRINTF("treat SPECIFY command\n");
1262 8977f3c1 bellard
            fdctrl.timer0 = (fdctrl.fifo[1] >> 4) & 0xF;
1263 8977f3c1 bellard
            fdctrl.timer1 = fdctrl.fifo[1] >> 1;
1264 8977f3c1 bellard
            /* No result back */
1265 8977f3c1 bellard
            fdctrl_reset_fifo();
1266 8977f3c1 bellard
            break;
1267 8977f3c1 bellard
        case 0x04:
1268 8977f3c1 bellard
            /* SENSE_DRIVE_STATUS */
1269 8977f3c1 bellard
            FLOPPY_DPRINTF("treat SENSE_DRIVE_STATUS command\n");
1270 8977f3c1 bellard
            fdctrl.cur_drv = fdctrl.fifo[1] & 1;
1271 8977f3c1 bellard
            cur_drv = fdctrl.cur_drv == 0 ? drv0 : drv1;
1272 8977f3c1 bellard
            cur_drv->head = (fdctrl.fifo[1] >> 2) & 1;
1273 8977f3c1 bellard
            /* 1 Byte status back */
1274 8977f3c1 bellard
            fdctrl.fifo[0] = (cur_drv->ro << 6) |
1275 8977f3c1 bellard
                (cur_drv->track == 0 ? 0x10 : 0x00) |
1276 8977f3c1 bellard
                fdctrl.cur_drv;
1277 8977f3c1 bellard
            fdctrl_set_fifo(1, 0);
1278 8977f3c1 bellard
            break;
1279 8977f3c1 bellard
        case 0x07:
1280 8977f3c1 bellard
            /* RECALIBRATE */
1281 8977f3c1 bellard
            FLOPPY_DPRINTF("treat RECALIBRATE command\n");
1282 8977f3c1 bellard
            fdctrl.cur_drv = fdctrl.fifo[1] & 1;
1283 8977f3c1 bellard
            cur_drv = fdctrl.cur_drv == 0 ? drv0 : drv1;
1284 8977f3c1 bellard
            fd_recalibrate(cur_drv);
1285 8977f3c1 bellard
            fdctrl_reset_fifo();
1286 8977f3c1 bellard
            /* Raise Interrupt */
1287 8977f3c1 bellard
            fdctrl_raise_irq(0x20);
1288 8977f3c1 bellard
            break;
1289 8977f3c1 bellard
        case 0x0F:
1290 8977f3c1 bellard
            /* SEEK */
1291 8977f3c1 bellard
            FLOPPY_DPRINTF("treat SEEK command\n");
1292 8977f3c1 bellard
            fdctrl.cur_drv = fdctrl.fifo[1] & 1;
1293 8977f3c1 bellard
            cur_drv = fdctrl.cur_drv == 0 ? drv0 : drv1;
1294 8977f3c1 bellard
            if (fdctrl.fifo[2] <= cur_drv->track)
1295 8977f3c1 bellard
                cur_drv->dir = 1;
1296 8977f3c1 bellard
            else
1297 8977f3c1 bellard
                cur_drv->dir = 0;
1298 8977f3c1 bellard
            cur_drv->head = (fdctrl.fifo[1] >> 2) & 1;
1299 8977f3c1 bellard
            if (fdctrl.fifo[2] > cur_drv->max_track) {
1300 8977f3c1 bellard
                fdctrl_raise_irq(0x60);
1301 8977f3c1 bellard
            } else {
1302 8977f3c1 bellard
                cur_drv->track = fdctrl.fifo[2];
1303 8977f3c1 bellard
                fdctrl_reset_fifo();
1304 8977f3c1 bellard
                /* Raise Interrupt */
1305 8977f3c1 bellard
                fdctrl_raise_irq(0x20);
1306 8977f3c1 bellard
            }
1307 8977f3c1 bellard
            break;
1308 8977f3c1 bellard
        case 0x12:
1309 8977f3c1 bellard
            /* PERPENDICULAR_MODE */
1310 8977f3c1 bellard
            FLOPPY_DPRINTF("treat PERPENDICULAR_MODE command\n");
1311 8977f3c1 bellard
            if (fdctrl.fifo[1] & 0x80)
1312 8977f3c1 bellard
                cur_drv->perpendicular = fdctrl.fifo[1] & 0x7;
1313 8977f3c1 bellard
            /* No result back */
1314 8977f3c1 bellard
            fdctrl_reset_fifo();
1315 8977f3c1 bellard
            break;
1316 8977f3c1 bellard
        case 0x13:
1317 8977f3c1 bellard
            /* CONFIGURE */
1318 8977f3c1 bellard
            FLOPPY_DPRINTF("treat CONFIGURE command\n");
1319 8977f3c1 bellard
            fdctrl.config = fdctrl.fifo[2];
1320 8977f3c1 bellard
            fdctrl.precomp_trk =  fdctrl.fifo[3];
1321 8977f3c1 bellard
            /* No result back */
1322 8977f3c1 bellard
            fdctrl_reset_fifo();
1323 8977f3c1 bellard
            break;
1324 8977f3c1 bellard
        case 0x17:
1325 8977f3c1 bellard
            /* POWERDOWN_MODE */
1326 8977f3c1 bellard
            FLOPPY_DPRINTF("treat POWERDOWN_MODE command\n");
1327 8977f3c1 bellard
            fdctrl.pwrd = fdctrl.fifo[1];
1328 8977f3c1 bellard
            fdctrl.fifo[0] = fdctrl.fifo[1];
1329 8977f3c1 bellard
            fdctrl_set_fifo(1, 1);
1330 8977f3c1 bellard
            break;
1331 8977f3c1 bellard
        case 0x33:
1332 8977f3c1 bellard
            /* OPTION */
1333 8977f3c1 bellard
            FLOPPY_DPRINTF("treat OPTION command\n");
1334 8977f3c1 bellard
            /* No result back */
1335 8977f3c1 bellard
            fdctrl_reset_fifo();
1336 8977f3c1 bellard
            break;
1337 8977f3c1 bellard
        case 0x42:
1338 8977f3c1 bellard
            /* READ_TRACK */
1339 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat READ_TRACK command\n");
1340 8977f3c1 bellard
            FLOPPY_ERROR("treat READ_TRACK command\n");
1341 8977f3c1 bellard
            fdctrl_unimplemented();
1342 8977f3c1 bellard
            break;
1343 8977f3c1 bellard
        case 0x4A:
1344 8977f3c1 bellard
                /* READ_ID */
1345 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat READ_ID command\n");
1346 8977f3c1 bellard
            FLOPPY_ERROR("treat READ_ID command\n");
1347 8977f3c1 bellard
            fdctrl_stop_transfer(0x00, 0x00, 0x00);
1348 8977f3c1 bellard
            break;
1349 8977f3c1 bellard
        case 0x4C:
1350 8977f3c1 bellard
            /* RESTORE */
1351 8977f3c1 bellard
            FLOPPY_DPRINTF("treat RESTORE command\n");
1352 8977f3c1 bellard
            /* Drives position */
1353 8977f3c1 bellard
            drv0->track = fdctrl.fifo[3];
1354 8977f3c1 bellard
            drv1->track = fdctrl.fifo[4];
1355 8977f3c1 bellard
            /* timers */
1356 8977f3c1 bellard
            fdctrl.timer0 = fdctrl.fifo[7];
1357 8977f3c1 bellard
            fdctrl.timer1 = fdctrl.fifo[8];
1358 8977f3c1 bellard
            cur_drv->last_sect = fdctrl.fifo[9];
1359 8977f3c1 bellard
            fdctrl.lock = fdctrl.fifo[10] >> 7;
1360 8977f3c1 bellard
            cur_drv->perpendicular = (fdctrl.fifo[10] >> 2) & 0xF;
1361 8977f3c1 bellard
            fdctrl.config = fdctrl.fifo[11];
1362 8977f3c1 bellard
            fdctrl.precomp_trk = fdctrl.fifo[12];
1363 8977f3c1 bellard
            fdctrl.pwrd = fdctrl.fifo[13];
1364 8977f3c1 bellard
            fdctrl_reset_fifo();
1365 8977f3c1 bellard
            break;
1366 8977f3c1 bellard
        case 0x4D:
1367 8977f3c1 bellard
            /* FORMAT_TRACK */
1368 8977f3c1 bellard
//                FLOPPY_DPRINTF("treat FORMAT_TRACK command\n");
1369 8977f3c1 bellard
            FLOPPY_ERROR("treat FORMAT_TRACK command\n");
1370 8977f3c1 bellard
            fdctrl_unimplemented();
1371 8977f3c1 bellard
            break;
1372 8977f3c1 bellard
        case 0x8E:
1373 8977f3c1 bellard
            /* DRIVE_SPECIFICATION_COMMAND */
1374 8977f3c1 bellard
            FLOPPY_DPRINTF("treat DRIVE_SPECIFICATION_COMMAND command\n");
1375 8977f3c1 bellard
            if (fdctrl.fifo[fdctrl.data_pos - 1] & 0x80) {
1376 8977f3c1 bellard
                /* Command parameters done */
1377 8977f3c1 bellard
                if (fdctrl.fifo[fdctrl.data_pos - 1] & 0x40) {
1378 8977f3c1 bellard
                    fdctrl.fifo[0] = fdctrl.fifo[1];
1379 8977f3c1 bellard
                    fdctrl.fifo[2] = 0;
1380 8977f3c1 bellard
                    fdctrl.fifo[3] = 0;
1381 8977f3c1 bellard
                    fdctrl_set_fifo(4, 1);
1382 8977f3c1 bellard
                } else {
1383 8977f3c1 bellard
                    fdctrl_reset_fifo();
1384 8977f3c1 bellard
                }
1385 8977f3c1 bellard
            } else if (fdctrl.data_len > 7) {
1386 8977f3c1 bellard
                /* ERROR */
1387 8977f3c1 bellard
                fdctrl.fifo[0] = 0x80 |
1388 8977f3c1 bellard
                    (cur_drv->head << 2) | fdctrl.cur_drv;
1389 8977f3c1 bellard
                fdctrl_set_fifo(1, 1);
1390 8977f3c1 bellard
            }
1391 8977f3c1 bellard
            break;
1392 8977f3c1 bellard
        case 0x8F:
1393 8977f3c1 bellard
            /* RELATIVE_SEEK_OUT */
1394 8977f3c1 bellard
            FLOPPY_DPRINTF("treat RELATIVE_SEEK_OUT command\n");
1395 8977f3c1 bellard
            fdctrl.cur_drv = fdctrl.fifo[1] & 1;
1396 8977f3c1 bellard
            cur_drv = fdctrl.cur_drv == 0 ? drv0 : drv1;
1397 8977f3c1 bellard
            cur_drv->head = (fdctrl.fifo[1] >> 2) & 1;
1398 8977f3c1 bellard
            if (fdctrl.fifo[2] + cur_drv->track > cur_drv->max_track) {
1399 8977f3c1 bellard
                /* ERROR */
1400 8977f3c1 bellard
                fdctrl_raise_irq(0x70);
1401 8977f3c1 bellard
            } else {
1402 8977f3c1 bellard
                cur_drv->track += fdctrl.fifo[2];
1403 8977f3c1 bellard
                cur_drv->dir = 0;
1404 8977f3c1 bellard
                fdctrl_reset_fifo();
1405 8977f3c1 bellard
                fdctrl_raise_irq(0x20);
1406 8977f3c1 bellard
            }
1407 8977f3c1 bellard
            break;
1408 8977f3c1 bellard
        case 0xCD:
1409 8977f3c1 bellard
            /* FORMAT_AND_WRITE */
1410 8977f3c1 bellard
//                FLOPPY_DPRINTF("treat FORMAT_AND_WRITE command\n");
1411 8977f3c1 bellard
            FLOPPY_ERROR("treat FORMAT_AND_WRITE command\n");
1412 8977f3c1 bellard
            fdctrl_unimplemented();
1413 8977f3c1 bellard
            break;
1414 8977f3c1 bellard
        case 0xCF:
1415 8977f3c1 bellard
                /* RELATIVE_SEEK_IN */
1416 8977f3c1 bellard
            FLOPPY_DPRINTF("treat RELATIVE_SEEK_IN command\n");
1417 8977f3c1 bellard
            fdctrl.cur_drv = fdctrl.fifo[1] & 1;
1418 8977f3c1 bellard
            cur_drv = fdctrl.cur_drv == 0 ? drv0 : drv1;
1419 8977f3c1 bellard
            cur_drv->head = (fdctrl.fifo[1] >> 2) & 1;
1420 8977f3c1 bellard
            if (fdctrl.fifo[2] > cur_drv->track) {
1421 8977f3c1 bellard
                /* ERROR */
1422 8977f3c1 bellard
                fdctrl_raise_irq(0x60);
1423 8977f3c1 bellard
            } else {
1424 8977f3c1 bellard
                fdctrl_reset_fifo();
1425 8977f3c1 bellard
                cur_drv->track -= fdctrl.fifo[2];
1426 8977f3c1 bellard
                cur_drv->dir = 1;
1427 8977f3c1 bellard
                /* Raise Interrupt */
1428 8977f3c1 bellard
                fdctrl_raise_irq(0x20);
1429 8977f3c1 bellard
            }
1430 8977f3c1 bellard
            break;
1431 8977f3c1 bellard
        }
1432 8977f3c1 bellard
    }
1433 8977f3c1 bellard
}