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1 | ad96090a | Blue Swirl | /*
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2 | ad96090a | Blue Swirl | * QEMU System Emulator
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3 | ad96090a | Blue Swirl | *
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4 | ad96090a | Blue Swirl | * Copyright (c) 2003-2008 Fabrice Bellard
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5 | ad96090a | Blue Swirl | *
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6 | ad96090a | Blue Swirl | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | ad96090a | Blue Swirl | * of this software and associated documentation files (the "Software"), to deal
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8 | ad96090a | Blue Swirl | * in the Software without restriction, including without limitation the rights
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9 | ad96090a | Blue Swirl | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | ad96090a | Blue Swirl | * copies of the Software, and to permit persons to whom the Software is
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11 | ad96090a | Blue Swirl | * furnished to do so, subject to the following conditions:
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12 | ad96090a | Blue Swirl | *
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13 | ad96090a | Blue Swirl | * The above copyright notice and this permission notice shall be included in
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14 | ad96090a | Blue Swirl | * all copies or substantial portions of the Software.
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15 | ad96090a | Blue Swirl | *
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16 | ad96090a | Blue Swirl | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | ad96090a | Blue Swirl | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | ad96090a | Blue Swirl | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | ad96090a | Blue Swirl | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | ad96090a | Blue Swirl | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | ad96090a | Blue Swirl | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | ad96090a | Blue Swirl | * THE SOFTWARE.
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23 | ad96090a | Blue Swirl | */
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24 | ad96090a | Blue Swirl | #include <stdint.h> |
25 | ad96090a | Blue Swirl | #include <stdarg.h> |
26 | ad96090a | Blue Swirl | #ifndef _WIN32
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27 | 1c47cb16 | Blue Swirl | #include <sys/types.h> |
28 | ad96090a | Blue Swirl | #include <sys/mman.h> |
29 | ad96090a | Blue Swirl | #endif
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30 | ad96090a | Blue Swirl | #include "config.h" |
31 | ad96090a | Blue Swirl | #include "monitor.h" |
32 | ad96090a | Blue Swirl | #include "sysemu.h" |
33 | ad96090a | Blue Swirl | #include "arch_init.h" |
34 | ad96090a | Blue Swirl | #include "audio/audio.h" |
35 | ad96090a | Blue Swirl | #include "hw/pc.h" |
36 | ad96090a | Blue Swirl | #include "hw/pci.h" |
37 | ad96090a | Blue Swirl | #include "hw/audiodev.h" |
38 | ad96090a | Blue Swirl | #include "kvm.h" |
39 | ad96090a | Blue Swirl | #include "migration.h" |
40 | ad96090a | Blue Swirl | #include "net.h" |
41 | ad96090a | Blue Swirl | #include "gdbstub.h" |
42 | ad96090a | Blue Swirl | #include "hw/smbios.h" |
43 | ad96090a | Blue Swirl | |
44 | ad96090a | Blue Swirl | #ifdef TARGET_SPARC
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45 | ad96090a | Blue Swirl | int graphic_width = 1024; |
46 | ad96090a | Blue Swirl | int graphic_height = 768; |
47 | ad96090a | Blue Swirl | int graphic_depth = 8; |
48 | ad96090a | Blue Swirl | #else
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49 | ad96090a | Blue Swirl | int graphic_width = 800; |
50 | ad96090a | Blue Swirl | int graphic_height = 600; |
51 | ad96090a | Blue Swirl | int graphic_depth = 15; |
52 | ad96090a | Blue Swirl | #endif
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53 | ad96090a | Blue Swirl | |
54 | ad96090a | Blue Swirl | const char arch_config_name[] = CONFIG_QEMU_CONFDIR "/target-" TARGET_ARCH ".conf"; |
55 | ad96090a | Blue Swirl | |
56 | ad96090a | Blue Swirl | #if defined(TARGET_ALPHA)
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57 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_ALPHA
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58 | ad96090a | Blue Swirl | #elif defined(TARGET_ARM)
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59 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_ARM
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60 | ad96090a | Blue Swirl | #elif defined(TARGET_CRIS)
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61 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_CRIS
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62 | ad96090a | Blue Swirl | #elif defined(TARGET_I386)
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63 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_I386
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64 | ad96090a | Blue Swirl | #elif defined(TARGET_M68K)
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65 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_M68K
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66 | ad96090a | Blue Swirl | #elif defined(TARGET_MICROBLAZE)
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67 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_MICROBLAZE
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68 | ad96090a | Blue Swirl | #elif defined(TARGET_MIPS)
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69 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_MIPS
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70 | ad96090a | Blue Swirl | #elif defined(TARGET_PPC)
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71 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_PPC
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72 | ad96090a | Blue Swirl | #elif defined(TARGET_S390X)
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73 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_S390X
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74 | ad96090a | Blue Swirl | #elif defined(TARGET_SH4)
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75 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_SH4
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76 | ad96090a | Blue Swirl | #elif defined(TARGET_SPARC)
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77 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_SPARC
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78 | ad96090a | Blue Swirl | #endif
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79 | ad96090a | Blue Swirl | |
80 | ad96090a | Blue Swirl | const uint32_t arch_type = QEMU_ARCH;
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81 | ad96090a | Blue Swirl | |
82 | ad96090a | Blue Swirl | /***********************************************************/
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83 | ad96090a | Blue Swirl | /* ram save/restore */
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84 | ad96090a | Blue Swirl | |
85 | ad96090a | Blue Swirl | #define RAM_SAVE_FLAG_FULL 0x01 /* Obsolete, not used anymore */ |
86 | ad96090a | Blue Swirl | #define RAM_SAVE_FLAG_COMPRESS 0x02 |
87 | ad96090a | Blue Swirl | #define RAM_SAVE_FLAG_MEM_SIZE 0x04 |
88 | ad96090a | Blue Swirl | #define RAM_SAVE_FLAG_PAGE 0x08 |
89 | ad96090a | Blue Swirl | #define RAM_SAVE_FLAG_EOS 0x10 |
90 | a55bbe31 | Alex Williamson | #define RAM_SAVE_FLAG_CONTINUE 0x20 |
91 | ad96090a | Blue Swirl | |
92 | ad96090a | Blue Swirl | static int is_dup_page(uint8_t *page, uint8_t ch) |
93 | ad96090a | Blue Swirl | { |
94 | ad96090a | Blue Swirl | uint32_t val = ch << 24 | ch << 16 | ch << 8 | ch; |
95 | ad96090a | Blue Swirl | uint32_t *array = (uint32_t *)page; |
96 | ad96090a | Blue Swirl | int i;
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97 | ad96090a | Blue Swirl | |
98 | ad96090a | Blue Swirl | for (i = 0; i < (TARGET_PAGE_SIZE / 4); i++) { |
99 | ad96090a | Blue Swirl | if (array[i] != val) {
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100 | ad96090a | Blue Swirl | return 0; |
101 | ad96090a | Blue Swirl | } |
102 | ad96090a | Blue Swirl | } |
103 | ad96090a | Blue Swirl | |
104 | ad96090a | Blue Swirl | return 1; |
105 | ad96090a | Blue Swirl | } |
106 | ad96090a | Blue Swirl | |
107 | ad96090a | Blue Swirl | static int ram_save_block(QEMUFile *f) |
108 | ad96090a | Blue Swirl | { |
109 | e44359c3 | Alex Williamson | static RAMBlock *last_block = NULL; |
110 | e44359c3 | Alex Williamson | static ram_addr_t last_offset = 0; |
111 | e44359c3 | Alex Williamson | RAMBlock *block = last_block; |
112 | e44359c3 | Alex Williamson | ram_addr_t offset = last_offset; |
113 | e44359c3 | Alex Williamson | ram_addr_t current_addr; |
114 | 3fc250b4 | Pierre Riteau | int bytes_sent = 0; |
115 | ad96090a | Blue Swirl | |
116 | e44359c3 | Alex Williamson | if (!block)
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117 | e44359c3 | Alex Williamson | block = QLIST_FIRST(&ram_list.blocks); |
118 | e44359c3 | Alex Williamson | |
119 | e44359c3 | Alex Williamson | current_addr = block->offset + offset; |
120 | e44359c3 | Alex Williamson | |
121 | e44359c3 | Alex Williamson | do {
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122 | ad96090a | Blue Swirl | if (cpu_physical_memory_get_dirty(current_addr, MIGRATION_DIRTY_FLAG)) {
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123 | ad96090a | Blue Swirl | uint8_t *p; |
124 | a55bbe31 | Alex Williamson | int cont = (block == last_block) ? RAM_SAVE_FLAG_CONTINUE : 0; |
125 | ad96090a | Blue Swirl | |
126 | ad96090a | Blue Swirl | cpu_physical_memory_reset_dirty(current_addr, |
127 | ad96090a | Blue Swirl | current_addr + TARGET_PAGE_SIZE, |
128 | ad96090a | Blue Swirl | MIGRATION_DIRTY_FLAG); |
129 | ad96090a | Blue Swirl | |
130 | 97ab12d4 | Alex Williamson | p = block->host + offset; |
131 | ad96090a | Blue Swirl | |
132 | ad96090a | Blue Swirl | if (is_dup_page(p, *p)) {
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133 | a55bbe31 | Alex Williamson | qemu_put_be64(f, offset | cont | RAM_SAVE_FLAG_COMPRESS); |
134 | a55bbe31 | Alex Williamson | if (!cont) {
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135 | a55bbe31 | Alex Williamson | qemu_put_byte(f, strlen(block->idstr)); |
136 | a55bbe31 | Alex Williamson | qemu_put_buffer(f, (uint8_t *)block->idstr, |
137 | a55bbe31 | Alex Williamson | strlen(block->idstr)); |
138 | a55bbe31 | Alex Williamson | } |
139 | ad96090a | Blue Swirl | qemu_put_byte(f, *p); |
140 | 3fc250b4 | Pierre Riteau | bytes_sent = 1;
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141 | ad96090a | Blue Swirl | } else {
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142 | a55bbe31 | Alex Williamson | qemu_put_be64(f, offset | cont | RAM_SAVE_FLAG_PAGE); |
143 | a55bbe31 | Alex Williamson | if (!cont) {
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144 | a55bbe31 | Alex Williamson | qemu_put_byte(f, strlen(block->idstr)); |
145 | a55bbe31 | Alex Williamson | qemu_put_buffer(f, (uint8_t *)block->idstr, |
146 | a55bbe31 | Alex Williamson | strlen(block->idstr)); |
147 | a55bbe31 | Alex Williamson | } |
148 | ad96090a | Blue Swirl | qemu_put_buffer(f, p, TARGET_PAGE_SIZE); |
149 | 3fc250b4 | Pierre Riteau | bytes_sent = TARGET_PAGE_SIZE; |
150 | ad96090a | Blue Swirl | } |
151 | ad96090a | Blue Swirl | |
152 | ad96090a | Blue Swirl | break;
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153 | ad96090a | Blue Swirl | } |
154 | e44359c3 | Alex Williamson | |
155 | e44359c3 | Alex Williamson | offset += TARGET_PAGE_SIZE; |
156 | e44359c3 | Alex Williamson | if (offset >= block->length) {
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157 | e44359c3 | Alex Williamson | offset = 0;
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158 | e44359c3 | Alex Williamson | block = QLIST_NEXT(block, next); |
159 | e44359c3 | Alex Williamson | if (!block)
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160 | e44359c3 | Alex Williamson | block = QLIST_FIRST(&ram_list.blocks); |
161 | e44359c3 | Alex Williamson | } |
162 | e44359c3 | Alex Williamson | |
163 | e44359c3 | Alex Williamson | current_addr = block->offset + offset; |
164 | e44359c3 | Alex Williamson | |
165 | e44359c3 | Alex Williamson | } while (current_addr != last_block->offset + last_offset);
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166 | e44359c3 | Alex Williamson | |
167 | e44359c3 | Alex Williamson | last_block = block; |
168 | e44359c3 | Alex Williamson | last_offset = offset; |
169 | ad96090a | Blue Swirl | |
170 | 3fc250b4 | Pierre Riteau | return bytes_sent;
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171 | ad96090a | Blue Swirl | } |
172 | ad96090a | Blue Swirl | |
173 | ad96090a | Blue Swirl | static uint64_t bytes_transferred;
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174 | ad96090a | Blue Swirl | |
175 | ad96090a | Blue Swirl | static ram_addr_t ram_save_remaining(void) |
176 | ad96090a | Blue Swirl | { |
177 | e44359c3 | Alex Williamson | RAMBlock *block; |
178 | ad96090a | Blue Swirl | ram_addr_t count = 0;
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179 | ad96090a | Blue Swirl | |
180 | e44359c3 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
181 | e44359c3 | Alex Williamson | ram_addr_t addr; |
182 | e44359c3 | Alex Williamson | for (addr = block->offset; addr < block->offset + block->length;
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183 | e44359c3 | Alex Williamson | addr += TARGET_PAGE_SIZE) { |
184 | e44359c3 | Alex Williamson | if (cpu_physical_memory_get_dirty(addr, MIGRATION_DIRTY_FLAG)) {
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185 | e44359c3 | Alex Williamson | count++; |
186 | e44359c3 | Alex Williamson | } |
187 | ad96090a | Blue Swirl | } |
188 | ad96090a | Blue Swirl | } |
189 | ad96090a | Blue Swirl | |
190 | ad96090a | Blue Swirl | return count;
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191 | ad96090a | Blue Swirl | } |
192 | ad96090a | Blue Swirl | |
193 | ad96090a | Blue Swirl | uint64_t ram_bytes_remaining(void)
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194 | ad96090a | Blue Swirl | { |
195 | ad96090a | Blue Swirl | return ram_save_remaining() * TARGET_PAGE_SIZE;
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196 | ad96090a | Blue Swirl | } |
197 | ad96090a | Blue Swirl | |
198 | ad96090a | Blue Swirl | uint64_t ram_bytes_transferred(void)
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199 | ad96090a | Blue Swirl | { |
200 | ad96090a | Blue Swirl | return bytes_transferred;
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201 | ad96090a | Blue Swirl | } |
202 | ad96090a | Blue Swirl | |
203 | ad96090a | Blue Swirl | uint64_t ram_bytes_total(void)
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204 | ad96090a | Blue Swirl | { |
205 | d17b5288 | Alex Williamson | RAMBlock *block; |
206 | d17b5288 | Alex Williamson | uint64_t total = 0;
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207 | d17b5288 | Alex Williamson | |
208 | d17b5288 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) |
209 | d17b5288 | Alex Williamson | total += block->length; |
210 | d17b5288 | Alex Williamson | |
211 | d17b5288 | Alex Williamson | return total;
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212 | ad96090a | Blue Swirl | } |
213 | ad96090a | Blue Swirl | |
214 | ad96090a | Blue Swirl | int ram_save_live(Monitor *mon, QEMUFile *f, int stage, void *opaque) |
215 | ad96090a | Blue Swirl | { |
216 | ad96090a | Blue Swirl | ram_addr_t addr; |
217 | ad96090a | Blue Swirl | uint64_t bytes_transferred_last; |
218 | ad96090a | Blue Swirl | double bwidth = 0; |
219 | ad96090a | Blue Swirl | uint64_t expected_time = 0;
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220 | ad96090a | Blue Swirl | |
221 | ad96090a | Blue Swirl | if (stage < 0) { |
222 | ad96090a | Blue Swirl | cpu_physical_memory_set_dirty_tracking(0);
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223 | ad96090a | Blue Swirl | return 0; |
224 | ad96090a | Blue Swirl | } |
225 | ad96090a | Blue Swirl | |
226 | ad96090a | Blue Swirl | if (cpu_physical_sync_dirty_bitmap(0, TARGET_PHYS_ADDR_MAX) != 0) { |
227 | ad96090a | Blue Swirl | qemu_file_set_error(f); |
228 | ad96090a | Blue Swirl | return 0; |
229 | ad96090a | Blue Swirl | } |
230 | ad96090a | Blue Swirl | |
231 | ad96090a | Blue Swirl | if (stage == 1) { |
232 | 97ab12d4 | Alex Williamson | RAMBlock *block; |
233 | ad96090a | Blue Swirl | bytes_transferred = 0;
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234 | ad96090a | Blue Swirl | |
235 | ad96090a | Blue Swirl | /* Make sure all dirty bits are set */
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236 | e44359c3 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
237 | e44359c3 | Alex Williamson | for (addr = block->offset; addr < block->offset + block->length;
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238 | e44359c3 | Alex Williamson | addr += TARGET_PAGE_SIZE) { |
239 | e44359c3 | Alex Williamson | if (!cpu_physical_memory_get_dirty(addr,
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240 | e44359c3 | Alex Williamson | MIGRATION_DIRTY_FLAG)) { |
241 | e44359c3 | Alex Williamson | cpu_physical_memory_set_dirty(addr); |
242 | e44359c3 | Alex Williamson | } |
243 | ad96090a | Blue Swirl | } |
244 | ad96090a | Blue Swirl | } |
245 | ad96090a | Blue Swirl | |
246 | ad96090a | Blue Swirl | /* Enable dirty memory tracking */
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247 | ad96090a | Blue Swirl | cpu_physical_memory_set_dirty_tracking(1);
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248 | ad96090a | Blue Swirl | |
249 | e44359c3 | Alex Williamson | qemu_put_be64(f, ram_bytes_total() | RAM_SAVE_FLAG_MEM_SIZE); |
250 | 97ab12d4 | Alex Williamson | |
251 | 97ab12d4 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
252 | 97ab12d4 | Alex Williamson | qemu_put_byte(f, strlen(block->idstr)); |
253 | 97ab12d4 | Alex Williamson | qemu_put_buffer(f, (uint8_t *)block->idstr, strlen(block->idstr)); |
254 | 97ab12d4 | Alex Williamson | qemu_put_be64(f, block->length); |
255 | 97ab12d4 | Alex Williamson | } |
256 | ad96090a | Blue Swirl | } |
257 | ad96090a | Blue Swirl | |
258 | ad96090a | Blue Swirl | bytes_transferred_last = bytes_transferred; |
259 | ad96090a | Blue Swirl | bwidth = qemu_get_clock_ns(rt_clock); |
260 | ad96090a | Blue Swirl | |
261 | ad96090a | Blue Swirl | while (!qemu_file_rate_limit(f)) {
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262 | 3fc250b4 | Pierre Riteau | int bytes_sent;
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263 | ad96090a | Blue Swirl | |
264 | 3fc250b4 | Pierre Riteau | bytes_sent = ram_save_block(f); |
265 | 3fc250b4 | Pierre Riteau | bytes_transferred += bytes_sent; |
266 | 3fc250b4 | Pierre Riteau | if (bytes_sent == 0) { /* no more blocks */ |
267 | ad96090a | Blue Swirl | break;
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268 | ad96090a | Blue Swirl | } |
269 | ad96090a | Blue Swirl | } |
270 | ad96090a | Blue Swirl | |
271 | ad96090a | Blue Swirl | bwidth = qemu_get_clock_ns(rt_clock) - bwidth; |
272 | ad96090a | Blue Swirl | bwidth = (bytes_transferred - bytes_transferred_last) / bwidth; |
273 | ad96090a | Blue Swirl | |
274 | ad96090a | Blue Swirl | /* if we haven't transferred anything this round, force expected_time to a
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275 | ad96090a | Blue Swirl | * a very high value, but without crashing */
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276 | ad96090a | Blue Swirl | if (bwidth == 0) { |
277 | ad96090a | Blue Swirl | bwidth = 0.000001; |
278 | ad96090a | Blue Swirl | } |
279 | ad96090a | Blue Swirl | |
280 | ad96090a | Blue Swirl | /* try transferring iterative blocks of memory */
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281 | ad96090a | Blue Swirl | if (stage == 3) { |
282 | 3fc250b4 | Pierre Riteau | int bytes_sent;
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283 | 3fc250b4 | Pierre Riteau | |
284 | ad96090a | Blue Swirl | /* flush all remaining blocks regardless of rate limiting */
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285 | 3fc250b4 | Pierre Riteau | while ((bytes_sent = ram_save_block(f)) != 0) { |
286 | 3fc250b4 | Pierre Riteau | bytes_transferred += bytes_sent; |
287 | ad96090a | Blue Swirl | } |
288 | ad96090a | Blue Swirl | cpu_physical_memory_set_dirty_tracking(0);
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289 | ad96090a | Blue Swirl | } |
290 | ad96090a | Blue Swirl | |
291 | ad96090a | Blue Swirl | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); |
292 | ad96090a | Blue Swirl | |
293 | ad96090a | Blue Swirl | expected_time = ram_save_remaining() * TARGET_PAGE_SIZE / bwidth; |
294 | ad96090a | Blue Swirl | |
295 | ad96090a | Blue Swirl | return (stage == 2) && (expected_time <= migrate_max_downtime()); |
296 | ad96090a | Blue Swirl | } |
297 | ad96090a | Blue Swirl | |
298 | a55bbe31 | Alex Williamson | static inline void *host_from_stream_offset(QEMUFile *f, |
299 | a55bbe31 | Alex Williamson | ram_addr_t offset, |
300 | a55bbe31 | Alex Williamson | int flags)
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301 | a55bbe31 | Alex Williamson | { |
302 | a55bbe31 | Alex Williamson | static RAMBlock *block = NULL; |
303 | a55bbe31 | Alex Williamson | char id[256]; |
304 | a55bbe31 | Alex Williamson | uint8_t len; |
305 | a55bbe31 | Alex Williamson | |
306 | a55bbe31 | Alex Williamson | if (flags & RAM_SAVE_FLAG_CONTINUE) {
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307 | a55bbe31 | Alex Williamson | if (!block) {
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308 | a55bbe31 | Alex Williamson | fprintf(stderr, "Ack, bad migration stream!\n");
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309 | a55bbe31 | Alex Williamson | return NULL; |
310 | a55bbe31 | Alex Williamson | } |
311 | a55bbe31 | Alex Williamson | |
312 | a55bbe31 | Alex Williamson | return block->host + offset;
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313 | a55bbe31 | Alex Williamson | } |
314 | a55bbe31 | Alex Williamson | |
315 | a55bbe31 | Alex Williamson | len = qemu_get_byte(f); |
316 | a55bbe31 | Alex Williamson | qemu_get_buffer(f, (uint8_t *)id, len); |
317 | a55bbe31 | Alex Williamson | id[len] = 0;
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318 | a55bbe31 | Alex Williamson | |
319 | a55bbe31 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
320 | a55bbe31 | Alex Williamson | if (!strncmp(id, block->idstr, sizeof(id))) |
321 | a55bbe31 | Alex Williamson | return block->host + offset;
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322 | a55bbe31 | Alex Williamson | } |
323 | a55bbe31 | Alex Williamson | |
324 | a55bbe31 | Alex Williamson | fprintf(stderr, "Can't find block %s!\n", id);
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325 | a55bbe31 | Alex Williamson | return NULL; |
326 | a55bbe31 | Alex Williamson | } |
327 | a55bbe31 | Alex Williamson | |
328 | ad96090a | Blue Swirl | int ram_load(QEMUFile *f, void *opaque, int version_id) |
329 | ad96090a | Blue Swirl | { |
330 | ad96090a | Blue Swirl | ram_addr_t addr; |
331 | ad96090a | Blue Swirl | int flags;
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332 | ad96090a | Blue Swirl | |
333 | 97ab12d4 | Alex Williamson | if (version_id < 3 || version_id > 4) { |
334 | ad96090a | Blue Swirl | return -EINVAL;
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335 | ad96090a | Blue Swirl | } |
336 | ad96090a | Blue Swirl | |
337 | ad96090a | Blue Swirl | do {
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338 | ad96090a | Blue Swirl | addr = qemu_get_be64(f); |
339 | ad96090a | Blue Swirl | |
340 | ad96090a | Blue Swirl | flags = addr & ~TARGET_PAGE_MASK; |
341 | ad96090a | Blue Swirl | addr &= TARGET_PAGE_MASK; |
342 | ad96090a | Blue Swirl | |
343 | ad96090a | Blue Swirl | if (flags & RAM_SAVE_FLAG_MEM_SIZE) {
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344 | 97ab12d4 | Alex Williamson | if (version_id == 3) { |
345 | 97ab12d4 | Alex Williamson | if (addr != ram_bytes_total()) {
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346 | 97ab12d4 | Alex Williamson | return -EINVAL;
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347 | 97ab12d4 | Alex Williamson | } |
348 | 97ab12d4 | Alex Williamson | } else {
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349 | 97ab12d4 | Alex Williamson | /* Synchronize RAM block list */
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350 | 97ab12d4 | Alex Williamson | char id[256]; |
351 | 97ab12d4 | Alex Williamson | ram_addr_t length; |
352 | 97ab12d4 | Alex Williamson | ram_addr_t total_ram_bytes = addr; |
353 | 97ab12d4 | Alex Williamson | |
354 | 97ab12d4 | Alex Williamson | while (total_ram_bytes) {
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355 | 97ab12d4 | Alex Williamson | RAMBlock *block; |
356 | 97ab12d4 | Alex Williamson | uint8_t len; |
357 | 97ab12d4 | Alex Williamson | |
358 | 97ab12d4 | Alex Williamson | len = qemu_get_byte(f); |
359 | 97ab12d4 | Alex Williamson | qemu_get_buffer(f, (uint8_t *)id, len); |
360 | 97ab12d4 | Alex Williamson | id[len] = 0;
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361 | 97ab12d4 | Alex Williamson | length = qemu_get_be64(f); |
362 | 97ab12d4 | Alex Williamson | |
363 | 97ab12d4 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
364 | 97ab12d4 | Alex Williamson | if (!strncmp(id, block->idstr, sizeof(id))) { |
365 | 97ab12d4 | Alex Williamson | if (block->length != length)
|
366 | 97ab12d4 | Alex Williamson | return -EINVAL;
|
367 | 97ab12d4 | Alex Williamson | break;
|
368 | 97ab12d4 | Alex Williamson | } |
369 | 97ab12d4 | Alex Williamson | } |
370 | 97ab12d4 | Alex Williamson | |
371 | 97ab12d4 | Alex Williamson | if (!block) {
|
372 | fb787f81 | Alex Williamson | fprintf(stderr, "Unknown ramblock \"%s\", cannot "
|
373 | fb787f81 | Alex Williamson | "accept migration\n", id);
|
374 | fb787f81 | Alex Williamson | return -EINVAL;
|
375 | 97ab12d4 | Alex Williamson | } |
376 | 97ab12d4 | Alex Williamson | |
377 | 97ab12d4 | Alex Williamson | total_ram_bytes -= length; |
378 | 97ab12d4 | Alex Williamson | } |
379 | ad96090a | Blue Swirl | } |
380 | ad96090a | Blue Swirl | } |
381 | ad96090a | Blue Swirl | |
382 | ad96090a | Blue Swirl | if (flags & RAM_SAVE_FLAG_COMPRESS) {
|
383 | 97ab12d4 | Alex Williamson | void *host;
|
384 | 97ab12d4 | Alex Williamson | uint8_t ch; |
385 | 97ab12d4 | Alex Williamson | |
386 | a55bbe31 | Alex Williamson | if (version_id == 3) |
387 | 97ab12d4 | Alex Williamson | host = qemu_get_ram_ptr(addr); |
388 | a55bbe31 | Alex Williamson | else
|
389 | a55bbe31 | Alex Williamson | host = host_from_stream_offset(f, addr, flags); |
390 | 97ab12d4 | Alex Williamson | |
391 | 97ab12d4 | Alex Williamson | ch = qemu_get_byte(f); |
392 | 97ab12d4 | Alex Williamson | memset(host, ch, TARGET_PAGE_SIZE); |
393 | ad96090a | Blue Swirl | #ifndef _WIN32
|
394 | ad96090a | Blue Swirl | if (ch == 0 && |
395 | ad96090a | Blue Swirl | (!kvm_enabled() || kvm_has_sync_mmu())) { |
396 | 97ab12d4 | Alex Williamson | madvise(host, TARGET_PAGE_SIZE, MADV_DONTNEED); |
397 | ad96090a | Blue Swirl | } |
398 | ad96090a | Blue Swirl | #endif
|
399 | ad96090a | Blue Swirl | } else if (flags & RAM_SAVE_FLAG_PAGE) { |
400 | 97ab12d4 | Alex Williamson | void *host;
|
401 | 97ab12d4 | Alex Williamson | |
402 | a55bbe31 | Alex Williamson | if (version_id == 3) |
403 | 97ab12d4 | Alex Williamson | host = qemu_get_ram_ptr(addr); |
404 | a55bbe31 | Alex Williamson | else
|
405 | a55bbe31 | Alex Williamson | host = host_from_stream_offset(f, addr, flags); |
406 | 97ab12d4 | Alex Williamson | |
407 | 97ab12d4 | Alex Williamson | qemu_get_buffer(f, host, TARGET_PAGE_SIZE); |
408 | ad96090a | Blue Swirl | } |
409 | ad96090a | Blue Swirl | if (qemu_file_has_error(f)) {
|
410 | ad96090a | Blue Swirl | return -EIO;
|
411 | ad96090a | Blue Swirl | } |
412 | ad96090a | Blue Swirl | } while (!(flags & RAM_SAVE_FLAG_EOS));
|
413 | ad96090a | Blue Swirl | |
414 | ad96090a | Blue Swirl | return 0; |
415 | ad96090a | Blue Swirl | } |
416 | ad96090a | Blue Swirl | |
417 | ad96090a | Blue Swirl | void qemu_service_io(void) |
418 | ad96090a | Blue Swirl | { |
419 | ad96090a | Blue Swirl | qemu_notify_event(); |
420 | ad96090a | Blue Swirl | } |
421 | ad96090a | Blue Swirl | |
422 | ad96090a | Blue Swirl | #ifdef HAS_AUDIO
|
423 | ad96090a | Blue Swirl | struct soundhw soundhw[] = {
|
424 | ad96090a | Blue Swirl | #ifdef HAS_AUDIO_CHOICE
|
425 | ad96090a | Blue Swirl | #if defined(TARGET_I386) || defined(TARGET_MIPS)
|
426 | ad96090a | Blue Swirl | { |
427 | ad96090a | Blue Swirl | "pcspk",
|
428 | ad96090a | Blue Swirl | "PC speaker",
|
429 | ad96090a | Blue Swirl | 0,
|
430 | ad96090a | Blue Swirl | 1,
|
431 | ad96090a | Blue Swirl | { .init_isa = pcspk_audio_init } |
432 | ad96090a | Blue Swirl | }, |
433 | ad96090a | Blue Swirl | #endif
|
434 | ad96090a | Blue Swirl | |
435 | ad96090a | Blue Swirl | #ifdef CONFIG_SB16
|
436 | ad96090a | Blue Swirl | { |
437 | ad96090a | Blue Swirl | "sb16",
|
438 | ad96090a | Blue Swirl | "Creative Sound Blaster 16",
|
439 | ad96090a | Blue Swirl | 0,
|
440 | ad96090a | Blue Swirl | 1,
|
441 | ad96090a | Blue Swirl | { .init_isa = SB16_init } |
442 | ad96090a | Blue Swirl | }, |
443 | ad96090a | Blue Swirl | #endif
|
444 | ad96090a | Blue Swirl | |
445 | ad96090a | Blue Swirl | #ifdef CONFIG_CS4231A
|
446 | ad96090a | Blue Swirl | { |
447 | ad96090a | Blue Swirl | "cs4231a",
|
448 | ad96090a | Blue Swirl | "CS4231A",
|
449 | ad96090a | Blue Swirl | 0,
|
450 | ad96090a | Blue Swirl | 1,
|
451 | ad96090a | Blue Swirl | { .init_isa = cs4231a_init } |
452 | ad96090a | Blue Swirl | }, |
453 | ad96090a | Blue Swirl | #endif
|
454 | ad96090a | Blue Swirl | |
455 | ad96090a | Blue Swirl | #ifdef CONFIG_ADLIB
|
456 | ad96090a | Blue Swirl | { |
457 | ad96090a | Blue Swirl | "adlib",
|
458 | ad96090a | Blue Swirl | #ifdef HAS_YMF262
|
459 | ad96090a | Blue Swirl | "Yamaha YMF262 (OPL3)",
|
460 | ad96090a | Blue Swirl | #else
|
461 | ad96090a | Blue Swirl | "Yamaha YM3812 (OPL2)",
|
462 | ad96090a | Blue Swirl | #endif
|
463 | ad96090a | Blue Swirl | 0,
|
464 | ad96090a | Blue Swirl | 1,
|
465 | ad96090a | Blue Swirl | { .init_isa = Adlib_init } |
466 | ad96090a | Blue Swirl | }, |
467 | ad96090a | Blue Swirl | #endif
|
468 | ad96090a | Blue Swirl | |
469 | ad96090a | Blue Swirl | #ifdef CONFIG_GUS
|
470 | ad96090a | Blue Swirl | { |
471 | ad96090a | Blue Swirl | "gus",
|
472 | ad96090a | Blue Swirl | "Gravis Ultrasound GF1",
|
473 | ad96090a | Blue Swirl | 0,
|
474 | ad96090a | Blue Swirl | 1,
|
475 | ad96090a | Blue Swirl | { .init_isa = GUS_init } |
476 | ad96090a | Blue Swirl | }, |
477 | ad96090a | Blue Swirl | #endif
|
478 | ad96090a | Blue Swirl | |
479 | ad96090a | Blue Swirl | #ifdef CONFIG_AC97
|
480 | ad96090a | Blue Swirl | { |
481 | ad96090a | Blue Swirl | "ac97",
|
482 | ad96090a | Blue Swirl | "Intel 82801AA AC97 Audio",
|
483 | ad96090a | Blue Swirl | 0,
|
484 | ad96090a | Blue Swirl | 0,
|
485 | ad96090a | Blue Swirl | { .init_pci = ac97_init } |
486 | ad96090a | Blue Swirl | }, |
487 | ad96090a | Blue Swirl | #endif
|
488 | ad96090a | Blue Swirl | |
489 | ad96090a | Blue Swirl | #ifdef CONFIG_ES1370
|
490 | ad96090a | Blue Swirl | { |
491 | ad96090a | Blue Swirl | "es1370",
|
492 | ad96090a | Blue Swirl | "ENSONIQ AudioPCI ES1370",
|
493 | ad96090a | Blue Swirl | 0,
|
494 | ad96090a | Blue Swirl | 0,
|
495 | ad96090a | Blue Swirl | { .init_pci = es1370_init } |
496 | ad96090a | Blue Swirl | }, |
497 | ad96090a | Blue Swirl | #endif
|
498 | ad96090a | Blue Swirl | |
499 | ad96090a | Blue Swirl | #endif /* HAS_AUDIO_CHOICE */ |
500 | ad96090a | Blue Swirl | |
501 | ad96090a | Blue Swirl | { NULL, NULL, 0, 0, { NULL } } |
502 | ad96090a | Blue Swirl | }; |
503 | ad96090a | Blue Swirl | |
504 | ad96090a | Blue Swirl | void select_soundhw(const char *optarg) |
505 | ad96090a | Blue Swirl | { |
506 | ad96090a | Blue Swirl | struct soundhw *c;
|
507 | ad96090a | Blue Swirl | |
508 | ad96090a | Blue Swirl | if (*optarg == '?') { |
509 | ad96090a | Blue Swirl | show_valid_cards:
|
510 | ad96090a | Blue Swirl | |
511 | ad96090a | Blue Swirl | printf("Valid sound card names (comma separated):\n");
|
512 | ad96090a | Blue Swirl | for (c = soundhw; c->name; ++c) {
|
513 | ad96090a | Blue Swirl | printf ("%-11s %s\n", c->name, c->descr);
|
514 | ad96090a | Blue Swirl | } |
515 | ad96090a | Blue Swirl | printf("\n-soundhw all will enable all of the above\n");
|
516 | ad96090a | Blue Swirl | exit(*optarg != '?');
|
517 | ad96090a | Blue Swirl | } |
518 | ad96090a | Blue Swirl | else {
|
519 | ad96090a | Blue Swirl | size_t l; |
520 | ad96090a | Blue Swirl | const char *p; |
521 | ad96090a | Blue Swirl | char *e;
|
522 | ad96090a | Blue Swirl | int bad_card = 0; |
523 | ad96090a | Blue Swirl | |
524 | ad96090a | Blue Swirl | if (!strcmp(optarg, "all")) { |
525 | ad96090a | Blue Swirl | for (c = soundhw; c->name; ++c) {
|
526 | ad96090a | Blue Swirl | c->enabled = 1;
|
527 | ad96090a | Blue Swirl | } |
528 | ad96090a | Blue Swirl | return;
|
529 | ad96090a | Blue Swirl | } |
530 | ad96090a | Blue Swirl | |
531 | ad96090a | Blue Swirl | p = optarg; |
532 | ad96090a | Blue Swirl | while (*p) {
|
533 | ad96090a | Blue Swirl | e = strchr(p, ',');
|
534 | ad96090a | Blue Swirl | l = !e ? strlen(p) : (size_t) (e - p); |
535 | ad96090a | Blue Swirl | |
536 | ad96090a | Blue Swirl | for (c = soundhw; c->name; ++c) {
|
537 | ad96090a | Blue Swirl | if (!strncmp(c->name, p, l) && !c->name[l]) {
|
538 | ad96090a | Blue Swirl | c->enabled = 1;
|
539 | ad96090a | Blue Swirl | break;
|
540 | ad96090a | Blue Swirl | } |
541 | ad96090a | Blue Swirl | } |
542 | ad96090a | Blue Swirl | |
543 | ad96090a | Blue Swirl | if (!c->name) {
|
544 | ad96090a | Blue Swirl | if (l > 80) { |
545 | ad96090a | Blue Swirl | fprintf(stderr, |
546 | ad96090a | Blue Swirl | "Unknown sound card name (too big to show)\n");
|
547 | ad96090a | Blue Swirl | } |
548 | ad96090a | Blue Swirl | else {
|
549 | ad96090a | Blue Swirl | fprintf(stderr, "Unknown sound card name `%.*s'\n",
|
550 | ad96090a | Blue Swirl | (int) l, p);
|
551 | ad96090a | Blue Swirl | } |
552 | ad96090a | Blue Swirl | bad_card = 1;
|
553 | ad96090a | Blue Swirl | } |
554 | ad96090a | Blue Swirl | p += l + (e != NULL);
|
555 | ad96090a | Blue Swirl | } |
556 | ad96090a | Blue Swirl | |
557 | ad96090a | Blue Swirl | if (bad_card) {
|
558 | ad96090a | Blue Swirl | goto show_valid_cards;
|
559 | ad96090a | Blue Swirl | } |
560 | ad96090a | Blue Swirl | } |
561 | ad96090a | Blue Swirl | } |
562 | ad96090a | Blue Swirl | #else
|
563 | ad96090a | Blue Swirl | void select_soundhw(const char *optarg) |
564 | ad96090a | Blue Swirl | { |
565 | ad96090a | Blue Swirl | } |
566 | ad96090a | Blue Swirl | #endif
|
567 | ad96090a | Blue Swirl | |
568 | ad96090a | Blue Swirl | int qemu_uuid_parse(const char *str, uint8_t *uuid) |
569 | ad96090a | Blue Swirl | { |
570 | ad96090a | Blue Swirl | int ret;
|
571 | ad96090a | Blue Swirl | |
572 | ad96090a | Blue Swirl | if (strlen(str) != 36) { |
573 | ad96090a | Blue Swirl | return -1; |
574 | ad96090a | Blue Swirl | } |
575 | ad96090a | Blue Swirl | |
576 | ad96090a | Blue Swirl | ret = sscanf(str, UUID_FMT, &uuid[0], &uuid[1], &uuid[2], &uuid[3], |
577 | ad96090a | Blue Swirl | &uuid[4], &uuid[5], &uuid[6], &uuid[7], &uuid[8], &uuid[9], |
578 | ad96090a | Blue Swirl | &uuid[10], &uuid[11], &uuid[12], &uuid[13], &uuid[14], |
579 | ad96090a | Blue Swirl | &uuid[15]);
|
580 | ad96090a | Blue Swirl | |
581 | ad96090a | Blue Swirl | if (ret != 16) { |
582 | ad96090a | Blue Swirl | return -1; |
583 | ad96090a | Blue Swirl | } |
584 | ad96090a | Blue Swirl | #ifdef TARGET_I386
|
585 | ad96090a | Blue Swirl | smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 16, uuid); |
586 | ad96090a | Blue Swirl | #endif
|
587 | ad96090a | Blue Swirl | return 0; |
588 | ad96090a | Blue Swirl | } |
589 | ad96090a | Blue Swirl | |
590 | ad96090a | Blue Swirl | void do_acpitable_option(const char *optarg) |
591 | ad96090a | Blue Swirl | { |
592 | ad96090a | Blue Swirl | #ifdef TARGET_I386
|
593 | ad96090a | Blue Swirl | if (acpi_table_add(optarg) < 0) { |
594 | ad96090a | Blue Swirl | fprintf(stderr, "Wrong acpi table provided\n");
|
595 | ad96090a | Blue Swirl | exit(1);
|
596 | ad96090a | Blue Swirl | } |
597 | ad96090a | Blue Swirl | #endif
|
598 | ad96090a | Blue Swirl | } |
599 | ad96090a | Blue Swirl | |
600 | ad96090a | Blue Swirl | void do_smbios_option(const char *optarg) |
601 | ad96090a | Blue Swirl | { |
602 | ad96090a | Blue Swirl | #ifdef TARGET_I386
|
603 | ad96090a | Blue Swirl | if (smbios_entry_add(optarg) < 0) { |
604 | ad96090a | Blue Swirl | fprintf(stderr, "Wrong smbios provided\n");
|
605 | ad96090a | Blue Swirl | exit(1);
|
606 | ad96090a | Blue Swirl | } |
607 | ad96090a | Blue Swirl | #endif
|
608 | ad96090a | Blue Swirl | } |
609 | ad96090a | Blue Swirl | |
610 | ad96090a | Blue Swirl | void cpudef_init(void) |
611 | ad96090a | Blue Swirl | { |
612 | ad96090a | Blue Swirl | #if defined(cpudef_setup)
|
613 | ad96090a | Blue Swirl | cpudef_setup(); /* parse cpu definitions in target config file */
|
614 | ad96090a | Blue Swirl | #endif
|
615 | ad96090a | Blue Swirl | } |
616 | ad96090a | Blue Swirl | |
617 | ad96090a | Blue Swirl | int audio_available(void) |
618 | ad96090a | Blue Swirl | { |
619 | ad96090a | Blue Swirl | #ifdef HAS_AUDIO
|
620 | ad96090a | Blue Swirl | return 1; |
621 | ad96090a | Blue Swirl | #else
|
622 | ad96090a | Blue Swirl | return 0; |
623 | ad96090a | Blue Swirl | #endif
|
624 | ad96090a | Blue Swirl | } |
625 | ad96090a | Blue Swirl | |
626 | ad96090a | Blue Swirl | int kvm_available(void) |
627 | ad96090a | Blue Swirl | { |
628 | ad96090a | Blue Swirl | #ifdef CONFIG_KVM
|
629 | ad96090a | Blue Swirl | return 1; |
630 | ad96090a | Blue Swirl | #else
|
631 | ad96090a | Blue Swirl | return 0; |
632 | ad96090a | Blue Swirl | #endif
|
633 | ad96090a | Blue Swirl | } |
634 | ad96090a | Blue Swirl | |
635 | ad96090a | Blue Swirl | int xen_available(void) |
636 | ad96090a | Blue Swirl | { |
637 | ad96090a | Blue Swirl | #ifdef CONFIG_XEN
|
638 | ad96090a | Blue Swirl | return 1; |
639 | ad96090a | Blue Swirl | #else
|
640 | ad96090a | Blue Swirl | return 0; |
641 | ad96090a | Blue Swirl | #endif
|
642 | ad96090a | Blue Swirl | } |