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1 | 1ad2134f | Paul Brook | #ifndef CPU_COMMON_H
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2 | 1ad2134f | Paul Brook | #define CPU_COMMON_H 1 |
3 | 1ad2134f | Paul Brook | |
4 | 1ad2134f | Paul Brook | /* CPU interfaces that are target indpendent. */
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5 | 1ad2134f | Paul Brook | |
6 | 477ba620 | Aurelien Jarno | #if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__) || defined(__ia64__)
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7 | 1ad2134f | Paul Brook | #define WORDS_ALIGNED
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8 | 1ad2134f | Paul Brook | #endif
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9 | 1ad2134f | Paul Brook | |
10 | 37b76cfd | Paolo Bonzini | #ifdef TARGET_PHYS_ADDR_BITS
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11 | 37b76cfd | Paolo Bonzini | #include "targphys.h" |
12 | 37b76cfd | Paolo Bonzini | #endif
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13 | 37b76cfd | Paolo Bonzini | |
14 | 37b76cfd | Paolo Bonzini | #ifndef NEED_CPU_H
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15 | 37b76cfd | Paolo Bonzini | #include "poison.h" |
16 | 37b76cfd | Paolo Bonzini | #endif
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17 | 37b76cfd | Paolo Bonzini | |
18 | 1ad2134f | Paul Brook | #include "bswap.h" |
19 | f6f3fbca | Michael S. Tsirkin | #include "qemu-queue.h" |
20 | 1ad2134f | Paul Brook | |
21 | b3755a91 | Paul Brook | #if !defined(CONFIG_USER_ONLY)
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22 | b3755a91 | Paul Brook | |
23 | 1ad2134f | Paul Brook | /* address in the RAM (different from a physical address) */
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24 | c227f099 | Anthony Liguori | typedef unsigned long ram_addr_t; |
25 | 1ad2134f | Paul Brook | |
26 | 1ad2134f | Paul Brook | /* memory API */
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27 | 1ad2134f | Paul Brook | |
28 | c227f099 | Anthony Liguori | typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value); |
29 | c227f099 | Anthony Liguori | typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr); |
30 | 1ad2134f | Paul Brook | |
31 | c227f099 | Anthony Liguori | void cpu_register_physical_memory_offset(target_phys_addr_t start_addr,
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32 | c227f099 | Anthony Liguori | ram_addr_t size, |
33 | c227f099 | Anthony Liguori | ram_addr_t phys_offset, |
34 | c227f099 | Anthony Liguori | ram_addr_t region_offset); |
35 | c227f099 | Anthony Liguori | static inline void cpu_register_physical_memory(target_phys_addr_t start_addr, |
36 | c227f099 | Anthony Liguori | ram_addr_t size, |
37 | c227f099 | Anthony Liguori | ram_addr_t phys_offset) |
38 | 1ad2134f | Paul Brook | { |
39 | 1ad2134f | Paul Brook | cpu_register_physical_memory_offset(start_addr, size, phys_offset, 0);
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40 | 1ad2134f | Paul Brook | } |
41 | 1ad2134f | Paul Brook | |
42 | c227f099 | Anthony Liguori | ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr); |
43 | 1724f049 | Alex Williamson | ram_addr_t qemu_ram_alloc(DeviceState *dev, const char *name, ram_addr_t size); |
44 | c227f099 | Anthony Liguori | void qemu_ram_free(ram_addr_t addr);
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45 | 1ad2134f | Paul Brook | /* This should only be used for ram local to a device. */
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46 | c227f099 | Anthony Liguori | void *qemu_get_ram_ptr(ram_addr_t addr);
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47 | 1ad2134f | Paul Brook | /* This should not be used by devices. */
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48 | c227f099 | Anthony Liguori | ram_addr_t qemu_ram_addr_from_host(void *ptr);
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49 | 1ad2134f | Paul Brook | |
50 | d60efc6b | Blue Swirl | int cpu_register_io_memory(CPUReadMemoryFunc * const *mem_read, |
51 | d60efc6b | Blue Swirl | CPUWriteMemoryFunc * const *mem_write,
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52 | 1ad2134f | Paul Brook | void *opaque);
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53 | 1ad2134f | Paul Brook | void cpu_unregister_io_memory(int table_address); |
54 | 1ad2134f | Paul Brook | |
55 | c227f099 | Anthony Liguori | void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
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56 | 1ad2134f | Paul Brook | int len, int is_write); |
57 | c227f099 | Anthony Liguori | static inline void cpu_physical_memory_read(target_phys_addr_t addr, |
58 | 1ad2134f | Paul Brook | uint8_t *buf, int len)
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59 | 1ad2134f | Paul Brook | { |
60 | 1ad2134f | Paul Brook | cpu_physical_memory_rw(addr, buf, len, 0);
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61 | 1ad2134f | Paul Brook | } |
62 | c227f099 | Anthony Liguori | static inline void cpu_physical_memory_write(target_phys_addr_t addr, |
63 | 1ad2134f | Paul Brook | const uint8_t *buf, int len) |
64 | 1ad2134f | Paul Brook | { |
65 | 1ad2134f | Paul Brook | cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1);
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66 | 1ad2134f | Paul Brook | } |
67 | c227f099 | Anthony Liguori | void *cpu_physical_memory_map(target_phys_addr_t addr,
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68 | c227f099 | Anthony Liguori | target_phys_addr_t *plen, |
69 | 1ad2134f | Paul Brook | int is_write);
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70 | c227f099 | Anthony Liguori | void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len, |
71 | c227f099 | Anthony Liguori | int is_write, target_phys_addr_t access_len);
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72 | 1ad2134f | Paul Brook | void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque)); |
73 | 1ad2134f | Paul Brook | void cpu_unregister_map_client(void *cookie); |
74 | 1ad2134f | Paul Brook | |
75 | f6f3fbca | Michael S. Tsirkin | struct CPUPhysMemoryClient;
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76 | f6f3fbca | Michael S. Tsirkin | typedef struct CPUPhysMemoryClient CPUPhysMemoryClient; |
77 | f6f3fbca | Michael S. Tsirkin | struct CPUPhysMemoryClient {
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78 | f6f3fbca | Michael S. Tsirkin | void (*set_memory)(struct CPUPhysMemoryClient *client, |
79 | f6f3fbca | Michael S. Tsirkin | target_phys_addr_t start_addr, |
80 | f6f3fbca | Michael S. Tsirkin | ram_addr_t size, |
81 | f6f3fbca | Michael S. Tsirkin | ram_addr_t phys_offset); |
82 | f6f3fbca | Michael S. Tsirkin | int (*sync_dirty_bitmap)(struct CPUPhysMemoryClient *client, |
83 | f6f3fbca | Michael S. Tsirkin | target_phys_addr_t start_addr, |
84 | f6f3fbca | Michael S. Tsirkin | target_phys_addr_t end_addr); |
85 | f6f3fbca | Michael S. Tsirkin | int (*migration_log)(struct CPUPhysMemoryClient *client, |
86 | f6f3fbca | Michael S. Tsirkin | int enable);
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87 | f6f3fbca | Michael S. Tsirkin | QLIST_ENTRY(CPUPhysMemoryClient) list; |
88 | f6f3fbca | Michael S. Tsirkin | }; |
89 | f6f3fbca | Michael S. Tsirkin | |
90 | f6f3fbca | Michael S. Tsirkin | void cpu_register_phys_memory_client(CPUPhysMemoryClient *);
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91 | f6f3fbca | Michael S. Tsirkin | void cpu_unregister_phys_memory_client(CPUPhysMemoryClient *);
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92 | f6f3fbca | Michael S. Tsirkin | |
93 | 6842a08e | Blue Swirl | /* Coalesced MMIO regions are areas where write operations can be reordered.
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94 | 6842a08e | Blue Swirl | * This usually implies that write operations are side-effect free. This allows
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95 | 6842a08e | Blue Swirl | * batching which can make a major impact on performance when using
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96 | 6842a08e | Blue Swirl | * virtualization.
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97 | 6842a08e | Blue Swirl | */
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98 | 6842a08e | Blue Swirl | void qemu_register_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
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99 | 6842a08e | Blue Swirl | |
100 | 6842a08e | Blue Swirl | void qemu_unregister_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
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101 | 6842a08e | Blue Swirl | |
102 | 6842a08e | Blue Swirl | void qemu_flush_coalesced_mmio_buffer(void); |
103 | 6842a08e | Blue Swirl | |
104 | c227f099 | Anthony Liguori | uint32_t ldub_phys(target_phys_addr_t addr); |
105 | c227f099 | Anthony Liguori | uint32_t lduw_phys(target_phys_addr_t addr); |
106 | c227f099 | Anthony Liguori | uint32_t ldl_phys(target_phys_addr_t addr); |
107 | c227f099 | Anthony Liguori | uint64_t ldq_phys(target_phys_addr_t addr); |
108 | c227f099 | Anthony Liguori | void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val);
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109 | c227f099 | Anthony Liguori | void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val);
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110 | c227f099 | Anthony Liguori | void stb_phys(target_phys_addr_t addr, uint32_t val);
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111 | c227f099 | Anthony Liguori | void stw_phys(target_phys_addr_t addr, uint32_t val);
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112 | c227f099 | Anthony Liguori | void stl_phys(target_phys_addr_t addr, uint32_t val);
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113 | c227f099 | Anthony Liguori | void stq_phys(target_phys_addr_t addr, uint64_t val);
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114 | c227f099 | Anthony Liguori | |
115 | c227f099 | Anthony Liguori | void cpu_physical_memory_write_rom(target_phys_addr_t addr,
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116 | 1ad2134f | Paul Brook | const uint8_t *buf, int len); |
117 | 1ad2134f | Paul Brook | |
118 | 1ad2134f | Paul Brook | #define IO_MEM_SHIFT 3 |
119 | 1ad2134f | Paul Brook | |
120 | 1ad2134f | Paul Brook | #define IO_MEM_RAM (0 << IO_MEM_SHIFT) /* hardcoded offset */ |
121 | 1ad2134f | Paul Brook | #define IO_MEM_ROM (1 << IO_MEM_SHIFT) /* hardcoded offset */ |
122 | 1ad2134f | Paul Brook | #define IO_MEM_UNASSIGNED (2 << IO_MEM_SHIFT) |
123 | 1ad2134f | Paul Brook | #define IO_MEM_NOTDIRTY (3 << IO_MEM_SHIFT) |
124 | 1ad2134f | Paul Brook | |
125 | 1ad2134f | Paul Brook | /* Acts like a ROM when read and like a device when written. */
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126 | 1ad2134f | Paul Brook | #define IO_MEM_ROMD (1) |
127 | 1ad2134f | Paul Brook | #define IO_MEM_SUBPAGE (2) |
128 | 1ad2134f | Paul Brook | |
129 | b3755a91 | Paul Brook | #endif
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130 | b3755a91 | Paul Brook | |
131 | 1ad2134f | Paul Brook | #endif /* !CPU_COMMON_H */ |