Revision 817e0b6f
| b/hw/ac97.c | ||
|---|---|---|
| 1311 | 1311 |
c[PCI_SUBSYSTEM_ID + 1] = 0x00; |
| 1312 | 1312 |
|
| 1313 | 1313 |
c[PCI_INTERRUPT_LINE] = 0x00; /* intr_ln interrupt line rw */ |
| 1314 |
/* TODO: RST# value should be 0. */ |
|
| 1315 | 1314 |
c[PCI_INTERRUPT_PIN] = 0x01; /* intr_pn interrupt pin ro */ |
| 1316 | 1315 |
|
| 1317 | 1316 |
memory_region_init_io (&s->io_nam, &ac97_io_nam_ops, s, "ac97-nam", 1024); |
| b/hw/e1000.c | ||
|---|---|---|
| 1156 | 1156 |
/* TODO: RST# value should be 0, PCI spec 6.2.4 */ |
| 1157 | 1157 |
pci_conf[PCI_CACHE_LINE_SIZE] = 0x10; |
| 1158 | 1158 |
|
| 1159 |
/* TODO: RST# value should be 0 if programmable, PCI spec 6.2.4 */ |
|
| 1160 |
pci_conf[PCI_INTERRUPT_PIN] = 1; // interrupt pin 0 |
|
| 1159 |
pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin A */ |
|
| 1161 | 1160 |
|
| 1162 | 1161 |
e1000_mmio_setup(d); |
| 1163 | 1162 |
|
| b/hw/es1370.c | ||
|---|---|---|
| 1003 | 1003 |
c[0xdc] = 0x00; |
| 1004 | 1004 |
#endif |
| 1005 | 1005 |
|
| 1006 |
/* TODO: RST# value should be 0. */ |
|
| 1007 | 1006 |
c[PCI_INTERRUPT_PIN] = 1; |
| 1008 | 1007 |
c[PCI_MIN_GNT] = 0x0c; |
| 1009 | 1008 |
c[PCI_MAX_LAT] = 0x80; |
| b/hw/lsi53c895a.c | ||
|---|---|---|
| 2106 | 2106 |
|
| 2107 | 2107 |
/* PCI latency timer = 255 */ |
| 2108 | 2108 |
pci_conf[PCI_LATENCY_TIMER] = 0xff; |
| 2109 |
/* TODO: RST# value should be 0 */ |
|
| 2110 |
/* Interrupt pin 1 */ |
|
| 2109 |
/* Interrupt pin A */ |
|
| 2111 | 2110 |
pci_conf[PCI_INTERRUPT_PIN] = 0x01; |
| 2112 | 2111 |
|
| 2113 | 2112 |
memory_region_init_io(&s->mmio_io, &lsi_mmio_ops, s, "lsi-mmio", 0x400); |
| b/hw/ne2000.c | ||
|---|---|---|
| 749 | 749 |
uint8_t *pci_conf; |
| 750 | 750 |
|
| 751 | 751 |
pci_conf = d->dev.config; |
| 752 |
/* TODO: RST# value should be 0. PCI spec 6.2.4 */ |
|
| 753 |
pci_conf[PCI_INTERRUPT_PIN] = 1; // interrupt pin 0 |
|
| 752 |
pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin A */ |
|
| 754 | 753 |
|
| 755 | 754 |
s = &d->ne2000; |
| 756 | 755 |
ne2000_setup_io(s, 0x100); |
| b/hw/pcnet-pci.c | ||
|---|---|---|
| 285 | 285 |
pci_set_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID, 0x0); |
| 286 | 286 |
pci_set_word(pci_conf + PCI_SUBSYSTEM_ID, 0x0); |
| 287 | 287 |
|
| 288 |
pci_conf[PCI_INTERRUPT_PIN] = 1; // interrupt pin 0
|
|
| 288 |
pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin A */
|
|
| 289 | 289 |
pci_conf[PCI_MIN_GNT] = 0x06; |
| 290 | 290 |
pci_conf[PCI_MAX_LAT] = 0xff; |
| 291 | 291 |
|
| b/hw/rtl8139.c | ||
|---|---|---|
| 3464 | 3464 |
uint8_t *pci_conf; |
| 3465 | 3465 |
|
| 3466 | 3466 |
pci_conf = s->dev.config; |
| 3467 |
pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin 0 */
|
|
| 3467 |
pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin A */
|
|
| 3468 | 3468 |
/* TODO: start of capability list, but no capability |
| 3469 | 3469 |
* list bit in status register, and offset 0xdc seems unused. */ |
| 3470 | 3470 |
pci_conf[PCI_CAPABILITY_LIST] = 0xdc; |
| b/hw/usb-ehci.c | ||
|---|---|---|
| 2291 | 2291 |
pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00); |
| 2292 | 2292 |
//pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); |
| 2293 | 2293 |
|
| 2294 |
pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); // interrupt pin 3
|
|
| 2294 |
pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */
|
|
| 2295 | 2295 |
pci_set_byte(&pci_conf[PCI_MIN_GNT], 0); |
| 2296 | 2296 |
pci_set_byte(&pci_conf[PCI_MAX_LAT], 0); |
| 2297 | 2297 |
|
| b/hw/usb-ohci.c | ||
|---|---|---|
| 1780 | 1780 |
OHCIPCIState *ohci = DO_UPCAST(OHCIPCIState, pci_dev, dev); |
| 1781 | 1781 |
|
| 1782 | 1782 |
ohci->pci_dev.config[PCI_CLASS_PROG] = 0x10; /* OHCI */ |
| 1783 |
/* TODO: RST# value should be 0. */ |
|
| 1784 |
ohci->pci_dev.config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */ |
|
| 1783 |
ohci->pci_dev.config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */ |
|
| 1785 | 1784 |
|
| 1786 | 1785 |
if (usb_ohci_init(&ohci->state, &dev->qdev, ohci->num_ports, 0, |
| 1787 | 1786 |
ohci->masterbus, ohci->firstport) != 0) {
|
| b/hw/usb-uhci.c | ||
|---|---|---|
| 1131 | 1131 |
|
| 1132 | 1132 |
pci_conf[PCI_CLASS_PROG] = 0x00; |
| 1133 | 1133 |
/* TODO: reset value should be 0. */ |
| 1134 |
pci_conf[PCI_INTERRUPT_PIN] = 4; // interrupt pin 3
|
|
| 1134 |
pci_conf[PCI_INTERRUPT_PIN] = 4; /* interrupt pin D */
|
|
| 1135 | 1135 |
pci_conf[USB_SBRN] = USB_RELEASE_1; // release number |
| 1136 | 1136 |
|
| 1137 | 1137 |
if (s->masterbus) {
|
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