Revision 81926f47 arm-semi.c

b/arm-semi.c
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    return code;
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}
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#else
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static inline uint32_t set_swi_errno(CPUState *env, uint32_t code)
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static inline uint32_t set_swi_errno(CPUARMState *env, uint32_t code)
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{
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    return code;
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}
......
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static target_ulong syscall_err;
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#endif
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static void arm_semi_cb(CPUState *env, target_ulong ret, target_ulong err)
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static void arm_semi_cb(CPUARMState *env, target_ulong ret, target_ulong err)
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{
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#ifdef CONFIG_USER_ONLY
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    TaskState *ts = env->opaque;
......
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    }
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}
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static void arm_semi_flen_cb(CPUState *env, target_ulong ret, target_ulong err)
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static void arm_semi_flen_cb(CPUARMState *env, target_ulong ret, target_ulong err)
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{
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    /* The size is always stored in big-endian order, extract
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       the value. We assume the size always fit in 32 bits.  */
......
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    __arg;					\
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})
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#define SET_ARG(n, val) put_user_ual(val, args + (n) * 4)
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uint32_t do_arm_semihosting(CPUState *env)
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uint32_t do_arm_semihosting(CPUARMState *env)
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{
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    target_ulong args;
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    char * s;
......
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#ifdef CONFIG_USER_ONLY
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    TaskState *ts = env->opaque;
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#else
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    CPUState *ts = env;
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    CPUARMState *ts = env;
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#endif
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    nr = env->regs[0];

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