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1 | 80cabfad | bellard | /*
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2 | 80cabfad | bellard | * QEMU PC System Emulator
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3 | 5fafdf24 | ths | *
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4 | 80cabfad | bellard | * Copyright (c) 2003-2004 Fabrice Bellard
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5 | 5fafdf24 | ths | *
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6 | 80cabfad | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 80cabfad | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 80cabfad | bellard | * in the Software without restriction, including without limitation the rights
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9 | 80cabfad | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 80cabfad | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 80cabfad | bellard | * furnished to do so, subject to the following conditions:
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12 | 80cabfad | bellard | *
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13 | 80cabfad | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 80cabfad | bellard | * all copies or substantial portions of the Software.
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15 | 80cabfad | bellard | *
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16 | 80cabfad | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 80cabfad | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 80cabfad | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 80cabfad | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 80cabfad | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 80cabfad | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 80cabfad | bellard | * THE SOFTWARE.
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23 | 80cabfad | bellard | */
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24 | 87ecb68b | pbrook | #include "hw.h" |
25 | 87ecb68b | pbrook | #include "pc.h" |
26 | 87ecb68b | pbrook | #include "fdc.h" |
27 | 87ecb68b | pbrook | #include "pci.h" |
28 | 87ecb68b | pbrook | #include "block.h" |
29 | 87ecb68b | pbrook | #include "sysemu.h" |
30 | 87ecb68b | pbrook | #include "audio/audio.h" |
31 | 87ecb68b | pbrook | #include "net.h" |
32 | 87ecb68b | pbrook | #include "smbus.h" |
33 | 87ecb68b | pbrook | #include "boards.h" |
34 | 376253ec | aliguori | #include "monitor.h" |
35 | 3cce6243 | blueswir1 | #include "fw_cfg.h" |
36 | 16b29ae1 | aliguori | #include "hpet_emul.h" |
37 | 9dd986cc | Richard W.M. Jones | #include "watchdog.h" |
38 | b6f6e3d3 | aliguori | #include "smbios.h" |
39 | ec82026c | Gerd Hoffmann | #include "ide.h" |
40 | 80cabfad | bellard | |
41 | b41a2cd1 | bellard | /* output Bochs bios info messages */
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42 | b41a2cd1 | bellard | //#define DEBUG_BIOS
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43 | b41a2cd1 | bellard | |
44 | f16408df | Alexander Graf | /* Show multiboot debug output */
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45 | f16408df | Alexander Graf | //#define DEBUG_MULTIBOOT
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46 | f16408df | Alexander Graf | |
47 | 80cabfad | bellard | #define BIOS_FILENAME "bios.bin" |
48 | 80cabfad | bellard | #define VGABIOS_FILENAME "vgabios.bin" |
49 | de9258a8 | bellard | #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
50 | 80cabfad | bellard | |
51 | 7fb4fdcf | balrog | #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024) |
52 | 7fb4fdcf | balrog | |
53 | a80274c3 | pbrook | /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
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54 | a80274c3 | pbrook | #define ACPI_DATA_SIZE 0x10000 |
55 | 3cce6243 | blueswir1 | #define BIOS_CFG_IOPORT 0x510 |
56 | 8a92ea2f | aliguori | #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0) |
57 | b6f6e3d3 | aliguori | #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1) |
58 | 6b35e7bf | Jes Sorensen | #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2) |
59 | 80cabfad | bellard | |
60 | e4bcb14c | ths | #define MAX_IDE_BUS 2 |
61 | e4bcb14c | ths | |
62 | baca51fa | bellard | static fdctrl_t *floppy_controller;
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63 | b0a21b53 | bellard | static RTCState *rtc_state;
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64 | ec844b96 | bellard | static PITState *pit;
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65 | 0a3bacf3 | Juan Quintela | static PCII440FXState *i440fx_state;
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66 | 80cabfad | bellard | |
67 | e28f9884 | Glauber Costa | typedef struct rom_reset_data { |
68 | e28f9884 | Glauber Costa | uint8_t *data; |
69 | e28f9884 | Glauber Costa | target_phys_addr_t addr; |
70 | e28f9884 | Glauber Costa | unsigned size;
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71 | e28f9884 | Glauber Costa | } RomResetData; |
72 | e28f9884 | Glauber Costa | |
73 | e28f9884 | Glauber Costa | static void option_rom_reset(void *_rrd) |
74 | e28f9884 | Glauber Costa | { |
75 | e28f9884 | Glauber Costa | RomResetData *rrd = _rrd; |
76 | e28f9884 | Glauber Costa | |
77 | e28f9884 | Glauber Costa | cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size); |
78 | e28f9884 | Glauber Costa | } |
79 | e28f9884 | Glauber Costa | |
80 | e28f9884 | Glauber Costa | static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size) |
81 | e28f9884 | Glauber Costa | { |
82 | e28f9884 | Glauber Costa | RomResetData *rrd = qemu_malloc(sizeof *rrd);
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83 | e28f9884 | Glauber Costa | |
84 | e28f9884 | Glauber Costa | rrd->data = qemu_malloc(size); |
85 | e28f9884 | Glauber Costa | cpu_physical_memory_read(addr, rrd->data, size); |
86 | e28f9884 | Glauber Costa | rrd->addr = addr; |
87 | e28f9884 | Glauber Costa | rrd->size = size; |
88 | a08d4367 | Jan Kiszka | qemu_register_reset(option_rom_reset, rrd); |
89 | e28f9884 | Glauber Costa | } |
90 | e28f9884 | Glauber Costa | |
91 | 1452411b | Avi Kivity | typedef struct isa_irq_state { |
92 | 1452411b | Avi Kivity | qemu_irq *i8259; |
93 | 1632dc6a | Avi Kivity | qemu_irq *ioapic; |
94 | 1452411b | Avi Kivity | } IsaIrqState; |
95 | 1452411b | Avi Kivity | |
96 | 1452411b | Avi Kivity | static void isa_irq_handler(void *opaque, int n, int level) |
97 | 1452411b | Avi Kivity | { |
98 | 1452411b | Avi Kivity | IsaIrqState *isa = (IsaIrqState *)opaque; |
99 | 1452411b | Avi Kivity | |
100 | 1632dc6a | Avi Kivity | if (n < 16) { |
101 | 1632dc6a | Avi Kivity | qemu_set_irq(isa->i8259[n], level); |
102 | 1632dc6a | Avi Kivity | } |
103 | 1632dc6a | Avi Kivity | qemu_set_irq(isa->ioapic[n], level); |
104 | 1632dc6a | Avi Kivity | }; |
105 | 1452411b | Avi Kivity | |
106 | b41a2cd1 | bellard | static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
107 | 80cabfad | bellard | { |
108 | 80cabfad | bellard | } |
109 | 80cabfad | bellard | |
110 | f929aad6 | bellard | /* MSDOS compatibility mode FPU exception support */
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111 | d537cf6c | pbrook | static qemu_irq ferr_irq;
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112 | f929aad6 | bellard | /* XXX: add IGNNE support */
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113 | f929aad6 | bellard | void cpu_set_ferr(CPUX86State *s)
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114 | f929aad6 | bellard | { |
115 | d537cf6c | pbrook | qemu_irq_raise(ferr_irq); |
116 | f929aad6 | bellard | } |
117 | f929aad6 | bellard | |
118 | f929aad6 | bellard | static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
119 | f929aad6 | bellard | { |
120 | d537cf6c | pbrook | qemu_irq_lower(ferr_irq); |
121 | f929aad6 | bellard | } |
122 | f929aad6 | bellard | |
123 | 28ab0e2e | bellard | /* TSC handling */
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124 | 28ab0e2e | bellard | uint64_t cpu_get_tsc(CPUX86State *env) |
125 | 28ab0e2e | bellard | { |
126 | 4a1418e0 | Anthony Liguori | return cpu_get_ticks();
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127 | 28ab0e2e | bellard | } |
128 | 28ab0e2e | bellard | |
129 | a5954d5c | bellard | /* SMM support */
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130 | a5954d5c | bellard | void cpu_smm_update(CPUState *env)
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131 | a5954d5c | bellard | { |
132 | a5954d5c | bellard | if (i440fx_state && env == first_cpu)
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133 | a5954d5c | bellard | i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
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134 | a5954d5c | bellard | } |
135 | a5954d5c | bellard | |
136 | a5954d5c | bellard | |
137 | 3de388f6 | bellard | /* IRQ handling */
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138 | 3de388f6 | bellard | int cpu_get_pic_interrupt(CPUState *env)
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139 | 3de388f6 | bellard | { |
140 | 3de388f6 | bellard | int intno;
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141 | 3de388f6 | bellard | |
142 | 3de388f6 | bellard | intno = apic_get_interrupt(env); |
143 | 3de388f6 | bellard | if (intno >= 0) { |
144 | 3de388f6 | bellard | /* set irq request if a PIC irq is still pending */
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145 | 3de388f6 | bellard | /* XXX: improve that */
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146 | 5fafdf24 | ths | pic_update_irq(isa_pic); |
147 | 3de388f6 | bellard | return intno;
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148 | 3de388f6 | bellard | } |
149 | 3de388f6 | bellard | /* read the irq from the PIC */
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150 | 0e21e12b | ths | if (!apic_accept_pic_intr(env))
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151 | 0e21e12b | ths | return -1; |
152 | 0e21e12b | ths | |
153 | 3de388f6 | bellard | intno = pic_read_irq(isa_pic); |
154 | 3de388f6 | bellard | return intno;
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155 | 3de388f6 | bellard | } |
156 | 3de388f6 | bellard | |
157 | d537cf6c | pbrook | static void pic_irq_request(void *opaque, int irq, int level) |
158 | 3de388f6 | bellard | { |
159 | a5b38b51 | aurel32 | CPUState *env = first_cpu; |
160 | a5b38b51 | aurel32 | |
161 | d5529471 | aurel32 | if (env->apic_state) {
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162 | d5529471 | aurel32 | while (env) {
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163 | d5529471 | aurel32 | if (apic_accept_pic_intr(env))
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164 | 1a7de94a | aurel32 | apic_deliver_pic_intr(env, level); |
165 | d5529471 | aurel32 | env = env->next_cpu; |
166 | d5529471 | aurel32 | } |
167 | d5529471 | aurel32 | } else {
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168 | b614106a | aurel32 | if (level)
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169 | b614106a | aurel32 | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
170 | b614106a | aurel32 | else
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171 | b614106a | aurel32 | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
172 | a5b38b51 | aurel32 | } |
173 | 3de388f6 | bellard | } |
174 | 3de388f6 | bellard | |
175 | b0a21b53 | bellard | /* PC cmos mappings */
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176 | b0a21b53 | bellard | |
177 | 80cabfad | bellard | #define REG_EQUIPMENT_BYTE 0x14 |
178 | 80cabfad | bellard | |
179 | 777428f2 | bellard | static int cmos_get_fd_drive_type(int fd0) |
180 | 777428f2 | bellard | { |
181 | 777428f2 | bellard | int val;
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182 | 777428f2 | bellard | |
183 | 777428f2 | bellard | switch (fd0) {
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184 | 777428f2 | bellard | case 0: |
185 | 777428f2 | bellard | /* 1.44 Mb 3"5 drive */
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186 | 777428f2 | bellard | val = 4;
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187 | 777428f2 | bellard | break;
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188 | 777428f2 | bellard | case 1: |
189 | 777428f2 | bellard | /* 2.88 Mb 3"5 drive */
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190 | 777428f2 | bellard | val = 5;
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191 | 777428f2 | bellard | break;
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192 | 777428f2 | bellard | case 2: |
193 | 777428f2 | bellard | /* 1.2 Mb 5"5 drive */
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194 | 777428f2 | bellard | val = 2;
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195 | 777428f2 | bellard | break;
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196 | 777428f2 | bellard | default:
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197 | 777428f2 | bellard | val = 0;
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198 | 777428f2 | bellard | break;
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199 | 777428f2 | bellard | } |
200 | 777428f2 | bellard | return val;
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201 | 777428f2 | bellard | } |
202 | 777428f2 | bellard | |
203 | 5fafdf24 | ths | static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
204 | ba6c2377 | bellard | { |
205 | ba6c2377 | bellard | RTCState *s = rtc_state; |
206 | ba6c2377 | bellard | int cylinders, heads, sectors;
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207 | ba6c2377 | bellard | bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
208 | ba6c2377 | bellard | rtc_set_memory(s, type_ofs, 47);
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209 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs, cylinders); |
210 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
211 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 2, heads);
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212 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 3, 0xff); |
213 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 4, 0xff); |
214 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
215 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 6, cylinders);
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216 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
217 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 8, sectors);
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218 | ba6c2377 | bellard | } |
219 | ba6c2377 | bellard | |
220 | 6ac0e82d | balrog | /* convert boot_device letter to something recognizable by the bios */
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221 | 6ac0e82d | balrog | static int boot_device2nibble(char boot_device) |
222 | 6ac0e82d | balrog | { |
223 | 6ac0e82d | balrog | switch(boot_device) {
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224 | 6ac0e82d | balrog | case 'a': |
225 | 6ac0e82d | balrog | case 'b': |
226 | 6ac0e82d | balrog | return 0x01; /* floppy boot */ |
227 | 6ac0e82d | balrog | case 'c': |
228 | 6ac0e82d | balrog | return 0x02; /* hard drive boot */ |
229 | 6ac0e82d | balrog | case 'd': |
230 | 6ac0e82d | balrog | return 0x03; /* CD-ROM boot */ |
231 | 6ac0e82d | balrog | case 'n': |
232 | 6ac0e82d | balrog | return 0x04; /* Network boot */ |
233 | 6ac0e82d | balrog | } |
234 | 6ac0e82d | balrog | return 0; |
235 | 6ac0e82d | balrog | } |
236 | 6ac0e82d | balrog | |
237 | 0ecdffbb | aurel32 | /* copy/pasted from cmos_init, should be made a general function
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238 | 0ecdffbb | aurel32 | and used there as well */
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239 | 3b4366de | blueswir1 | static int pc_boot_set(void *opaque, const char *boot_device) |
240 | 0ecdffbb | aurel32 | { |
241 | 376253ec | aliguori | Monitor *mon = cur_mon; |
242 | 0ecdffbb | aurel32 | #define PC_MAX_BOOT_DEVICES 3 |
243 | 3b4366de | blueswir1 | RTCState *s = (RTCState *)opaque; |
244 | 0ecdffbb | aurel32 | int nbds, bds[3] = { 0, }; |
245 | 0ecdffbb | aurel32 | int i;
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246 | 0ecdffbb | aurel32 | |
247 | 0ecdffbb | aurel32 | nbds = strlen(boot_device); |
248 | 0ecdffbb | aurel32 | if (nbds > PC_MAX_BOOT_DEVICES) {
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249 | 376253ec | aliguori | monitor_printf(mon, "Too many boot devices for PC\n");
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250 | 0ecdffbb | aurel32 | return(1); |
251 | 0ecdffbb | aurel32 | } |
252 | 0ecdffbb | aurel32 | for (i = 0; i < nbds; i++) { |
253 | 0ecdffbb | aurel32 | bds[i] = boot_device2nibble(boot_device[i]); |
254 | 0ecdffbb | aurel32 | if (bds[i] == 0) { |
255 | 376253ec | aliguori | monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
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256 | 376253ec | aliguori | boot_device[i]); |
257 | 0ecdffbb | aurel32 | return(1); |
258 | 0ecdffbb | aurel32 | } |
259 | 0ecdffbb | aurel32 | } |
260 | 0ecdffbb | aurel32 | rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); |
261 | 0ecdffbb | aurel32 | rtc_set_memory(s, 0x38, (bds[2] << 4)); |
262 | 0ecdffbb | aurel32 | return(0); |
263 | 0ecdffbb | aurel32 | } |
264 | 0ecdffbb | aurel32 | |
265 | ba6c2377 | bellard | /* hd_table must contain 4 block drivers */
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266 | 00f82b8a | aurel32 | static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, |
267 | f455e98c | Gerd Hoffmann | const char *boot_device, DriveInfo **hd_table) |
268 | 80cabfad | bellard | { |
269 | b0a21b53 | bellard | RTCState *s = rtc_state; |
270 | 28c5af54 | j_mayer | int nbds, bds[3] = { 0, }; |
271 | 80cabfad | bellard | int val;
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272 | b41a2cd1 | bellard | int fd0, fd1, nb;
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273 | ba6c2377 | bellard | int i;
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274 | b0a21b53 | bellard | |
275 | b0a21b53 | bellard | /* various important CMOS locations needed by PC/Bochs bios */
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276 | 80cabfad | bellard | |
277 | 80cabfad | bellard | /* memory size */
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278 | 333190eb | bellard | val = 640; /* base memory in K */ |
279 | 333190eb | bellard | rtc_set_memory(s, 0x15, val);
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280 | 333190eb | bellard | rtc_set_memory(s, 0x16, val >> 8); |
281 | 333190eb | bellard | |
282 | 80cabfad | bellard | val = (ram_size / 1024) - 1024; |
283 | 80cabfad | bellard | if (val > 65535) |
284 | 80cabfad | bellard | val = 65535;
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285 | b0a21b53 | bellard | rtc_set_memory(s, 0x17, val);
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286 | b0a21b53 | bellard | rtc_set_memory(s, 0x18, val >> 8); |
287 | b0a21b53 | bellard | rtc_set_memory(s, 0x30, val);
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288 | b0a21b53 | bellard | rtc_set_memory(s, 0x31, val >> 8); |
289 | 80cabfad | bellard | |
290 | 00f82b8a | aurel32 | if (above_4g_mem_size) {
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291 | 00f82b8a | aurel32 | rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16); |
292 | 00f82b8a | aurel32 | rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24); |
293 | 00f82b8a | aurel32 | rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32); |
294 | 00f82b8a | aurel32 | } |
295 | 00f82b8a | aurel32 | |
296 | 9da98861 | bellard | if (ram_size > (16 * 1024 * 1024)) |
297 | 9da98861 | bellard | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
298 | 9da98861 | bellard | else
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299 | 9da98861 | bellard | val = 0;
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300 | 80cabfad | bellard | if (val > 65535) |
301 | 80cabfad | bellard | val = 65535;
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302 | b0a21b53 | bellard | rtc_set_memory(s, 0x34, val);
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303 | b0a21b53 | bellard | rtc_set_memory(s, 0x35, val >> 8); |
304 | 3b46e624 | ths | |
305 | 298e01b6 | aurel32 | /* set the number of CPU */
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306 | 298e01b6 | aurel32 | rtc_set_memory(s, 0x5f, smp_cpus - 1); |
307 | 298e01b6 | aurel32 | |
308 | 6ac0e82d | balrog | /* set boot devices, and disable floppy signature check if requested */
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309 | 28c5af54 | j_mayer | #define PC_MAX_BOOT_DEVICES 3 |
310 | 28c5af54 | j_mayer | nbds = strlen(boot_device); |
311 | 28c5af54 | j_mayer | if (nbds > PC_MAX_BOOT_DEVICES) {
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312 | 28c5af54 | j_mayer | fprintf(stderr, "Too many boot devices for PC\n");
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313 | 28c5af54 | j_mayer | exit(1);
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314 | 28c5af54 | j_mayer | } |
315 | 28c5af54 | j_mayer | for (i = 0; i < nbds; i++) { |
316 | 28c5af54 | j_mayer | bds[i] = boot_device2nibble(boot_device[i]); |
317 | 28c5af54 | j_mayer | if (bds[i] == 0) { |
318 | 28c5af54 | j_mayer | fprintf(stderr, "Invalid boot device for PC: '%c'\n",
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319 | 28c5af54 | j_mayer | boot_device[i]); |
320 | 28c5af54 | j_mayer | exit(1);
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321 | 28c5af54 | j_mayer | } |
322 | 28c5af54 | j_mayer | } |
323 | 28c5af54 | j_mayer | rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); |
324 | 28c5af54 | j_mayer | rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); |
325 | 80cabfad | bellard | |
326 | b41a2cd1 | bellard | /* floppy type */
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327 | b41a2cd1 | bellard | |
328 | baca51fa | bellard | fd0 = fdctrl_get_drive_type(floppy_controller, 0);
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329 | baca51fa | bellard | fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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330 | 80cabfad | bellard | |
331 | 777428f2 | bellard | val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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332 | b0a21b53 | bellard | rtc_set_memory(s, 0x10, val);
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333 | 3b46e624 | ths | |
334 | b0a21b53 | bellard | val = 0;
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335 | b41a2cd1 | bellard | nb = 0;
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336 | 80cabfad | bellard | if (fd0 < 3) |
337 | 80cabfad | bellard | nb++; |
338 | 80cabfad | bellard | if (fd1 < 3) |
339 | 80cabfad | bellard | nb++; |
340 | 80cabfad | bellard | switch (nb) {
|
341 | 80cabfad | bellard | case 0: |
342 | 80cabfad | bellard | break;
|
343 | 80cabfad | bellard | case 1: |
344 | b0a21b53 | bellard | val |= 0x01; /* 1 drive, ready for boot */ |
345 | 80cabfad | bellard | break;
|
346 | 80cabfad | bellard | case 2: |
347 | b0a21b53 | bellard | val |= 0x41; /* 2 drives, ready for boot */ |
348 | 80cabfad | bellard | break;
|
349 | 80cabfad | bellard | } |
350 | b0a21b53 | bellard | val |= 0x02; /* FPU is there */ |
351 | b0a21b53 | bellard | val |= 0x04; /* PS/2 mouse installed */ |
352 | b0a21b53 | bellard | rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
353 | b0a21b53 | bellard | |
354 | ba6c2377 | bellard | /* hard drives */
|
355 | ba6c2377 | bellard | |
356 | ba6c2377 | bellard | rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
357 | ba6c2377 | bellard | if (hd_table[0]) |
358 | f455e98c | Gerd Hoffmann | cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv); |
359 | 5fafdf24 | ths | if (hd_table[1]) |
360 | f455e98c | Gerd Hoffmann | cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv); |
361 | ba6c2377 | bellard | |
362 | ba6c2377 | bellard | val = 0;
|
363 | 40b6ecc6 | bellard | for (i = 0; i < 4; i++) { |
364 | ba6c2377 | bellard | if (hd_table[i]) {
|
365 | 46d4767d | bellard | int cylinders, heads, sectors, translation;
|
366 | 46d4767d | bellard | /* NOTE: bdrv_get_geometry_hint() returns the physical
|
367 | 46d4767d | bellard | geometry. It is always such that: 1 <= sects <= 63, 1
|
368 | 46d4767d | bellard | <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
|
369 | 46d4767d | bellard | geometry can be different if a translation is done. */
|
370 | f455e98c | Gerd Hoffmann | translation = bdrv_get_translation_hint(hd_table[i]->bdrv); |
371 | 46d4767d | bellard | if (translation == BIOS_ATA_TRANSLATION_AUTO) {
|
372 | f455e98c | Gerd Hoffmann | bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, §ors); |
373 | 46d4767d | bellard | if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
374 | 46d4767d | bellard | /* No translation. */
|
375 | 46d4767d | bellard | translation = 0;
|
376 | 46d4767d | bellard | } else {
|
377 | 46d4767d | bellard | /* LBA translation. */
|
378 | 46d4767d | bellard | translation = 1;
|
379 | 46d4767d | bellard | } |
380 | 40b6ecc6 | bellard | } else {
|
381 | 46d4767d | bellard | translation--; |
382 | ba6c2377 | bellard | } |
383 | ba6c2377 | bellard | val |= translation << (i * 2);
|
384 | ba6c2377 | bellard | } |
385 | 40b6ecc6 | bellard | } |
386 | ba6c2377 | bellard | rtc_set_memory(s, 0x39, val);
|
387 | 80cabfad | bellard | } |
388 | 80cabfad | bellard | |
389 | 59b8ad81 | bellard | void ioport_set_a20(int enable) |
390 | 59b8ad81 | bellard | { |
391 | 59b8ad81 | bellard | /* XXX: send to all CPUs ? */
|
392 | 59b8ad81 | bellard | cpu_x86_set_a20(first_cpu, enable); |
393 | 59b8ad81 | bellard | } |
394 | 59b8ad81 | bellard | |
395 | 59b8ad81 | bellard | int ioport_get_a20(void) |
396 | 59b8ad81 | bellard | { |
397 | 59b8ad81 | bellard | return ((first_cpu->a20_mask >> 20) & 1); |
398 | 59b8ad81 | bellard | } |
399 | 59b8ad81 | bellard | |
400 | e1a23744 | bellard | static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
401 | e1a23744 | bellard | { |
402 | 59b8ad81 | bellard | ioport_set_a20((val >> 1) & 1); |
403 | e1a23744 | bellard | /* XXX: bit 0 is fast reset */
|
404 | e1a23744 | bellard | } |
405 | e1a23744 | bellard | |
406 | e1a23744 | bellard | static uint32_t ioport92_read(void *opaque, uint32_t addr) |
407 | e1a23744 | bellard | { |
408 | 59b8ad81 | bellard | return ioport_get_a20() << 1; |
409 | e1a23744 | bellard | } |
410 | e1a23744 | bellard | |
411 | 80cabfad | bellard | /***********************************************************/
|
412 | 80cabfad | bellard | /* Bochs BIOS debug ports */
|
413 | 80cabfad | bellard | |
414 | 9596ebb7 | pbrook | static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
415 | 80cabfad | bellard | { |
416 | a2f659ee | bellard | static const char shutdown_str[8] = "Shutdown"; |
417 | a2f659ee | bellard | static int shutdown_index = 0; |
418 | 3b46e624 | ths | |
419 | 80cabfad | bellard | switch(addr) {
|
420 | 80cabfad | bellard | /* Bochs BIOS messages */
|
421 | 80cabfad | bellard | case 0x400: |
422 | 80cabfad | bellard | case 0x401: |
423 | 80cabfad | bellard | fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
|
424 | 80cabfad | bellard | exit(1);
|
425 | 80cabfad | bellard | case 0x402: |
426 | 80cabfad | bellard | case 0x403: |
427 | 80cabfad | bellard | #ifdef DEBUG_BIOS
|
428 | 80cabfad | bellard | fprintf(stderr, "%c", val);
|
429 | 80cabfad | bellard | #endif
|
430 | 80cabfad | bellard | break;
|
431 | a2f659ee | bellard | case 0x8900: |
432 | a2f659ee | bellard | /* same as Bochs power off */
|
433 | a2f659ee | bellard | if (val == shutdown_str[shutdown_index]) {
|
434 | a2f659ee | bellard | shutdown_index++; |
435 | a2f659ee | bellard | if (shutdown_index == 8) { |
436 | a2f659ee | bellard | shutdown_index = 0;
|
437 | a2f659ee | bellard | qemu_system_shutdown_request(); |
438 | a2f659ee | bellard | } |
439 | a2f659ee | bellard | } else {
|
440 | a2f659ee | bellard | shutdown_index = 0;
|
441 | a2f659ee | bellard | } |
442 | a2f659ee | bellard | break;
|
443 | 80cabfad | bellard | |
444 | 80cabfad | bellard | /* LGPL'ed VGA BIOS messages */
|
445 | 80cabfad | bellard | case 0x501: |
446 | 80cabfad | bellard | case 0x502: |
447 | 80cabfad | bellard | fprintf(stderr, "VGA BIOS panic, line %d\n", val);
|
448 | 80cabfad | bellard | exit(1);
|
449 | 80cabfad | bellard | case 0x500: |
450 | 80cabfad | bellard | case 0x503: |
451 | 80cabfad | bellard | #ifdef DEBUG_BIOS
|
452 | 80cabfad | bellard | fprintf(stderr, "%c", val);
|
453 | 80cabfad | bellard | #endif
|
454 | 80cabfad | bellard | break;
|
455 | 80cabfad | bellard | } |
456 | 80cabfad | bellard | } |
457 | 80cabfad | bellard | |
458 | 11c2fd3e | aliguori | extern uint64_t node_cpumask[MAX_NODES];
|
459 | 11c2fd3e | aliguori | |
460 | bf483392 | Alexander Graf | static void *bochs_bios_init(void) |
461 | 80cabfad | bellard | { |
462 | 3cce6243 | blueswir1 | void *fw_cfg;
|
463 | b6f6e3d3 | aliguori | uint8_t *smbios_table; |
464 | b6f6e3d3 | aliguori | size_t smbios_len; |
465 | 11c2fd3e | aliguori | uint64_t *numa_fw_cfg; |
466 | 11c2fd3e | aliguori | int i, j;
|
467 | 3cce6243 | blueswir1 | |
468 | b41a2cd1 | bellard | register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
469 | b41a2cd1 | bellard | register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
470 | b41a2cd1 | bellard | register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
471 | b41a2cd1 | bellard | register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
472 | a2f659ee | bellard | register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
473 | b41a2cd1 | bellard | |
474 | b41a2cd1 | bellard | register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
475 | b41a2cd1 | bellard | register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
476 | b41a2cd1 | bellard | register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
477 | b41a2cd1 | bellard | register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
478 | 3cce6243 | blueswir1 | |
479 | 3cce6243 | blueswir1 | fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0); |
480 | bf483392 | Alexander Graf | |
481 | 3cce6243 | blueswir1 | fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
|
482 | 905fdcb5 | blueswir1 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); |
483 | 80deece2 | blueswir1 | fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables, |
484 | 80deece2 | blueswir1 | acpi_tables_len); |
485 | 6b35e7bf | Jes Sorensen | fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
|
486 | b6f6e3d3 | aliguori | |
487 | b6f6e3d3 | aliguori | smbios_table = smbios_get_table(&smbios_len); |
488 | b6f6e3d3 | aliguori | if (smbios_table)
|
489 | b6f6e3d3 | aliguori | fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES, |
490 | b6f6e3d3 | aliguori | smbios_table, smbios_len); |
491 | 11c2fd3e | aliguori | |
492 | 11c2fd3e | aliguori | /* allocate memory for the NUMA channel: one (64bit) word for the number
|
493 | 11c2fd3e | aliguori | * of nodes, one word for each VCPU->node and one word for each node to
|
494 | 11c2fd3e | aliguori | * hold the amount of memory.
|
495 | 11c2fd3e | aliguori | */
|
496 | 11c2fd3e | aliguori | numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8); |
497 | 11c2fd3e | aliguori | numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
|
498 | 11c2fd3e | aliguori | for (i = 0; i < smp_cpus; i++) { |
499 | 11c2fd3e | aliguori | for (j = 0; j < nb_numa_nodes; j++) { |
500 | 11c2fd3e | aliguori | if (node_cpumask[j] & (1 << i)) { |
501 | 11c2fd3e | aliguori | numa_fw_cfg[i + 1] = cpu_to_le64(j);
|
502 | 11c2fd3e | aliguori | break;
|
503 | 11c2fd3e | aliguori | } |
504 | 11c2fd3e | aliguori | } |
505 | 11c2fd3e | aliguori | } |
506 | 11c2fd3e | aliguori | for (i = 0; i < nb_numa_nodes; i++) { |
507 | 11c2fd3e | aliguori | numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
|
508 | 11c2fd3e | aliguori | } |
509 | 11c2fd3e | aliguori | fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg, |
510 | 11c2fd3e | aliguori | (1 + smp_cpus + nb_numa_nodes) * 8); |
511 | bf483392 | Alexander Graf | |
512 | bf483392 | Alexander Graf | return fw_cfg;
|
513 | 80cabfad | bellard | } |
514 | 80cabfad | bellard | |
515 | 642a4f96 | ths | /* Generate an initial boot sector which sets state and jump to
|
516 | 642a4f96 | ths | a specified vector */
|
517 | 7ffa4767 | pbrook | static void generate_bootsect(target_phys_addr_t option_rom, |
518 | 4fc9af53 | aliguori | uint32_t gpr[8], uint16_t segs[6], uint16_t ip) |
519 | 642a4f96 | ths | { |
520 | 4fc9af53 | aliguori | uint8_t rom[512], *p, *reloc;
|
521 | 4fc9af53 | aliguori | uint8_t sum; |
522 | 642a4f96 | ths | int i;
|
523 | 642a4f96 | ths | |
524 | 4fc9af53 | aliguori | memset(rom, 0, sizeof(rom)); |
525 | 4fc9af53 | aliguori | |
526 | 4fc9af53 | aliguori | p = rom; |
527 | 4fc9af53 | aliguori | /* Make sure we have an option rom signature */
|
528 | 4fc9af53 | aliguori | *p++ = 0x55;
|
529 | 4fc9af53 | aliguori | *p++ = 0xaa;
|
530 | 642a4f96 | ths | |
531 | 4fc9af53 | aliguori | /* ROM size in sectors*/
|
532 | 4fc9af53 | aliguori | *p++ = 1;
|
533 | 642a4f96 | ths | |
534 | 4fc9af53 | aliguori | /* Hook int19 */
|
535 | 642a4f96 | ths | |
536 | 4fc9af53 | aliguori | *p++ = 0x50; /* push ax */ |
537 | 4fc9af53 | aliguori | *p++ = 0x1e; /* push ds */ |
538 | 4fc9af53 | aliguori | *p++ = 0x31; *p++ = 0xc0; /* xor ax, ax */ |
539 | 4fc9af53 | aliguori | *p++ = 0x8e; *p++ = 0xd8; /* mov ax, ds */ |
540 | 642a4f96 | ths | |
541 | 4fc9af53 | aliguori | *p++ = 0xc7; *p++ = 0x06; /* movvw _start,0x64 */ |
542 | 4fc9af53 | aliguori | *p++ = 0x64; *p++ = 0x00; |
543 | 4fc9af53 | aliguori | reloc = p; |
544 | 4fc9af53 | aliguori | *p++ = 0x00; *p++ = 0x00; |
545 | 4fc9af53 | aliguori | |
546 | 4fc9af53 | aliguori | *p++ = 0x8c; *p++ = 0x0e; /* mov cs,0x66 */ |
547 | 4fc9af53 | aliguori | *p++ = 0x66; *p++ = 0x00; |
548 | 4fc9af53 | aliguori | |
549 | 4fc9af53 | aliguori | *p++ = 0x1f; /* pop ds */ |
550 | 4fc9af53 | aliguori | *p++ = 0x58; /* pop ax */ |
551 | 4fc9af53 | aliguori | *p++ = 0xcb; /* lret */ |
552 | 82663ee2 | Blue Swirl | |
553 | 642a4f96 | ths | /* Actual code */
|
554 | 4fc9af53 | aliguori | *reloc = (p - rom); |
555 | 4fc9af53 | aliguori | |
556 | 642a4f96 | ths | *p++ = 0xfa; /* CLI */ |
557 | 642a4f96 | ths | *p++ = 0xfc; /* CLD */ |
558 | 642a4f96 | ths | |
559 | 642a4f96 | ths | for (i = 0; i < 6; i++) { |
560 | 642a4f96 | ths | if (i == 1) /* Skip CS */ |
561 | 642a4f96 | ths | continue;
|
562 | 642a4f96 | ths | |
563 | 642a4f96 | ths | *p++ = 0xb8; /* MOV AX,imm16 */ |
564 | 642a4f96 | ths | *p++ = segs[i]; |
565 | 642a4f96 | ths | *p++ = segs[i] >> 8;
|
566 | 642a4f96 | ths | *p++ = 0x8e; /* MOV <seg>,AX */ |
567 | 642a4f96 | ths | *p++ = 0xc0 + (i << 3); |
568 | 642a4f96 | ths | } |
569 | 642a4f96 | ths | |
570 | 642a4f96 | ths | for (i = 0; i < 8; i++) { |
571 | 642a4f96 | ths | *p++ = 0x66; /* 32-bit operand size */ |
572 | 642a4f96 | ths | *p++ = 0xb8 + i; /* MOV <reg>,imm32 */ |
573 | 642a4f96 | ths | *p++ = gpr[i]; |
574 | 642a4f96 | ths | *p++ = gpr[i] >> 8;
|
575 | 642a4f96 | ths | *p++ = gpr[i] >> 16;
|
576 | 642a4f96 | ths | *p++ = gpr[i] >> 24;
|
577 | 642a4f96 | ths | } |
578 | 642a4f96 | ths | |
579 | 642a4f96 | ths | *p++ = 0xea; /* JMP FAR */ |
580 | 642a4f96 | ths | *p++ = ip; /* IP */
|
581 | 642a4f96 | ths | *p++ = ip >> 8;
|
582 | 642a4f96 | ths | *p++ = segs[1]; /* CS */ |
583 | 642a4f96 | ths | *p++ = segs[1] >> 8; |
584 | 642a4f96 | ths | |
585 | 4fc9af53 | aliguori | /* sign rom */
|
586 | 4fc9af53 | aliguori | sum = 0;
|
587 | 4fc9af53 | aliguori | for (i = 0; i < (sizeof(rom) - 1); i++) |
588 | 4fc9af53 | aliguori | sum += rom[i]; |
589 | 4fc9af53 | aliguori | rom[sizeof(rom) - 1] = -sum; |
590 | 4fc9af53 | aliguori | |
591 | 7ffa4767 | pbrook | cpu_physical_memory_write_rom(option_rom, rom, sizeof(rom));
|
592 | d6ecb036 | Glauber Costa | option_rom_setup_reset(option_rom, sizeof (rom));
|
593 | 642a4f96 | ths | } |
594 | 80cabfad | bellard | |
595 | 642a4f96 | ths | static long get_file_size(FILE *f) |
596 | 642a4f96 | ths | { |
597 | 642a4f96 | ths | long where, size;
|
598 | 642a4f96 | ths | |
599 | 642a4f96 | ths | /* XXX: on Unix systems, using fstat() probably makes more sense */
|
600 | 642a4f96 | ths | |
601 | 642a4f96 | ths | where = ftell(f); |
602 | 642a4f96 | ths | fseek(f, 0, SEEK_END);
|
603 | 642a4f96 | ths | size = ftell(f); |
604 | 642a4f96 | ths | fseek(f, where, SEEK_SET); |
605 | 642a4f96 | ths | |
606 | 642a4f96 | ths | return size;
|
607 | 642a4f96 | ths | } |
608 | 642a4f96 | ths | |
609 | f16408df | Alexander Graf | #define MULTIBOOT_STRUCT_ADDR 0x9000 |
610 | f16408df | Alexander Graf | |
611 | f16408df | Alexander Graf | #if MULTIBOOT_STRUCT_ADDR > 0xf0000 |
612 | f16408df | Alexander Graf | #error multiboot struct needs to fit in 16 bit real mode |
613 | f16408df | Alexander Graf | #endif
|
614 | f16408df | Alexander Graf | |
615 | f16408df | Alexander Graf | static int load_multiboot(void *fw_cfg, |
616 | f16408df | Alexander Graf | FILE *f, |
617 | f16408df | Alexander Graf | const char *kernel_filename, |
618 | f16408df | Alexander Graf | const char *initrd_filename, |
619 | f16408df | Alexander Graf | const char *kernel_cmdline, |
620 | f16408df | Alexander Graf | uint8_t *header) |
621 | f16408df | Alexander Graf | { |
622 | f16408df | Alexander Graf | int i, t, is_multiboot = 0; |
623 | f16408df | Alexander Graf | uint32_t flags = 0;
|
624 | f16408df | Alexander Graf | uint32_t mh_entry_addr; |
625 | f16408df | Alexander Graf | uint32_t mh_load_addr; |
626 | f16408df | Alexander Graf | uint32_t mb_kernel_size; |
627 | f16408df | Alexander Graf | uint32_t mmap_addr = MULTIBOOT_STRUCT_ADDR; |
628 | f16408df | Alexander Graf | uint32_t mb_bootinfo = MULTIBOOT_STRUCT_ADDR + 0x500;
|
629 | f16408df | Alexander Graf | uint32_t mb_cmdline = mb_bootinfo + 0x200;
|
630 | f16408df | Alexander Graf | uint32_t mb_mod_end; |
631 | f16408df | Alexander Graf | |
632 | f16408df | Alexander Graf | /* Ok, let's see if it is a multiboot image.
|
633 | f16408df | Alexander Graf | The header is 12x32bit long, so the latest entry may be 8192 - 48. */
|
634 | f16408df | Alexander Graf | for (i = 0; i < (8192 - 48); i += 4) { |
635 | f16408df | Alexander Graf | if (ldl_p(header+i) == 0x1BADB002) { |
636 | f16408df | Alexander Graf | uint32_t checksum = ldl_p(header+i+8);
|
637 | f16408df | Alexander Graf | flags = ldl_p(header+i+4);
|
638 | f16408df | Alexander Graf | checksum += flags; |
639 | f16408df | Alexander Graf | checksum += (uint32_t)0x1BADB002;
|
640 | f16408df | Alexander Graf | if (!checksum) {
|
641 | f16408df | Alexander Graf | is_multiboot = 1;
|
642 | f16408df | Alexander Graf | break;
|
643 | f16408df | Alexander Graf | } |
644 | f16408df | Alexander Graf | } |
645 | f16408df | Alexander Graf | } |
646 | f16408df | Alexander Graf | |
647 | f16408df | Alexander Graf | if (!is_multiboot)
|
648 | f16408df | Alexander Graf | return 0; /* no multiboot */ |
649 | f16408df | Alexander Graf | |
650 | f16408df | Alexander Graf | #ifdef DEBUG_MULTIBOOT
|
651 | f16408df | Alexander Graf | fprintf(stderr, "qemu: I believe we found a multiboot image!\n");
|
652 | f16408df | Alexander Graf | #endif
|
653 | f16408df | Alexander Graf | |
654 | f16408df | Alexander Graf | if (flags & 0x00000004) { /* MULTIBOOT_HEADER_HAS_VBE */ |
655 | f16408df | Alexander Graf | fprintf(stderr, "qemu: multiboot knows VBE. we don't.\n");
|
656 | f16408df | Alexander Graf | } |
657 | f16408df | Alexander Graf | if (!(flags & 0x00010000)) { /* MULTIBOOT_HEADER_HAS_ADDR */ |
658 | f16408df | Alexander Graf | uint64_t elf_entry; |
659 | f16408df | Alexander Graf | int kernel_size;
|
660 | f16408df | Alexander Graf | fclose(f); |
661 | f16408df | Alexander Graf | kernel_size = load_elf(kernel_filename, 0, &elf_entry, NULL, NULL); |
662 | f16408df | Alexander Graf | if (kernel_size < 0) { |
663 | f16408df | Alexander Graf | fprintf(stderr, "Error while loading elf kernel\n");
|
664 | f16408df | Alexander Graf | exit(1);
|
665 | f16408df | Alexander Graf | } |
666 | f16408df | Alexander Graf | mh_load_addr = mh_entry_addr = elf_entry; |
667 | f16408df | Alexander Graf | mb_kernel_size = kernel_size; |
668 | f16408df | Alexander Graf | |
669 | f16408df | Alexander Graf | #ifdef DEBUG_MULTIBOOT
|
670 | f16408df | Alexander Graf | fprintf(stderr, "qemu: loading multiboot-elf kernel (%#x bytes) with entry %#zx\n",
|
671 | f16408df | Alexander Graf | mb_kernel_size, (size_t)mh_entry_addr); |
672 | f16408df | Alexander Graf | #endif
|
673 | f16408df | Alexander Graf | } else {
|
674 | f16408df | Alexander Graf | /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_ADDR. */
|
675 | f16408df | Alexander Graf | uint32_t mh_header_addr = ldl_p(header+i+12);
|
676 | f16408df | Alexander Graf | mh_load_addr = ldl_p(header+i+16);
|
677 | f16408df | Alexander Graf | #ifdef DEBUG_MULTIBOOT
|
678 | f16408df | Alexander Graf | uint32_t mh_load_end_addr = ldl_p(header+i+20);
|
679 | f16408df | Alexander Graf | uint32_t mh_bss_end_addr = ldl_p(header+i+24);
|
680 | f16408df | Alexander Graf | #endif
|
681 | f16408df | Alexander Graf | uint32_t mb_kernel_text_offset = i - (mh_header_addr - mh_load_addr); |
682 | f16408df | Alexander Graf | |
683 | f16408df | Alexander Graf | mh_entry_addr = ldl_p(header+i+28);
|
684 | f16408df | Alexander Graf | mb_kernel_size = get_file_size(f) - mb_kernel_text_offset; |
685 | f16408df | Alexander Graf | |
686 | f16408df | Alexander Graf | /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_VBE.
|
687 | f16408df | Alexander Graf | uint32_t mh_mode_type = ldl_p(header+i+32);
|
688 | f16408df | Alexander Graf | uint32_t mh_width = ldl_p(header+i+36);
|
689 | f16408df | Alexander Graf | uint32_t mh_height = ldl_p(header+i+40);
|
690 | f16408df | Alexander Graf | uint32_t mh_depth = ldl_p(header+i+44); */
|
691 | f16408df | Alexander Graf | |
692 | f16408df | Alexander Graf | #ifdef DEBUG_MULTIBOOT
|
693 | f16408df | Alexander Graf | fprintf(stderr, "multiboot: mh_header_addr = %#x\n", mh_header_addr);
|
694 | f16408df | Alexander Graf | fprintf(stderr, "multiboot: mh_load_addr = %#x\n", mh_load_addr);
|
695 | f16408df | Alexander Graf | fprintf(stderr, "multiboot: mh_load_end_addr = %#x\n", mh_load_end_addr);
|
696 | f16408df | Alexander Graf | fprintf(stderr, "multiboot: mh_bss_end_addr = %#x\n", mh_bss_end_addr);
|
697 | f16408df | Alexander Graf | #endif
|
698 | f16408df | Alexander Graf | |
699 | f16408df | Alexander Graf | fseek(f, mb_kernel_text_offset, SEEK_SET); |
700 | f16408df | Alexander Graf | |
701 | f16408df | Alexander Graf | #ifdef DEBUG_MULTIBOOT
|
702 | f16408df | Alexander Graf | fprintf(stderr, "qemu: loading multiboot kernel (%#x bytes) at %#x\n",
|
703 | f16408df | Alexander Graf | mb_kernel_size, mh_load_addr); |
704 | f16408df | Alexander Graf | #endif
|
705 | f16408df | Alexander Graf | |
706 | f16408df | Alexander Graf | if (!fread_targphys_ok(mh_load_addr, mb_kernel_size, f)) {
|
707 | f16408df | Alexander Graf | fprintf(stderr, "qemu: read error on multiboot kernel '%s' (%#x)\n",
|
708 | f16408df | Alexander Graf | kernel_filename, mb_kernel_size); |
709 | f16408df | Alexander Graf | exit(1);
|
710 | f16408df | Alexander Graf | } |
711 | f16408df | Alexander Graf | fclose(f); |
712 | f16408df | Alexander Graf | } |
713 | f16408df | Alexander Graf | |
714 | f16408df | Alexander Graf | /* blob size is only the kernel for now */
|
715 | f16408df | Alexander Graf | mb_mod_end = mh_load_addr + mb_kernel_size; |
716 | f16408df | Alexander Graf | |
717 | f16408df | Alexander Graf | /* load modules */
|
718 | f16408df | Alexander Graf | stl_phys(mb_bootinfo + 20, 0x0); /* mods_count */ |
719 | f16408df | Alexander Graf | if (initrd_filename) {
|
720 | f16408df | Alexander Graf | uint32_t mb_mod_info = mb_bootinfo + 0x100;
|
721 | f16408df | Alexander Graf | uint32_t mb_mod_cmdline = mb_bootinfo + 0x300;
|
722 | f16408df | Alexander Graf | uint32_t mb_mod_start = mh_load_addr; |
723 | f16408df | Alexander Graf | uint32_t mb_mod_length = mb_kernel_size; |
724 | f16408df | Alexander Graf | char *next_initrd;
|
725 | f16408df | Alexander Graf | char *next_space;
|
726 | f16408df | Alexander Graf | int mb_mod_count = 0; |
727 | f16408df | Alexander Graf | |
728 | f16408df | Alexander Graf | do {
|
729 | f16408df | Alexander Graf | next_initrd = strchr(initrd_filename, ',');
|
730 | f16408df | Alexander Graf | if (next_initrd)
|
731 | f16408df | Alexander Graf | *next_initrd = '\0';
|
732 | f16408df | Alexander Graf | /* if a space comes after the module filename, treat everything
|
733 | f16408df | Alexander Graf | after that as parameters */
|
734 | f16408df | Alexander Graf | cpu_physical_memory_write(mb_mod_cmdline, (uint8_t*)initrd_filename, |
735 | f16408df | Alexander Graf | strlen(initrd_filename) + 1);
|
736 | f16408df | Alexander Graf | stl_phys(mb_mod_info + 8, mb_mod_cmdline); /* string */ |
737 | f16408df | Alexander Graf | mb_mod_cmdline += strlen(initrd_filename) + 1;
|
738 | f16408df | Alexander Graf | if ((next_space = strchr(initrd_filename, ' '))) |
739 | f16408df | Alexander Graf | *next_space = '\0';
|
740 | f16408df | Alexander Graf | #ifdef DEBUG_MULTIBOOT
|
741 | 82663ee2 | Blue Swirl | printf("multiboot loading module: %s\n", initrd_filename);
|
742 | f16408df | Alexander Graf | #endif
|
743 | f16408df | Alexander Graf | f = fopen(initrd_filename, "rb");
|
744 | f16408df | Alexander Graf | if (f) {
|
745 | f16408df | Alexander Graf | mb_mod_start = (mb_mod_start + mb_mod_length + (TARGET_PAGE_SIZE - 1))
|
746 | f16408df | Alexander Graf | & (TARGET_PAGE_MASK); |
747 | f16408df | Alexander Graf | mb_mod_length = get_file_size(f); |
748 | f16408df | Alexander Graf | mb_mod_end = mb_mod_start + mb_mod_length; |
749 | f16408df | Alexander Graf | |
750 | f16408df | Alexander Graf | if (!fread_targphys_ok(mb_mod_start, mb_mod_length, f)) {
|
751 | f16408df | Alexander Graf | fprintf(stderr, "qemu: read error on multiboot module '%s' (%#x)\n",
|
752 | f16408df | Alexander Graf | initrd_filename, mb_mod_length); |
753 | f16408df | Alexander Graf | exit(1);
|
754 | f16408df | Alexander Graf | } |
755 | f16408df | Alexander Graf | |
756 | f16408df | Alexander Graf | mb_mod_count++; |
757 | f16408df | Alexander Graf | stl_phys(mb_mod_info + 0, mb_mod_start);
|
758 | f16408df | Alexander Graf | stl_phys(mb_mod_info + 4, mb_mod_start + mb_mod_length);
|
759 | f16408df | Alexander Graf | #ifdef DEBUG_MULTIBOOT
|
760 | f16408df | Alexander Graf | printf("mod_start: %#x\nmod_end: %#x\n", mb_mod_start,
|
761 | f16408df | Alexander Graf | mb_mod_start + mb_mod_length); |
762 | f16408df | Alexander Graf | #endif
|
763 | f16408df | Alexander Graf | stl_phys(mb_mod_info + 12, 0x0); /* reserved */ |
764 | f16408df | Alexander Graf | } |
765 | f16408df | Alexander Graf | initrd_filename = next_initrd+1;
|
766 | f16408df | Alexander Graf | mb_mod_info += 16;
|
767 | f16408df | Alexander Graf | } while (next_initrd);
|
768 | f16408df | Alexander Graf | stl_phys(mb_bootinfo + 20, mb_mod_count); /* mods_count */ |
769 | f16408df | Alexander Graf | stl_phys(mb_bootinfo + 24, mb_bootinfo + 0x100); /* mods_addr */ |
770 | f16408df | Alexander Graf | } |
771 | f16408df | Alexander Graf | |
772 | f16408df | Alexander Graf | /* Make sure we're getting kernel + modules back after reset */
|
773 | f16408df | Alexander Graf | option_rom_setup_reset(mh_load_addr, mb_mod_end - mh_load_addr); |
774 | f16408df | Alexander Graf | |
775 | f16408df | Alexander Graf | /* Commandline support */
|
776 | f16408df | Alexander Graf | stl_phys(mb_bootinfo + 16, mb_cmdline);
|
777 | f16408df | Alexander Graf | t = strlen(kernel_filename); |
778 | f16408df | Alexander Graf | cpu_physical_memory_write(mb_cmdline, (uint8_t*)kernel_filename, t); |
779 | f16408df | Alexander Graf | mb_cmdline += t; |
780 | f16408df | Alexander Graf | stb_phys(mb_cmdline++, ' ');
|
781 | f16408df | Alexander Graf | t = strlen(kernel_cmdline) + 1;
|
782 | f16408df | Alexander Graf | cpu_physical_memory_write(mb_cmdline, (uint8_t*)kernel_cmdline, t); |
783 | f16408df | Alexander Graf | |
784 | f16408df | Alexander Graf | /* the kernel is where we want it to be now */
|
785 | f16408df | Alexander Graf | |
786 | f16408df | Alexander Graf | #define MULTIBOOT_FLAGS_MEMORY (1 << 0) |
787 | f16408df | Alexander Graf | #define MULTIBOOT_FLAGS_BOOT_DEVICE (1 << 1) |
788 | f16408df | Alexander Graf | #define MULTIBOOT_FLAGS_CMDLINE (1 << 2) |
789 | f16408df | Alexander Graf | #define MULTIBOOT_FLAGS_MODULES (1 << 3) |
790 | f16408df | Alexander Graf | #define MULTIBOOT_FLAGS_MMAP (1 << 6) |
791 | f16408df | Alexander Graf | stl_phys(mb_bootinfo, MULTIBOOT_FLAGS_MEMORY |
792 | f16408df | Alexander Graf | | MULTIBOOT_FLAGS_BOOT_DEVICE |
793 | f16408df | Alexander Graf | | MULTIBOOT_FLAGS_CMDLINE |
794 | f16408df | Alexander Graf | | MULTIBOOT_FLAGS_MODULES |
795 | f16408df | Alexander Graf | | MULTIBOOT_FLAGS_MMAP); |
796 | f16408df | Alexander Graf | stl_phys(mb_bootinfo + 4, 640); /* mem_lower */ |
797 | f16408df | Alexander Graf | stl_phys(mb_bootinfo + 8, ram_size / 1024); /* mem_upper */ |
798 | f16408df | Alexander Graf | stl_phys(mb_bootinfo + 12, 0x8001ffff); /* XXX: use the -boot switch? */ |
799 | f16408df | Alexander Graf | stl_phys(mb_bootinfo + 48, mmap_addr); /* mmap_addr */ |
800 | f16408df | Alexander Graf | |
801 | f16408df | Alexander Graf | #ifdef DEBUG_MULTIBOOT
|
802 | f16408df | Alexander Graf | fprintf(stderr, "multiboot: mh_entry_addr = %#x\n", mh_entry_addr);
|
803 | f16408df | Alexander Graf | #endif
|
804 | f16408df | Alexander Graf | |
805 | f16408df | Alexander Graf | /* Pass variables to option rom */
|
806 | f16408df | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_entry_addr); |
807 | f16408df | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, mb_bootinfo); |
808 | f16408df | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, mmap_addr); |
809 | f16408df | Alexander Graf | |
810 | f16408df | Alexander Graf | /* Make sure we're getting the config space back after reset */
|
811 | f16408df | Alexander Graf | option_rom_setup_reset(mb_bootinfo, 0x500);
|
812 | f16408df | Alexander Graf | |
813 | f16408df | Alexander Graf | option_rom[nb_option_roms] = "multiboot.bin";
|
814 | f16408df | Alexander Graf | nb_option_roms++; |
815 | f16408df | Alexander Graf | |
816 | f16408df | Alexander Graf | return 1; /* yes, we are multiboot */ |
817 | f16408df | Alexander Graf | } |
818 | f16408df | Alexander Graf | |
819 | f16408df | Alexander Graf | static void load_linux(void *fw_cfg, |
820 | f16408df | Alexander Graf | target_phys_addr_t option_rom, |
821 | 4fc9af53 | aliguori | const char *kernel_filename, |
822 | 642a4f96 | ths | const char *initrd_filename, |
823 | e6ade764 | Glauber Costa | const char *kernel_cmdline, |
824 | e6ade764 | Glauber Costa | target_phys_addr_t max_ram_size) |
825 | 642a4f96 | ths | { |
826 | 642a4f96 | ths | uint16_t protocol; |
827 | 642a4f96 | ths | uint32_t gpr[8];
|
828 | 642a4f96 | ths | uint16_t seg[6];
|
829 | 642a4f96 | ths | uint16_t real_seg; |
830 | 5cea8590 | Paul Brook | int setup_size, kernel_size, initrd_size = 0, cmdline_size; |
831 | 642a4f96 | ths | uint32_t initrd_max; |
832 | f16408df | Alexander Graf | uint8_t header[8192];
|
833 | 5cea8590 | Paul Brook | target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
|
834 | 642a4f96 | ths | FILE *f, *fi; |
835 | bf4e5d92 | Pascal Terjan | char *vmode;
|
836 | 642a4f96 | ths | |
837 | 642a4f96 | ths | /* Align to 16 bytes as a paranoia measure */
|
838 | 642a4f96 | ths | cmdline_size = (strlen(kernel_cmdline)+16) & ~15; |
839 | 642a4f96 | ths | |
840 | 642a4f96 | ths | /* load the kernel header */
|
841 | 642a4f96 | ths | f = fopen(kernel_filename, "rb");
|
842 | 642a4f96 | ths | if (!f || !(kernel_size = get_file_size(f)) ||
|
843 | f16408df | Alexander Graf | fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
|
844 | f16408df | Alexander Graf | MIN(ARRAY_SIZE(header), kernel_size)) { |
845 | 642a4f96 | ths | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
846 | 642a4f96 | ths | kernel_filename); |
847 | 642a4f96 | ths | exit(1);
|
848 | 642a4f96 | ths | } |
849 | 642a4f96 | ths | |
850 | 642a4f96 | ths | /* kernel protocol version */
|
851 | bc4edd79 | bellard | #if 0
|
852 | 642a4f96 | ths | fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
|
853 | bc4edd79 | bellard | #endif
|
854 | 642a4f96 | ths | if (ldl_p(header+0x202) == 0x53726448) |
855 | 642a4f96 | ths | protocol = lduw_p(header+0x206);
|
856 | f16408df | Alexander Graf | else {
|
857 | f16408df | Alexander Graf | /* This looks like a multiboot kernel. If it is, let's stop
|
858 | f16408df | Alexander Graf | treating it like a Linux kernel. */
|
859 | f16408df | Alexander Graf | if (load_multiboot(fw_cfg, f, kernel_filename,
|
860 | f16408df | Alexander Graf | initrd_filename, kernel_cmdline, header)) |
861 | 82663ee2 | Blue Swirl | return;
|
862 | 642a4f96 | ths | protocol = 0;
|
863 | f16408df | Alexander Graf | } |
864 | 642a4f96 | ths | |
865 | 642a4f96 | ths | if (protocol < 0x200 || !(header[0x211] & 0x01)) { |
866 | 642a4f96 | ths | /* Low kernel */
|
867 | a37af289 | blueswir1 | real_addr = 0x90000;
|
868 | a37af289 | blueswir1 | cmdline_addr = 0x9a000 - cmdline_size;
|
869 | a37af289 | blueswir1 | prot_addr = 0x10000;
|
870 | 642a4f96 | ths | } else if (protocol < 0x202) { |
871 | 642a4f96 | ths | /* High but ancient kernel */
|
872 | a37af289 | blueswir1 | real_addr = 0x90000;
|
873 | a37af289 | blueswir1 | cmdline_addr = 0x9a000 - cmdline_size;
|
874 | a37af289 | blueswir1 | prot_addr = 0x100000;
|
875 | 642a4f96 | ths | } else {
|
876 | 642a4f96 | ths | /* High and recent kernel */
|
877 | a37af289 | blueswir1 | real_addr = 0x10000;
|
878 | a37af289 | blueswir1 | cmdline_addr = 0x20000;
|
879 | a37af289 | blueswir1 | prot_addr = 0x100000;
|
880 | 642a4f96 | ths | } |
881 | 642a4f96 | ths | |
882 | bc4edd79 | bellard | #if 0
|
883 | 642a4f96 | ths | fprintf(stderr,
|
884 | 526ccb7a | balrog | "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
|
885 | 526ccb7a | balrog | "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
|
886 | 526ccb7a | balrog | "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
|
887 | a37af289 | blueswir1 | real_addr,
|
888 | a37af289 | blueswir1 | cmdline_addr,
|
889 | a37af289 | blueswir1 | prot_addr);
|
890 | bc4edd79 | bellard | #endif
|
891 | 642a4f96 | ths | |
892 | 642a4f96 | ths | /* highest address for loading the initrd */
|
893 | 642a4f96 | ths | if (protocol >= 0x203) |
894 | 642a4f96 | ths | initrd_max = ldl_p(header+0x22c);
|
895 | 642a4f96 | ths | else
|
896 | 642a4f96 | ths | initrd_max = 0x37ffffff;
|
897 | 642a4f96 | ths | |
898 | e6ade764 | Glauber Costa | if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
|
899 | e6ade764 | Glauber Costa | initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
|
900 | 642a4f96 | ths | |
901 | 642a4f96 | ths | /* kernel command line */
|
902 | a37af289 | blueswir1 | pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
|
903 | 642a4f96 | ths | |
904 | 642a4f96 | ths | if (protocol >= 0x202) { |
905 | a37af289 | blueswir1 | stl_p(header+0x228, cmdline_addr);
|
906 | 642a4f96 | ths | } else {
|
907 | 642a4f96 | ths | stw_p(header+0x20, 0xA33F); |
908 | 642a4f96 | ths | stw_p(header+0x22, cmdline_addr-real_addr);
|
909 | 642a4f96 | ths | } |
910 | 642a4f96 | ths | |
911 | bf4e5d92 | Pascal Terjan | /* handle vga= parameter */
|
912 | bf4e5d92 | Pascal Terjan | vmode = strstr(kernel_cmdline, "vga=");
|
913 | bf4e5d92 | Pascal Terjan | if (vmode) {
|
914 | bf4e5d92 | Pascal Terjan | unsigned int video_mode; |
915 | bf4e5d92 | Pascal Terjan | /* skip "vga=" */
|
916 | bf4e5d92 | Pascal Terjan | vmode += 4;
|
917 | bf4e5d92 | Pascal Terjan | if (!strncmp(vmode, "normal", 6)) { |
918 | bf4e5d92 | Pascal Terjan | video_mode = 0xffff;
|
919 | bf4e5d92 | Pascal Terjan | } else if (!strncmp(vmode, "ext", 3)) { |
920 | bf4e5d92 | Pascal Terjan | video_mode = 0xfffe;
|
921 | bf4e5d92 | Pascal Terjan | } else if (!strncmp(vmode, "ask", 3)) { |
922 | bf4e5d92 | Pascal Terjan | video_mode = 0xfffd;
|
923 | bf4e5d92 | Pascal Terjan | } else {
|
924 | bf4e5d92 | Pascal Terjan | video_mode = strtol(vmode, NULL, 0); |
925 | bf4e5d92 | Pascal Terjan | } |
926 | bf4e5d92 | Pascal Terjan | stw_p(header+0x1fa, video_mode);
|
927 | bf4e5d92 | Pascal Terjan | } |
928 | bf4e5d92 | Pascal Terjan | |
929 | 642a4f96 | ths | /* loader type */
|
930 | 642a4f96 | ths | /* High nybble = B reserved for Qemu; low nybble is revision number.
|
931 | 642a4f96 | ths | If this code is substantially changed, you may want to consider
|
932 | 642a4f96 | ths | incrementing the revision. */
|
933 | 642a4f96 | ths | if (protocol >= 0x200) |
934 | 642a4f96 | ths | header[0x210] = 0xB0; |
935 | 642a4f96 | ths | |
936 | 642a4f96 | ths | /* heap */
|
937 | 642a4f96 | ths | if (protocol >= 0x201) { |
938 | 642a4f96 | ths | header[0x211] |= 0x80; /* CAN_USE_HEAP */ |
939 | 642a4f96 | ths | stw_p(header+0x224, cmdline_addr-real_addr-0x200); |
940 | 642a4f96 | ths | } |
941 | 642a4f96 | ths | |
942 | 642a4f96 | ths | /* load initrd */
|
943 | 642a4f96 | ths | if (initrd_filename) {
|
944 | 642a4f96 | ths | if (protocol < 0x200) { |
945 | 642a4f96 | ths | fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
|
946 | 642a4f96 | ths | exit(1);
|
947 | 642a4f96 | ths | } |
948 | 642a4f96 | ths | |
949 | 642a4f96 | ths | fi = fopen(initrd_filename, "rb");
|
950 | 642a4f96 | ths | if (!fi) {
|
951 | 642a4f96 | ths | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
952 | 642a4f96 | ths | initrd_filename); |
953 | 642a4f96 | ths | exit(1);
|
954 | 642a4f96 | ths | } |
955 | 642a4f96 | ths | |
956 | 642a4f96 | ths | initrd_size = get_file_size(fi); |
957 | a37af289 | blueswir1 | initrd_addr = (initrd_max-initrd_size) & ~4095;
|
958 | 642a4f96 | ths | |
959 | a37af289 | blueswir1 | if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
|
960 | 642a4f96 | ths | fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
|
961 | 642a4f96 | ths | initrd_filename); |
962 | 642a4f96 | ths | exit(1);
|
963 | 642a4f96 | ths | } |
964 | 642a4f96 | ths | fclose(fi); |
965 | 642a4f96 | ths | |
966 | a37af289 | blueswir1 | stl_p(header+0x218, initrd_addr);
|
967 | 642a4f96 | ths | stl_p(header+0x21c, initrd_size);
|
968 | 642a4f96 | ths | } |
969 | 642a4f96 | ths | |
970 | 642a4f96 | ths | /* store the finalized header and load the rest of the kernel */
|
971 | f16408df | Alexander Graf | cpu_physical_memory_write(real_addr, header, ARRAY_SIZE(header)); |
972 | 642a4f96 | ths | |
973 | 642a4f96 | ths | setup_size = header[0x1f1];
|
974 | 642a4f96 | ths | if (setup_size == 0) |
975 | 642a4f96 | ths | setup_size = 4;
|
976 | 642a4f96 | ths | |
977 | 642a4f96 | ths | setup_size = (setup_size+1)*512; |
978 | f16408df | Alexander Graf | /* Size of protected-mode code */
|
979 | f16408df | Alexander Graf | kernel_size -= (setup_size > ARRAY_SIZE(header)) ? setup_size : ARRAY_SIZE(header); |
980 | f16408df | Alexander Graf | |
981 | f16408df | Alexander Graf | /* In case we have read too much already, copy that over */
|
982 | f16408df | Alexander Graf | if (setup_size < ARRAY_SIZE(header)) {
|
983 | f16408df | Alexander Graf | cpu_physical_memory_write(prot_addr, header + setup_size, ARRAY_SIZE(header) - setup_size); |
984 | f16408df | Alexander Graf | prot_addr += (ARRAY_SIZE(header) - setup_size); |
985 | f16408df | Alexander Graf | setup_size = ARRAY_SIZE(header); |
986 | f16408df | Alexander Graf | } |
987 | 642a4f96 | ths | |
988 | f16408df | Alexander Graf | if (!fread_targphys_ok(real_addr + ARRAY_SIZE(header),
|
989 | f16408df | Alexander Graf | setup_size - ARRAY_SIZE(header), f) || |
990 | a37af289 | blueswir1 | !fread_targphys_ok(prot_addr, kernel_size, f)) { |
991 | 642a4f96 | ths | fprintf(stderr, "qemu: read error on kernel '%s'\n",
|
992 | 642a4f96 | ths | kernel_filename); |
993 | 642a4f96 | ths | exit(1);
|
994 | 642a4f96 | ths | } |
995 | 642a4f96 | ths | fclose(f); |
996 | 642a4f96 | ths | |
997 | 642a4f96 | ths | /* generate bootsector to set up the initial register state */
|
998 | a37af289 | blueswir1 | real_seg = real_addr >> 4;
|
999 | 642a4f96 | ths | seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg; |
1000 | 642a4f96 | ths | seg[1] = real_seg+0x20; /* CS */ |
1001 | 642a4f96 | ths | memset(gpr, 0, sizeof gpr); |
1002 | 642a4f96 | ths | gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */ |
1003 | 642a4f96 | ths | |
1004 | d6ecb036 | Glauber Costa | option_rom_setup_reset(real_addr, setup_size); |
1005 | d6ecb036 | Glauber Costa | option_rom_setup_reset(prot_addr, kernel_size); |
1006 | d6ecb036 | Glauber Costa | option_rom_setup_reset(cmdline_addr, cmdline_size); |
1007 | d6ecb036 | Glauber Costa | if (initrd_filename)
|
1008 | d6ecb036 | Glauber Costa | option_rom_setup_reset(initrd_addr, initrd_size); |
1009 | d6ecb036 | Glauber Costa | |
1010 | 4fc9af53 | aliguori | generate_bootsect(option_rom, gpr, seg, 0);
|
1011 | 642a4f96 | ths | } |
1012 | 642a4f96 | ths | |
1013 | b41a2cd1 | bellard | static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
1014 | b41a2cd1 | bellard | static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
1015 | b41a2cd1 | bellard | static const int ide_irq[2] = { 14, 15 }; |
1016 | b41a2cd1 | bellard | |
1017 | b41a2cd1 | bellard | #define NE2000_NB_MAX 6 |
1018 | b41a2cd1 | bellard | |
1019 | 8d11df9e | bellard | static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
1020 | b41a2cd1 | bellard | static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
1021 | b41a2cd1 | bellard | |
1022 | 8d11df9e | bellard | static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
1023 | 8d11df9e | bellard | static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; |
1024 | 8d11df9e | bellard | |
1025 | 6508fe59 | bellard | static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
1026 | 6508fe59 | bellard | static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
1027 | 6508fe59 | bellard | |
1028 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
1029 | d537cf6c | pbrook | static void audio_init (PCIBus *pci_bus, qemu_irq *pic) |
1030 | 6a36d84e | bellard | { |
1031 | 6a36d84e | bellard | struct soundhw *c;
|
1032 | 6a36d84e | bellard | |
1033 | 3a8bae3e | malc | for (c = soundhw; c->name; ++c) {
|
1034 | 3a8bae3e | malc | if (c->enabled) {
|
1035 | 3a8bae3e | malc | if (c->isa) {
|
1036 | 3a8bae3e | malc | c->init.init_isa(pic); |
1037 | 3a8bae3e | malc | } else {
|
1038 | 3a8bae3e | malc | if (pci_bus) {
|
1039 | 3a8bae3e | malc | c->init.init_pci(pci_bus); |
1040 | 6a36d84e | bellard | } |
1041 | 6a36d84e | bellard | } |
1042 | 6a36d84e | bellard | } |
1043 | 6a36d84e | bellard | } |
1044 | 6a36d84e | bellard | } |
1045 | 6a36d84e | bellard | #endif
|
1046 | 6a36d84e | bellard | |
1047 | 3a38d437 | Jes Sorensen | static void pc_init_ne2k_isa(NICInfo *nd) |
1048 | a41b2ff2 | pbrook | { |
1049 | a41b2ff2 | pbrook | static int nb_ne2k = 0; |
1050 | a41b2ff2 | pbrook | |
1051 | a41b2ff2 | pbrook | if (nb_ne2k == NE2000_NB_MAX)
|
1052 | a41b2ff2 | pbrook | return;
|
1053 | 3a38d437 | Jes Sorensen | isa_ne2000_init(ne2000_io[nb_ne2k], |
1054 | 3a38d437 | Jes Sorensen | isa_reserve_irq(ne2000_irq[nb_ne2k]), nd); |
1055 | a41b2ff2 | pbrook | nb_ne2k++; |
1056 | a41b2ff2 | pbrook | } |
1057 | a41b2ff2 | pbrook | |
1058 | f753ff16 | pbrook | static int load_option_rom(const char *oprom, target_phys_addr_t start, |
1059 | f753ff16 | pbrook | target_phys_addr_t end) |
1060 | f753ff16 | pbrook | { |
1061 | 82663ee2 | Blue Swirl | int size;
|
1062 | 82663ee2 | Blue Swirl | char *filename;
|
1063 | 82663ee2 | Blue Swirl | |
1064 | 82663ee2 | Blue Swirl | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, oprom); |
1065 | 82663ee2 | Blue Swirl | if (filename) {
|
1066 | 82663ee2 | Blue Swirl | size = get_image_size(filename); |
1067 | 82663ee2 | Blue Swirl | if (size > 0 && start + size > end) { |
1068 | 82663ee2 | Blue Swirl | fprintf(stderr, "Not enough space to load option rom '%s'\n",
|
1069 | 82663ee2 | Blue Swirl | oprom); |
1070 | f753ff16 | pbrook | exit(1);
|
1071 | f753ff16 | pbrook | } |
1072 | 82663ee2 | Blue Swirl | size = load_image_targphys(filename, start, end - start); |
1073 | 82663ee2 | Blue Swirl | qemu_free(filename); |
1074 | 82663ee2 | Blue Swirl | } else {
|
1075 | 82663ee2 | Blue Swirl | size = -1;
|
1076 | 82663ee2 | Blue Swirl | } |
1077 | 82663ee2 | Blue Swirl | if (size < 0) { |
1078 | 82663ee2 | Blue Swirl | fprintf(stderr, "Could not load option rom '%s'\n", oprom);
|
1079 | 82663ee2 | Blue Swirl | exit(1);
|
1080 | 82663ee2 | Blue Swirl | } |
1081 | 82663ee2 | Blue Swirl | /* Round up optiom rom size to the next 2k boundary */
|
1082 | 82663ee2 | Blue Swirl | size = (size + 2047) & ~2047; |
1083 | 82663ee2 | Blue Swirl | option_rom_setup_reset(start, size); |
1084 | 82663ee2 | Blue Swirl | return size;
|
1085 | f753ff16 | pbrook | } |
1086 | f753ff16 | pbrook | |
1087 | 678e12cc | Gleb Natapov | int cpu_is_bsp(CPUState *env)
|
1088 | 678e12cc | Gleb Natapov | { |
1089 | 82663ee2 | Blue Swirl | return env->cpuid_apic_id == 0; |
1090 | 678e12cc | Gleb Natapov | } |
1091 | 678e12cc | Gleb Natapov | |
1092 | 3a31f36a | Jan Kiszka | static CPUState *pc_new_cpu(const char *cpu_model) |
1093 | 3a31f36a | Jan Kiszka | { |
1094 | 3a31f36a | Jan Kiszka | CPUState *env; |
1095 | 3a31f36a | Jan Kiszka | |
1096 | 3a31f36a | Jan Kiszka | env = cpu_init(cpu_model); |
1097 | 3a31f36a | Jan Kiszka | if (!env) {
|
1098 | 3a31f36a | Jan Kiszka | fprintf(stderr, "Unable to find x86 CPU definition\n");
|
1099 | 3a31f36a | Jan Kiszka | exit(1);
|
1100 | 3a31f36a | Jan Kiszka | } |
1101 | 3a31f36a | Jan Kiszka | if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) { |
1102 | 3a31f36a | Jan Kiszka | env->cpuid_apic_id = env->cpu_index; |
1103 | 3a31f36a | Jan Kiszka | /* APIC reset callback resets cpu */
|
1104 | 3a31f36a | Jan Kiszka | apic_init(env); |
1105 | 3a31f36a | Jan Kiszka | } else {
|
1106 | 3a31f36a | Jan Kiszka | qemu_register_reset((QEMUResetHandler*)cpu_reset, env); |
1107 | 3a31f36a | Jan Kiszka | } |
1108 | 3a31f36a | Jan Kiszka | return env;
|
1109 | 3a31f36a | Jan Kiszka | } |
1110 | 3a31f36a | Jan Kiszka | |
1111 | 80cabfad | bellard | /* PC hardware initialisation */
|
1112 | fbe1b595 | Paul Brook | static void pc_init1(ram_addr_t ram_size, |
1113 | 3023f332 | aliguori | const char *boot_device, |
1114 | e8b2a1c6 | Mark McLoughlin | const char *kernel_filename, |
1115 | e8b2a1c6 | Mark McLoughlin | const char *kernel_cmdline, |
1116 | 3dbbdc25 | bellard | const char *initrd_filename, |
1117 | e8b2a1c6 | Mark McLoughlin | const char *cpu_model, |
1118 | caea79a9 | Mark McLoughlin | int pci_enabled)
|
1119 | 80cabfad | bellard | { |
1120 | 5cea8590 | Paul Brook | char *filename;
|
1121 | 642a4f96 | ths | int ret, linux_boot, i;
|
1122 | b584726d | pbrook | ram_addr_t ram_addr, bios_offset, option_rom_offset; |
1123 | 00f82b8a | aurel32 | ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
|
1124 | f753ff16 | pbrook | int bios_size, isa_bios_size, oprom_area_size;
|
1125 | 46e50e9d | bellard | PCIBus *pci_bus; |
1126 | b3999638 | Gerd Hoffmann | ISADevice *isa_dev; |
1127 | 5c3ff3a7 | pbrook | int piix3_devfn = -1; |
1128 | 59b8ad81 | bellard | CPUState *env; |
1129 | d537cf6c | pbrook | qemu_irq *cpu_irq; |
1130 | 1452411b | Avi Kivity | qemu_irq *isa_irq; |
1131 | d537cf6c | pbrook | qemu_irq *i8259; |
1132 | 1452411b | Avi Kivity | IsaIrqState *isa_irq_state; |
1133 | 751c6a17 | Gerd Hoffmann | DriveInfo *dinfo; |
1134 | f455e98c | Gerd Hoffmann | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
1135 | e4bcb14c | ths | BlockDriverState *fd[MAX_FD]; |
1136 | 34b39c2b | aliguori | int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
|
1137 | bf483392 | Alexander Graf | void *fw_cfg;
|
1138 | d592d303 | bellard | |
1139 | 00f82b8a | aurel32 | if (ram_size >= 0xe0000000 ) { |
1140 | 00f82b8a | aurel32 | above_4g_mem_size = ram_size - 0xe0000000;
|
1141 | 00f82b8a | aurel32 | below_4g_mem_size = 0xe0000000;
|
1142 | 00f82b8a | aurel32 | } else {
|
1143 | 00f82b8a | aurel32 | below_4g_mem_size = ram_size; |
1144 | 00f82b8a | aurel32 | } |
1145 | 00f82b8a | aurel32 | |
1146 | 80cabfad | bellard | linux_boot = (kernel_filename != NULL);
|
1147 | 80cabfad | bellard | |
1148 | 59b8ad81 | bellard | /* init CPUs */
|
1149 | a049de61 | bellard | if (cpu_model == NULL) { |
1150 | a049de61 | bellard | #ifdef TARGET_X86_64
|
1151 | a049de61 | bellard | cpu_model = "qemu64";
|
1152 | a049de61 | bellard | #else
|
1153 | a049de61 | bellard | cpu_model = "qemu32";
|
1154 | a049de61 | bellard | #endif
|
1155 | a049de61 | bellard | } |
1156 | 3a31f36a | Jan Kiszka | |
1157 | 3a31f36a | Jan Kiszka | for (i = 0; i < smp_cpus; i++) { |
1158 | 3a31f36a | Jan Kiszka | env = pc_new_cpu(cpu_model); |
1159 | 59b8ad81 | bellard | } |
1160 | 59b8ad81 | bellard | |
1161 | 26fb5e48 | aurel32 | vmport_init(); |
1162 | 26fb5e48 | aurel32 | |
1163 | 80cabfad | bellard | /* allocate RAM */
|
1164 | 82b36dc3 | aliguori | ram_addr = qemu_ram_alloc(0xa0000);
|
1165 | 82b36dc3 | aliguori | cpu_register_physical_memory(0, 0xa0000, ram_addr); |
1166 | 82b36dc3 | aliguori | |
1167 | 82b36dc3 | aliguori | /* Allocate, even though we won't register, so we don't break the
|
1168 | 82b36dc3 | aliguori | * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
|
1169 | 82b36dc3 | aliguori | * and some bios areas, which will be registered later
|
1170 | 82b36dc3 | aliguori | */
|
1171 | 82b36dc3 | aliguori | ram_addr = qemu_ram_alloc(0x100000 - 0xa0000); |
1172 | 82b36dc3 | aliguori | ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
|
1173 | 82b36dc3 | aliguori | cpu_register_physical_memory(0x100000,
|
1174 | 82b36dc3 | aliguori | below_4g_mem_size - 0x100000,
|
1175 | 82b36dc3 | aliguori | ram_addr); |
1176 | 00f82b8a | aurel32 | |
1177 | 00f82b8a | aurel32 | /* above 4giga memory allocation */
|
1178 | 00f82b8a | aurel32 | if (above_4g_mem_size > 0) { |
1179 | 8a637d44 | Paul Brook | #if TARGET_PHYS_ADDR_BITS == 32 |
1180 | 8a637d44 | Paul Brook | hw_error("To much RAM for 32-bit physical address");
|
1181 | 8a637d44 | Paul Brook | #else
|
1182 | 82b36dc3 | aliguori | ram_addr = qemu_ram_alloc(above_4g_mem_size); |
1183 | 82b36dc3 | aliguori | cpu_register_physical_memory(0x100000000ULL,
|
1184 | 526ccb7a | balrog | above_4g_mem_size, |
1185 | 82b36dc3 | aliguori | ram_addr); |
1186 | 8a637d44 | Paul Brook | #endif
|
1187 | 00f82b8a | aurel32 | } |
1188 | 80cabfad | bellard | |
1189 | 82b36dc3 | aliguori | |
1190 | 970ac5a3 | bellard | /* BIOS load */
|
1191 | 1192dad8 | j_mayer | if (bios_name == NULL) |
1192 | 1192dad8 | j_mayer | bios_name = BIOS_FILENAME; |
1193 | 5cea8590 | Paul Brook | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
1194 | 5cea8590 | Paul Brook | if (filename) {
|
1195 | 5cea8590 | Paul Brook | bios_size = get_image_size(filename); |
1196 | 5cea8590 | Paul Brook | } else {
|
1197 | 5cea8590 | Paul Brook | bios_size = -1;
|
1198 | 5cea8590 | Paul Brook | } |
1199 | 5fafdf24 | ths | if (bios_size <= 0 || |
1200 | 970ac5a3 | bellard | (bios_size % 65536) != 0) { |
1201 | 7587cf44 | bellard | goto bios_error;
|
1202 | 7587cf44 | bellard | } |
1203 | 970ac5a3 | bellard | bios_offset = qemu_ram_alloc(bios_size); |
1204 | 5cea8590 | Paul Brook | ret = load_image(filename, qemu_get_ram_ptr(bios_offset)); |
1205 | 7587cf44 | bellard | if (ret != bios_size) {
|
1206 | 7587cf44 | bellard | bios_error:
|
1207 | 5cea8590 | Paul Brook | fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
|
1208 | 80cabfad | bellard | exit(1);
|
1209 | 80cabfad | bellard | } |
1210 | 5cea8590 | Paul Brook | if (filename) {
|
1211 | 5cea8590 | Paul Brook | qemu_free(filename); |
1212 | 5cea8590 | Paul Brook | } |
1213 | 7587cf44 | bellard | /* map the last 128KB of the BIOS in ISA space */
|
1214 | 7587cf44 | bellard | isa_bios_size = bios_size; |
1215 | 7587cf44 | bellard | if (isa_bios_size > (128 * 1024)) |
1216 | 7587cf44 | bellard | isa_bios_size = 128 * 1024; |
1217 | 5fafdf24 | ths | cpu_register_physical_memory(0x100000 - isa_bios_size,
|
1218 | 5fafdf24 | ths | isa_bios_size, |
1219 | 7587cf44 | bellard | (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
1220 | 9ae02555 | ths | |
1221 | 4fc9af53 | aliguori | |
1222 | f753ff16 | pbrook | |
1223 | f753ff16 | pbrook | option_rom_offset = qemu_ram_alloc(0x20000);
|
1224 | f753ff16 | pbrook | oprom_area_size = 0;
|
1225 | 49669fc5 | Glauber Costa | cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset); |
1226 | f753ff16 | pbrook | |
1227 | f753ff16 | pbrook | if (using_vga) {
|
1228 | 5cea8590 | Paul Brook | const char *vgabios_filename; |
1229 | f753ff16 | pbrook | /* VGA BIOS load */
|
1230 | f753ff16 | pbrook | if (cirrus_vga_enabled) {
|
1231 | 5cea8590 | Paul Brook | vgabios_filename = VGABIOS_CIRRUS_FILENAME; |
1232 | f753ff16 | pbrook | } else {
|
1233 | 5cea8590 | Paul Brook | vgabios_filename = VGABIOS_FILENAME; |
1234 | 970ac5a3 | bellard | } |
1235 | 5cea8590 | Paul Brook | oprom_area_size = load_option_rom(vgabios_filename, 0xc0000, 0xe0000); |
1236 | f753ff16 | pbrook | } |
1237 | f753ff16 | pbrook | /* Although video roms can grow larger than 0x8000, the area between
|
1238 | f753ff16 | pbrook | * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
|
1239 | f753ff16 | pbrook | * for any other kind of option rom inside this area */
|
1240 | f753ff16 | pbrook | if (oprom_area_size < 0x8000) |
1241 | f753ff16 | pbrook | oprom_area_size = 0x8000;
|
1242 | f753ff16 | pbrook | |
1243 | 1d108d97 | Alexander Graf | /* map all the bios at the top of memory */
|
1244 | 1d108d97 | Alexander Graf | cpu_register_physical_memory((uint32_t)(-bios_size), |
1245 | 1d108d97 | Alexander Graf | bios_size, bios_offset | IO_MEM_ROM); |
1246 | 1d108d97 | Alexander Graf | |
1247 | bf483392 | Alexander Graf | fw_cfg = bochs_bios_init(); |
1248 | 1d108d97 | Alexander Graf | |
1249 | f753ff16 | pbrook | if (linux_boot) {
|
1250 | f16408df | Alexander Graf | load_linux(fw_cfg, 0xc0000 + oprom_area_size,
|
1251 | e6ade764 | Glauber Costa | kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size); |
1252 | f753ff16 | pbrook | oprom_area_size += 2048;
|
1253 | f753ff16 | pbrook | } |
1254 | f753ff16 | pbrook | |
1255 | f753ff16 | pbrook | for (i = 0; i < nb_option_roms; i++) { |
1256 | 406c8df3 | Glauber Costa | oprom_area_size += load_option_rom(option_rom[i], 0xc0000 + oprom_area_size,
|
1257 | 406c8df3 | Glauber Costa | 0xe0000);
|
1258 | 406c8df3 | Glauber Costa | } |
1259 | 406c8df3 | Glauber Costa | |
1260 | 406c8df3 | Glauber Costa | for (i = 0; i < nb_nics; i++) { |
1261 | 406c8df3 | Glauber Costa | char nic_oprom[1024]; |
1262 | 406c8df3 | Glauber Costa | const char *model = nd_table[i].model; |
1263 | 406c8df3 | Glauber Costa | |
1264 | 406c8df3 | Glauber Costa | if (!nd_table[i].bootable)
|
1265 | 406c8df3 | Glauber Costa | continue;
|
1266 | 406c8df3 | Glauber Costa | |
1267 | 406c8df3 | Glauber Costa | if (model == NULL) |
1268 | 0d6b0b1d | Anthony Liguori | model = "e1000";
|
1269 | 406c8df3 | Glauber Costa | snprintf(nic_oprom, sizeof(nic_oprom), "pxe-%s.bin", model); |
1270 | 406c8df3 | Glauber Costa | |
1271 | 406c8df3 | Glauber Costa | oprom_area_size += load_option_rom(nic_oprom, 0xc0000 + oprom_area_size,
|
1272 | 406c8df3 | Glauber Costa | 0xe0000);
|
1273 | 9ae02555 | ths | } |
1274 | 9ae02555 | ths | |
1275 | a5b38b51 | aurel32 | cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1); |
1276 | d537cf6c | pbrook | i8259 = i8259_init(cpu_irq[0]);
|
1277 | 1452411b | Avi Kivity | isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
|
1278 | 1452411b | Avi Kivity | isa_irq_state->i8259 = i8259; |
1279 | 1632dc6a | Avi Kivity | isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
|
1280 | d537cf6c | pbrook | |
1281 | 69b91039 | bellard | if (pci_enabled) {
|
1282 | 85a750ca | Juan Quintela | pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq); |
1283 | 46e50e9d | bellard | } else {
|
1284 | 46e50e9d | bellard | pci_bus = NULL;
|
1285 | 2091ba23 | Gerd Hoffmann | isa_bus_new(NULL);
|
1286 | 69b91039 | bellard | } |
1287 | 2091ba23 | Gerd Hoffmann | isa_bus_irqs(isa_irq); |
1288 | 69b91039 | bellard | |
1289 | 3a38d437 | Jes Sorensen | ferr_irq = isa_reserve_irq(13);
|
1290 | 3a38d437 | Jes Sorensen | |
1291 | 80cabfad | bellard | /* init basic PC hardware */
|
1292 | b41a2cd1 | bellard | register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
1293 | 80cabfad | bellard | |
1294 | f929aad6 | bellard | register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
1295 | f929aad6 | bellard | |
1296 | 1f04275e | bellard | if (cirrus_vga_enabled) {
|
1297 | 1f04275e | bellard | if (pci_enabled) {
|
1298 | fbe1b595 | Paul Brook | pci_cirrus_vga_init(pci_bus); |
1299 | 1f04275e | bellard | } else {
|
1300 | fbe1b595 | Paul Brook | isa_cirrus_vga_init(); |
1301 | 1f04275e | bellard | } |
1302 | d34cab9f | ths | } else if (vmsvga_enabled) { |
1303 | d34cab9f | ths | if (pci_enabled)
|
1304 | fbe1b595 | Paul Brook | pci_vmsvga_init(pci_bus); |
1305 | d34cab9f | ths | else
|
1306 | d34cab9f | ths | fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
|
1307 | c2b3b41a | aliguori | } else if (std_vga_enabled) { |
1308 | 89b6b508 | bellard | if (pci_enabled) {
|
1309 | fbe1b595 | Paul Brook | pci_vga_init(pci_bus, 0, 0); |
1310 | 89b6b508 | bellard | } else {
|
1311 | fbe1b595 | Paul Brook | isa_vga_init(); |
1312 | 89b6b508 | bellard | } |
1313 | 1f04275e | bellard | } |
1314 | 80cabfad | bellard | |
1315 | 3a38d437 | Jes Sorensen | rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000); |
1316 | 80cabfad | bellard | |
1317 | 3b4366de | blueswir1 | qemu_register_boot_set(pc_boot_set, rtc_state); |
1318 | 3b4366de | blueswir1 | |
1319 | e1a23744 | bellard | register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
1320 | e1a23744 | bellard | register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
1321 | e1a23744 | bellard | |
1322 | d592d303 | bellard | if (pci_enabled) {
|
1323 | 1632dc6a | Avi Kivity | isa_irq_state->ioapic = ioapic_init(); |
1324 | d592d303 | bellard | } |
1325 | 3a38d437 | Jes Sorensen | pit = pit_init(0x40, isa_reserve_irq(0)); |
1326 | fd06c375 | bellard | pcspk_init(pit); |
1327 | 16b29ae1 | aliguori | if (!no_hpet) {
|
1328 | 1452411b | Avi Kivity | hpet_init(isa_irq); |
1329 | 16b29ae1 | aliguori | } |
1330 | b41a2cd1 | bellard | |
1331 | 8d11df9e | bellard | for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
1332 | 8d11df9e | bellard | if (serial_hds[i]) {
|
1333 | 3a38d437 | Jes Sorensen | serial_init(serial_io[i], isa_reserve_irq(serial_irq[i]), 115200,
|
1334 | b6cd0ea1 | aurel32 | serial_hds[i]); |
1335 | 8d11df9e | bellard | } |
1336 | 8d11df9e | bellard | } |
1337 | b41a2cd1 | bellard | |
1338 | 6508fe59 | bellard | for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
1339 | 6508fe59 | bellard | if (parallel_hds[i]) {
|
1340 | 3a38d437 | Jes Sorensen | parallel_init(parallel_io[i], isa_reserve_irq(parallel_irq[i]), |
1341 | d537cf6c | pbrook | parallel_hds[i]); |
1342 | 6508fe59 | bellard | } |
1343 | 6508fe59 | bellard | } |
1344 | 6508fe59 | bellard | |
1345 | a41b2ff2 | pbrook | for(i = 0; i < nb_nics; i++) { |
1346 | cb457d76 | aliguori | NICInfo *nd = &nd_table[i]; |
1347 | cb457d76 | aliguori | |
1348 | cb457d76 | aliguori | if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0)) |
1349 | 3a38d437 | Jes Sorensen | pc_init_ne2k_isa(nd); |
1350 | cb457d76 | aliguori | else
|
1351 | 0d6b0b1d | Anthony Liguori | pci_nic_init(nd, "e1000", NULL); |
1352 | a41b2ff2 | pbrook | } |
1353 | b41a2cd1 | bellard | |
1354 | 9d5e77a2 | Isaku Yamahata | piix4_acpi_system_hot_add_init(); |
1355 | 5e3cb534 | aliguori | |
1356 | e4bcb14c | ths | if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
|
1357 | e4bcb14c | ths | fprintf(stderr, "qemu: too many IDE bus\n");
|
1358 | e4bcb14c | ths | exit(1);
|
1359 | e4bcb14c | ths | } |
1360 | e4bcb14c | ths | |
1361 | e4bcb14c | ths | for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { |
1362 | f455e98c | Gerd Hoffmann | hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); |
1363 | e4bcb14c | ths | } |
1364 | e4bcb14c | ths | |
1365 | a41b2ff2 | pbrook | if (pci_enabled) {
|
1366 | ae027ad3 | Stefan Weil | pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
|
1367 | a41b2ff2 | pbrook | } else {
|
1368 | e4bcb14c | ths | for(i = 0; i < MAX_IDE_BUS; i++) { |
1369 | 3a38d437 | Jes Sorensen | isa_ide_init(ide_iobase[i], ide_iobase2[i], |
1370 | 3a38d437 | Jes Sorensen | isa_reserve_irq(ide_irq[i]), |
1371 | e4bcb14c | ths | hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
|
1372 | 69b91039 | bellard | } |
1373 | b41a2cd1 | bellard | } |
1374 | 69b91039 | bellard | |
1375 | e8935eef | Gerd Hoffmann | isa_dev = isa_create_simple("i8042", 0x60, 0x64, 1, 12); |
1376 | 7c29d0c0 | bellard | DMA_init(0);
|
1377 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
1378 | 1452411b | Avi Kivity | audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
|
1379 | fb065187 | bellard | #endif
|
1380 | 80cabfad | bellard | |
1381 | e4bcb14c | ths | for(i = 0; i < MAX_FD; i++) { |
1382 | 751c6a17 | Gerd Hoffmann | dinfo = drive_get(IF_FLOPPY, 0, i);
|
1383 | 751c6a17 | Gerd Hoffmann | fd[i] = dinfo ? dinfo->bdrv : NULL;
|
1384 | e4bcb14c | ths | } |
1385 | 2091ba23 | Gerd Hoffmann | floppy_controller = fdctrl_init_isa(6, 2, 0x3f0, fd); |
1386 | b41a2cd1 | bellard | |
1387 | 00f82b8a | aurel32 | cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd); |
1388 | 69b91039 | bellard | |
1389 | bb36d470 | bellard | if (pci_enabled && usb_enabled) {
|
1390 | afcc3cdf | ths | usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
|
1391 | bb36d470 | bellard | } |
1392 | bb36d470 | bellard | |
1393 | 6515b203 | bellard | if (pci_enabled && acpi_enabled) {
|
1394 | 3fffc223 | ths | uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ |
1395 | 0ff596d0 | pbrook | i2c_bus *smbus; |
1396 | 0ff596d0 | pbrook | |
1397 | 0ff596d0 | pbrook | /* TODO: Populate SPD eeprom data. */
|
1398 | 3a38d437 | Jes Sorensen | smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, |
1399 | 3a38d437 | Jes Sorensen | isa_reserve_irq(9));
|
1400 | 3fffc223 | ths | for (i = 0; i < 8; i++) { |
1401 | 1ea96673 | Paul Brook | DeviceState *eeprom; |
1402 | 02e2da45 | Paul Brook | eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
|
1403 | ee6847d1 | Gerd Hoffmann | qdev_prop_set_uint32(eeprom, "address", 0x50 + i); |
1404 | ee6847d1 | Gerd Hoffmann | qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256)); |
1405 | 1ea96673 | Paul Brook | qdev_init(eeprom); |
1406 | 3fffc223 | ths | } |
1407 | 6515b203 | bellard | } |
1408 | 3b46e624 | ths | |
1409 | a5954d5c | bellard | if (i440fx_state) {
|
1410 | a5954d5c | bellard | i440fx_init_memory_mappings(i440fx_state); |
1411 | a5954d5c | bellard | } |
1412 | e4bcb14c | ths | |
1413 | 7d8406be | pbrook | if (pci_enabled) {
|
1414 | e4bcb14c | ths | int max_bus;
|
1415 | 9be5dafe | Paul Brook | int bus;
|
1416 | 96d30e48 | ths | |
1417 | e4bcb14c | ths | max_bus = drive_get_max_bus(IF_SCSI); |
1418 | e4bcb14c | ths | for (bus = 0; bus <= max_bus; bus++) { |
1419 | 9be5dafe | Paul Brook | pci_create_simple(pci_bus, -1, "lsi53c895a"); |
1420 | e4bcb14c | ths | } |
1421 | 7d8406be | pbrook | } |
1422 | 6e02c38d | aliguori | |
1423 | a2fa19f9 | aliguori | /* Add virtio console devices */
|
1424 | a2fa19f9 | aliguori | if (pci_enabled) {
|
1425 | a2fa19f9 | aliguori | for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) { |
1426 | 0e058a8a | Paul Brook | if (virtcon_hds[i]) {
|
1427 | caea79a9 | Mark McLoughlin | pci_create_simple(pci_bus, -1, "virtio-console-pci"); |
1428 | 0e058a8a | Paul Brook | } |
1429 | a2fa19f9 | aliguori | } |
1430 | a2fa19f9 | aliguori | } |
1431 | 80cabfad | bellard | } |
1432 | b5ff2d6e | bellard | |
1433 | fbe1b595 | Paul Brook | static void pc_init_pci(ram_addr_t ram_size, |
1434 | 3023f332 | aliguori | const char *boot_device, |
1435 | 5fafdf24 | ths | const char *kernel_filename, |
1436 | 3dbbdc25 | bellard | const char *kernel_cmdline, |
1437 | 94fc95cd | j_mayer | const char *initrd_filename, |
1438 | 94fc95cd | j_mayer | const char *cpu_model) |
1439 | 3dbbdc25 | bellard | { |
1440 | fbe1b595 | Paul Brook | pc_init1(ram_size, boot_device, |
1441 | 3dbbdc25 | bellard | kernel_filename, kernel_cmdline, |
1442 | caea79a9 | Mark McLoughlin | initrd_filename, cpu_model, 1);
|
1443 | 3dbbdc25 | bellard | } |
1444 | 3dbbdc25 | bellard | |
1445 | fbe1b595 | Paul Brook | static void pc_init_isa(ram_addr_t ram_size, |
1446 | 3023f332 | aliguori | const char *boot_device, |
1447 | 5fafdf24 | ths | const char *kernel_filename, |
1448 | 3dbbdc25 | bellard | const char *kernel_cmdline, |
1449 | 94fc95cd | j_mayer | const char *initrd_filename, |
1450 | 94fc95cd | j_mayer | const char *cpu_model) |
1451 | 3dbbdc25 | bellard | { |
1452 | fbe1b595 | Paul Brook | pc_init1(ram_size, boot_device, |
1453 | 3dbbdc25 | bellard | kernel_filename, kernel_cmdline, |
1454 | caea79a9 | Mark McLoughlin | initrd_filename, cpu_model, 0);
|
1455 | 3dbbdc25 | bellard | } |
1456 | 3dbbdc25 | bellard | |
1457 | 0bacd130 | aliguori | /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
|
1458 | 0bacd130 | aliguori | BIOS will read it and start S3 resume at POST Entry */
|
1459 | 0bacd130 | aliguori | void cmos_set_s3_resume(void) |
1460 | 0bacd130 | aliguori | { |
1461 | 0bacd130 | aliguori | if (rtc_state)
|
1462 | 0bacd130 | aliguori | rtc_set_memory(rtc_state, 0xF, 0xFE); |
1463 | 0bacd130 | aliguori | } |
1464 | 0bacd130 | aliguori | |
1465 | f80f9ec9 | Anthony Liguori | static QEMUMachine pc_machine = {
|
1466 | 95747581 | Mark McLoughlin | .name = "pc-0.11",
|
1467 | 95747581 | Mark McLoughlin | .alias = "pc",
|
1468 | a245f2e7 | aurel32 | .desc = "Standard PC",
|
1469 | a245f2e7 | aurel32 | .init = pc_init_pci, |
1470 | b2097003 | aliguori | .max_cpus = 255,
|
1471 | 0c257437 | Anthony Liguori | .is_default = 1,
|
1472 | 3dbbdc25 | bellard | }; |
1473 | 3dbbdc25 | bellard | |
1474 | 96cc1810 | Gerd Hoffmann | static QEMUMachine pc_machine_v0_10 = {
|
1475 | 96cc1810 | Gerd Hoffmann | .name = "pc-0.10",
|
1476 | 96cc1810 | Gerd Hoffmann | .desc = "Standard PC, qemu 0.10",
|
1477 | 96cc1810 | Gerd Hoffmann | .init = pc_init_pci, |
1478 | 96cc1810 | Gerd Hoffmann | .max_cpus = 255,
|
1479 | 96cc1810 | Gerd Hoffmann | .compat_props = (CompatProperty[]) { |
1480 | ab73ff29 | Gerd Hoffmann | { |
1481 | ab73ff29 | Gerd Hoffmann | .driver = "virtio-blk-pci",
|
1482 | ab73ff29 | Gerd Hoffmann | .property = "class",
|
1483 | ab73ff29 | Gerd Hoffmann | .value = stringify(PCI_CLASS_STORAGE_OTHER), |
1484 | d6beee99 | Gerd Hoffmann | },{ |
1485 | d6beee99 | Gerd Hoffmann | .driver = "virtio-console-pci",
|
1486 | d6beee99 | Gerd Hoffmann | .property = "class",
|
1487 | d6beee99 | Gerd Hoffmann | .value = stringify(PCI_CLASS_DISPLAY_OTHER), |
1488 | a1e0fea5 | Gerd Hoffmann | },{ |
1489 | a1e0fea5 | Gerd Hoffmann | .driver = "virtio-net-pci",
|
1490 | a1e0fea5 | Gerd Hoffmann | .property = "vectors",
|
1491 | a1e0fea5 | Gerd Hoffmann | .value = stringify(0),
|
1492 | 177539e0 | Gerd Hoffmann | },{ |
1493 | 177539e0 | Gerd Hoffmann | .driver = "virtio-blk-pci",
|
1494 | 177539e0 | Gerd Hoffmann | .property = "vectors",
|
1495 | 177539e0 | Gerd Hoffmann | .value = stringify(0),
|
1496 | ab73ff29 | Gerd Hoffmann | }, |
1497 | 96cc1810 | Gerd Hoffmann | { /* end of list */ }
|
1498 | 96cc1810 | Gerd Hoffmann | }, |
1499 | 96cc1810 | Gerd Hoffmann | }; |
1500 | 96cc1810 | Gerd Hoffmann | |
1501 | f80f9ec9 | Anthony Liguori | static QEMUMachine isapc_machine = {
|
1502 | a245f2e7 | aurel32 | .name = "isapc",
|
1503 | a245f2e7 | aurel32 | .desc = "ISA-only PC",
|
1504 | a245f2e7 | aurel32 | .init = pc_init_isa, |
1505 | b2097003 | aliguori | .max_cpus = 1,
|
1506 | b5ff2d6e | bellard | }; |
1507 | f80f9ec9 | Anthony Liguori | |
1508 | f80f9ec9 | Anthony Liguori | static void pc_machine_init(void) |
1509 | f80f9ec9 | Anthony Liguori | { |
1510 | f80f9ec9 | Anthony Liguori | qemu_register_machine(&pc_machine); |
1511 | 96cc1810 | Gerd Hoffmann | qemu_register_machine(&pc_machine_v0_10); |
1512 | f80f9ec9 | Anthony Liguori | qemu_register_machine(&isapc_machine); |
1513 | f80f9ec9 | Anthony Liguori | } |
1514 | f80f9ec9 | Anthony Liguori | |
1515 | f80f9ec9 | Anthony Liguori | machine_init(pc_machine_init); |