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/* General "disassemble this chunk" code.  Used for debugging. */
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#include "config.h"
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#include "dis-asm.h"
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#include "elf.h"
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#include <errno.h>
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#include "cpu.h"
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#include "disas.h"
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/* Filled in by elfload.c.  Simplistic, but will do for now. */
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struct syminfo *syminfos = NULL;
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/* Get LENGTH bytes from info's buffer, at target address memaddr.
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   Transfer them to myaddr.  */
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int
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buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
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                   struct disassemble_info *info)
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{
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    if (memaddr < info->buffer_vma
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        || memaddr + length > info->buffer_vma + info->buffer_length)
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        /* Out of bounds.  Use EIO because GDB uses it.  */
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        return EIO;
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    memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
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    return 0;
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}
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/* Get LENGTH bytes from info's buffer, at target address memaddr.
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   Transfer them to myaddr.  */
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static int
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target_read_memory (bfd_vma memaddr,
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                    bfd_byte *myaddr,
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                    int length,
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                    struct disassemble_info *info)
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{
35 e612a1f7 Blue Swirl
    cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
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    return 0;
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}
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/* Print an error message.  We can assume that this is in response to
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   an error return from buffer_read_memory.  */
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void
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perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
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{
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  if (status != EIO)
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    /* Can't happen.  */
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    (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
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  else
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    /* Actually, address between memaddr and memaddr + len was
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       out of bounds.  */
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    (*info->fprintf_func) (info->stream,
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                           "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
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}
53 aa0aa4fa bellard
54 a31f0531 Jim Meyering
/* This could be in a separate file, to save minuscule amounts of space
55 aa0aa4fa bellard
   in statically linked executables.  */
56 aa0aa4fa bellard
57 aa0aa4fa bellard
/* Just print the address is hex.  This is included for completeness even
58 aa0aa4fa bellard
   though both GDB and objdump provide their own (to print symbolic
59 aa0aa4fa bellard
   addresses).  */
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void
62 3a742b76 pbrook
generic_print_address (bfd_vma addr, struct disassemble_info *info)
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{
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    (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
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}
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/* Just return the given address.  */
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int
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generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
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{
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  return 1;
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}
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75 903ec55c Aurelien Jarno
bfd_vma bfd_getl64 (const bfd_byte *addr)
76 903ec55c Aurelien Jarno
{
77 903ec55c Aurelien Jarno
  unsigned long long v;
78 903ec55c Aurelien Jarno
79 903ec55c Aurelien Jarno
  v = (unsigned long long) addr[0];
80 903ec55c Aurelien Jarno
  v |= (unsigned long long) addr[1] << 8;
81 903ec55c Aurelien Jarno
  v |= (unsigned long long) addr[2] << 16;
82 903ec55c Aurelien Jarno
  v |= (unsigned long long) addr[3] << 24;
83 903ec55c Aurelien Jarno
  v |= (unsigned long long) addr[4] << 32;
84 903ec55c Aurelien Jarno
  v |= (unsigned long long) addr[5] << 40;
85 903ec55c Aurelien Jarno
  v |= (unsigned long long) addr[6] << 48;
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  v |= (unsigned long long) addr[7] << 56;
87 903ec55c Aurelien Jarno
  return (bfd_vma) v;
88 903ec55c Aurelien Jarno
}
89 903ec55c Aurelien Jarno
90 aa0aa4fa bellard
bfd_vma bfd_getl32 (const bfd_byte *addr)
91 aa0aa4fa bellard
{
92 aa0aa4fa bellard
  unsigned long v;
93 aa0aa4fa bellard
94 aa0aa4fa bellard
  v = (unsigned long) addr[0];
95 aa0aa4fa bellard
  v |= (unsigned long) addr[1] << 8;
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  v |= (unsigned long) addr[2] << 16;
97 aa0aa4fa bellard
  v |= (unsigned long) addr[3] << 24;
98 aa0aa4fa bellard
  return (bfd_vma) v;
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}
100 aa0aa4fa bellard
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bfd_vma bfd_getb32 (const bfd_byte *addr)
102 aa0aa4fa bellard
{
103 aa0aa4fa bellard
  unsigned long v;
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  v = (unsigned long) addr[0] << 24;
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  v |= (unsigned long) addr[1] << 16;
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  v |= (unsigned long) addr[2] << 8;
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  v |= (unsigned long) addr[3];
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  return (bfd_vma) v;
110 aa0aa4fa bellard
}
111 aa0aa4fa bellard
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bfd_vma bfd_getl16 (const bfd_byte *addr)
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{
114 6af0bf9c bellard
  unsigned long v;
115 6af0bf9c bellard
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  v = (unsigned long) addr[0];
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  v |= (unsigned long) addr[1] << 8;
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  return (bfd_vma) v;
119 6af0bf9c bellard
}
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bfd_vma bfd_getb16 (const bfd_byte *addr)
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{
123 6af0bf9c bellard
  unsigned long v;
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  v = (unsigned long) addr[0] << 24;
126 6af0bf9c bellard
  v |= (unsigned long) addr[1] << 16;
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  return (bfd_vma) v;
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}
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#ifdef TARGET_ARM
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static int
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print_insn_thumb1(bfd_vma pc, disassemble_info *info)
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{
134 c2d551ff bellard
  return print_insn_arm(pc | 1, info);
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}
136 c2d551ff bellard
#endif
137 c2d551ff bellard
138 e91c8a77 ths
/* Disassemble this for me please... (debugging). 'flags' has the following
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   values:
140 e99722f6 Frediano Ziglio
    i386 - 1 means 16 bit code, 2 means 64 bit code
141 d8fd2954 Paul Brook
    arm  - bit 0 = thumb, bit 1 = reverse endian
142 6a00d601 bellard
    ppc  - nonzero means little endian
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    other targets - unused
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 */
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void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
146 b9adb4a6 bellard
{
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    target_ulong pc;
148 b9adb4a6 bellard
    int count;
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    struct disassemble_info disasm_info;
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    int (*print_insn)(bfd_vma pc, disassemble_info *info);
151 b9adb4a6 bellard
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    INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
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    disasm_info.read_memory_func = target_read_memory;
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    disasm_info.buffer_vma = code;
156 c27004ec bellard
    disasm_info.buffer_length = size;
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158 c27004ec bellard
#ifdef TARGET_WORDS_BIGENDIAN
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    disasm_info.endian = BFD_ENDIAN_BIG;
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#else
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    disasm_info.endian = BFD_ENDIAN_LITTLE;
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#endif
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#if defined(TARGET_I386)
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    if (flags == 2)
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        disasm_info.mach = bfd_mach_x86_64;
166 5fafdf24 ths
    else if (flags == 1)
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        disasm_info.mach = bfd_mach_i386_i8086;
168 c27004ec bellard
    else
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        disasm_info.mach = bfd_mach_i386_i386;
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    print_insn = print_insn_i386;
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#elif defined(TARGET_ARM)
172 d8fd2954 Paul Brook
    if (flags & 1) {
173 d8fd2954 Paul Brook
        print_insn = print_insn_thumb1;
174 d8fd2954 Paul Brook
    } else {
175 d8fd2954 Paul Brook
        print_insn = print_insn_arm;
176 d8fd2954 Paul Brook
    }
177 d8fd2954 Paul Brook
    if (flags & 2) {
178 d8fd2954 Paul Brook
#ifdef TARGET_WORDS_BIGENDIAN
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        disasm_info.endian = BFD_ENDIAN_LITTLE;
180 d8fd2954 Paul Brook
#else
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        disasm_info.endian = BFD_ENDIAN_BIG;
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#endif
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    }
184 c27004ec bellard
#elif defined(TARGET_SPARC)
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    print_insn = print_insn_sparc;
186 3475187d bellard
#ifdef TARGET_SPARC64
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    disasm_info.mach = bfd_mach_sparc_v9b;
188 3b46e624 ths
#endif
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#elif defined(TARGET_PPC)
190 237c0af0 j_mayer
    if (flags >> 16)
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        disasm_info.endian = BFD_ENDIAN_LITTLE;
192 237c0af0 j_mayer
    if (flags & 0xFFFF) {
193 237c0af0 j_mayer
        /* If we have a precise definitions of the instructions set, use it */
194 237c0af0 j_mayer
        disasm_info.mach = flags & 0xFFFF;
195 237c0af0 j_mayer
    } else {
196 a2458627 bellard
#ifdef TARGET_PPC64
197 237c0af0 j_mayer
        disasm_info.mach = bfd_mach_ppc64;
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#else
199 237c0af0 j_mayer
        disasm_info.mach = bfd_mach_ppc;
200 a2458627 bellard
#endif
201 237c0af0 j_mayer
    }
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    print_insn = print_insn_ppc;
203 e6e5906b pbrook
#elif defined(TARGET_M68K)
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    print_insn = print_insn_m68k;
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#elif defined(TARGET_MIPS)
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#ifdef TARGET_WORDS_BIGENDIAN
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    print_insn = print_insn_big_mips;
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#else
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    print_insn = print_insn_little_mips;
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#endif
211 fdf9b3e8 bellard
#elif defined(TARGET_SH4)
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    disasm_info.mach = bfd_mach_sh4;
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    print_insn = print_insn_sh;
214 eddf68a6 j_mayer
#elif defined(TARGET_ALPHA)
215 b9bec751 Richard Henderson
    disasm_info.mach = bfd_mach_alpha_ev6;
216 eddf68a6 j_mayer
    print_insn = print_insn_alpha;
217 a25fd137 ths
#elif defined(TARGET_CRIS)
218 b09cd072 Edgar E. Iglesias
    if (flags != 32) {
219 b09cd072 Edgar E. Iglesias
        disasm_info.mach = bfd_mach_cris_v0_v10;
220 b09cd072 Edgar E. Iglesias
        print_insn = print_insn_crisv10;
221 b09cd072 Edgar E. Iglesias
    } else {
222 b09cd072 Edgar E. Iglesias
        disasm_info.mach = bfd_mach_cris_v32;
223 b09cd072 Edgar E. Iglesias
        print_insn = print_insn_crisv32;
224 b09cd072 Edgar E. Iglesias
    }
225 db500609 Ulrich Hecht
#elif defined(TARGET_S390X)
226 db500609 Ulrich Hecht
    disasm_info.mach = bfd_mach_s390_64;
227 db500609 Ulrich Hecht
    print_insn = print_insn_s390;
228 e90e390c Edgar E. Iglesias
#elif defined(TARGET_MICROBLAZE)
229 e90e390c Edgar E. Iglesias
    disasm_info.mach = bfd_arch_microblaze;
230 e90e390c Edgar E. Iglesias
    print_insn = print_insn_microblaze;
231 79368f49 Michael Walle
#elif defined(TARGET_LM32)
232 79368f49 Michael Walle
    disasm_info.mach = bfd_mach_lm32;
233 79368f49 Michael Walle
    print_insn = print_insn_lm32;
234 c27004ec bellard
#else
235 b8076a74 bellard
    fprintf(out, "0x" TARGET_FMT_lx
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            ": Asm output not supported on this arch\n", code);
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    return;
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#endif
239 c6105c0a bellard
240 7e000c2e blueswir1
    for (pc = code; size > 0; pc += count, size -= count) {
241 fa15e030 bellard
        fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
242 c27004ec bellard
        count = print_insn(pc, &disasm_info);
243 c27004ec bellard
#if 0
244 c27004ec bellard
        {
245 c27004ec bellard
            int i;
246 c27004ec bellard
            uint8_t b;
247 c27004ec bellard
            fprintf(out, " {");
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            for(i = 0; i < count; i++) {
249 c27004ec bellard
                target_read_memory(pc + i, &b, 1, &disasm_info);
250 c27004ec bellard
                fprintf(out, " %02x", b);
251 c27004ec bellard
            }
252 c27004ec bellard
            fprintf(out, " }");
253 c27004ec bellard
        }
254 c27004ec bellard
#endif
255 c27004ec bellard
        fprintf(out, "\n");
256 c27004ec bellard
        if (count < 0)
257 c27004ec bellard
            break;
258 754d00ae malc
        if (size < count) {
259 754d00ae malc
            fprintf(out,
260 754d00ae malc
                    "Disassembler disagrees with translator over instruction "
261 754d00ae malc
                    "decoding\n"
262 754d00ae malc
                    "Please report this to qemu-devel@nongnu.org\n");
263 754d00ae malc
            break;
264 754d00ae malc
        }
265 c27004ec bellard
    }
266 c27004ec bellard
}
267 c27004ec bellard
268 c27004ec bellard
/* Disassemble this for me please... (debugging). */
269 c27004ec bellard
void disas(FILE *out, void *code, unsigned long size)
270 c27004ec bellard
{
271 b0b0f1c9 Stefan Weil
    uintptr_t pc;
272 c27004ec bellard
    int count;
273 c27004ec bellard
    struct disassemble_info disasm_info;
274 c27004ec bellard
    int (*print_insn)(bfd_vma pc, disassemble_info *info);
275 c27004ec bellard
276 c27004ec bellard
    INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
277 c27004ec bellard
278 b9adb4a6 bellard
    disasm_info.buffer = code;
279 b0b0f1c9 Stefan Weil
    disasm_info.buffer_vma = (uintptr_t)code;
280 b9adb4a6 bellard
    disasm_info.buffer_length = size;
281 b9adb4a6 bellard
282 e2542fe2 Juan Quintela
#ifdef HOST_WORDS_BIGENDIAN
283 c27004ec bellard
    disasm_info.endian = BFD_ENDIAN_BIG;
284 b9adb4a6 bellard
#else
285 c27004ec bellard
    disasm_info.endian = BFD_ENDIAN_LITTLE;
286 b9adb4a6 bellard
#endif
287 5826e519 Stefan Weil
#if defined(CONFIG_TCG_INTERPRETER)
288 5826e519 Stefan Weil
    print_insn = print_insn_tci;
289 5826e519 Stefan Weil
#elif defined(__i386__)
290 c27004ec bellard
    disasm_info.mach = bfd_mach_i386_i386;
291 c27004ec bellard
    print_insn = print_insn_i386;
292 bc51c5c9 bellard
#elif defined(__x86_64__)
293 c27004ec bellard
    disasm_info.mach = bfd_mach_x86_64;
294 c27004ec bellard
    print_insn = print_insn_i386;
295 e58ffeb3 malc
#elif defined(_ARCH_PPC)
296 c27004ec bellard
    print_insn = print_insn_ppc;
297 a993ba85 bellard
#elif defined(__alpha__)
298 c27004ec bellard
    print_insn = print_insn_alpha;
299 aa0aa4fa bellard
#elif defined(__sparc__)
300 c27004ec bellard
    print_insn = print_insn_sparc;
301 6ecd4534 blueswir1
#if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
302 6ecd4534 blueswir1
    disasm_info.mach = bfd_mach_sparc_v9b;
303 6ecd4534 blueswir1
#endif
304 5fafdf24 ths
#elif defined(__arm__)
305 c27004ec bellard
    print_insn = print_insn_arm;
306 6af0bf9c bellard
#elif defined(__MIPSEB__)
307 6af0bf9c bellard
    print_insn = print_insn_big_mips;
308 6af0bf9c bellard
#elif defined(__MIPSEL__)
309 6af0bf9c bellard
    print_insn = print_insn_little_mips;
310 48024e4a bellard
#elif defined(__m68k__)
311 48024e4a bellard
    print_insn = print_insn_m68k;
312 8f860bb8 ths
#elif defined(__s390__)
313 8f860bb8 ths
    print_insn = print_insn_s390;
314 f54b3f92 aurel32
#elif defined(__hppa__)
315 f54b3f92 aurel32
    print_insn = print_insn_hppa;
316 903ec55c Aurelien Jarno
#elif defined(__ia64__)
317 903ec55c Aurelien Jarno
    print_insn = print_insn_ia64;
318 b9adb4a6 bellard
#else
319 b8076a74 bellard
    fprintf(out, "0x%lx: Asm output not supported on this arch\n",
320 b8076a74 bellard
            (long) code);
321 c27004ec bellard
    return;
322 b9adb4a6 bellard
#endif
323 b0b0f1c9 Stefan Weil
    for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
324 b0b0f1c9 Stefan Weil
        fprintf(out, "0x%08" PRIxPTR ":  ", pc);
325 c27004ec bellard
        count = print_insn(pc, &disasm_info);
326 b9adb4a6 bellard
        fprintf(out, "\n");
327 b9adb4a6 bellard
        if (count < 0)
328 b9adb4a6 bellard
            break;
329 b9adb4a6 bellard
    }
330 b9adb4a6 bellard
}
331 b9adb4a6 bellard
332 b9adb4a6 bellard
/* Look up symbol for debugging purpose.  Returns "" if unknown. */
333 c27004ec bellard
const char *lookup_symbol(target_ulong orig_addr)
334 b9adb4a6 bellard
{
335 49918a75 pbrook
    const char *symbol = "";
336 e80cfcfc bellard
    struct syminfo *s;
337 3b46e624 ths
338 e80cfcfc bellard
    for (s = syminfos; s; s = s->next) {
339 49918a75 pbrook
        symbol = s->lookup_symbol(s, orig_addr);
340 49918a75 pbrook
        if (symbol[0] != '\0') {
341 49918a75 pbrook
            break;
342 49918a75 pbrook
        }
343 b9adb4a6 bellard
    }
344 49918a75 pbrook
345 49918a75 pbrook
    return symbol;
346 b9adb4a6 bellard
}
347 9307c4c1 bellard
348 9307c4c1 bellard
#if !defined(CONFIG_USER_ONLY)
349 9307c4c1 bellard
350 376253ec aliguori
#include "monitor.h"
351 3d2cfdf1 bellard
352 9307c4c1 bellard
static int monitor_disas_is_physical;
353 9349b4f9 Andreas Färber
static CPUArchState *monitor_disas_env;
354 9307c4c1 bellard
355 9307c4c1 bellard
static int
356 a5f1b965 blueswir1
monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
357 a5f1b965 blueswir1
                     struct disassemble_info *info)
358 9307c4c1 bellard
{
359 9307c4c1 bellard
    if (monitor_disas_is_physical) {
360 54f7b4a3 Stefan Weil
        cpu_physical_memory_read(memaddr, myaddr, length);
361 9307c4c1 bellard
    } else {
362 6a00d601 bellard
        cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
363 9307c4c1 bellard
    }
364 9307c4c1 bellard
    return 0;
365 9307c4c1 bellard
}
366 9307c4c1 bellard
367 8b7968f7 Stefan Weil
static int GCC_FMT_ATTR(2, 3)
368 8b7968f7 Stefan Weil
monitor_fprintf(FILE *stream, const char *fmt, ...)
369 3d2cfdf1 bellard
{
370 3d2cfdf1 bellard
    va_list ap;
371 3d2cfdf1 bellard
    va_start(ap, fmt);
372 376253ec aliguori
    monitor_vprintf((Monitor *)stream, fmt, ap);
373 3d2cfdf1 bellard
    va_end(ap);
374 3d2cfdf1 bellard
    return 0;
375 3d2cfdf1 bellard
}
376 3d2cfdf1 bellard
377 9349b4f9 Andreas Färber
void monitor_disas(Monitor *mon, CPUArchState *env,
378 6a00d601 bellard
                   target_ulong pc, int nb_insn, int is_physical, int flags)
379 9307c4c1 bellard
{
380 9307c4c1 bellard
    int count, i;
381 9307c4c1 bellard
    struct disassemble_info disasm_info;
382 9307c4c1 bellard
    int (*print_insn)(bfd_vma pc, disassemble_info *info);
383 9307c4c1 bellard
384 376253ec aliguori
    INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);
385 9307c4c1 bellard
386 6a00d601 bellard
    monitor_disas_env = env;
387 9307c4c1 bellard
    monitor_disas_is_physical = is_physical;
388 9307c4c1 bellard
    disasm_info.read_memory_func = monitor_read_memory;
389 9307c4c1 bellard
390 9307c4c1 bellard
    disasm_info.buffer_vma = pc;
391 9307c4c1 bellard
392 9307c4c1 bellard
#ifdef TARGET_WORDS_BIGENDIAN
393 9307c4c1 bellard
    disasm_info.endian = BFD_ENDIAN_BIG;
394 9307c4c1 bellard
#else
395 9307c4c1 bellard
    disasm_info.endian = BFD_ENDIAN_LITTLE;
396 9307c4c1 bellard
#endif
397 9307c4c1 bellard
#if defined(TARGET_I386)
398 fa15e030 bellard
    if (flags == 2)
399 fa15e030 bellard
        disasm_info.mach = bfd_mach_x86_64;
400 5fafdf24 ths
    else if (flags == 1)
401 9307c4c1 bellard
        disasm_info.mach = bfd_mach_i386_i8086;
402 fa15e030 bellard
    else
403 fa15e030 bellard
        disasm_info.mach = bfd_mach_i386_i386;
404 9307c4c1 bellard
    print_insn = print_insn_i386;
405 9307c4c1 bellard
#elif defined(TARGET_ARM)
406 9307c4c1 bellard
    print_insn = print_insn_arm;
407 cbd669da ths
#elif defined(TARGET_ALPHA)
408 cbd669da ths
    print_insn = print_insn_alpha;
409 9307c4c1 bellard
#elif defined(TARGET_SPARC)
410 9307c4c1 bellard
    print_insn = print_insn_sparc;
411 682c4f15 blueswir1
#ifdef TARGET_SPARC64
412 682c4f15 blueswir1
    disasm_info.mach = bfd_mach_sparc_v9b;
413 682c4f15 blueswir1
#endif
414 9307c4c1 bellard
#elif defined(TARGET_PPC)
415 a2458627 bellard
#ifdef TARGET_PPC64
416 a2458627 bellard
    disasm_info.mach = bfd_mach_ppc64;
417 a2458627 bellard
#else
418 a2458627 bellard
    disasm_info.mach = bfd_mach_ppc;
419 a2458627 bellard
#endif
420 9307c4c1 bellard
    print_insn = print_insn_ppc;
421 e6e5906b pbrook
#elif defined(TARGET_M68K)
422 e6e5906b pbrook
    print_insn = print_insn_m68k;
423 6af0bf9c bellard
#elif defined(TARGET_MIPS)
424 76b3030c bellard
#ifdef TARGET_WORDS_BIGENDIAN
425 6af0bf9c bellard
    print_insn = print_insn_big_mips;
426 76b3030c bellard
#else
427 76b3030c bellard
    print_insn = print_insn_little_mips;
428 76b3030c bellard
#endif
429 b4e1f077 Magnus Damm
#elif defined(TARGET_SH4)
430 b4e1f077 Magnus Damm
    disasm_info.mach = bfd_mach_sh4;
431 b4e1f077 Magnus Damm
    print_insn = print_insn_sh;
432 db500609 Ulrich Hecht
#elif defined(TARGET_S390X)
433 db500609 Ulrich Hecht
    disasm_info.mach = bfd_mach_s390_64;
434 db500609 Ulrich Hecht
    print_insn = print_insn_s390;
435 79368f49 Michael Walle
#elif defined(TARGET_LM32)
436 79368f49 Michael Walle
    disasm_info.mach = bfd_mach_lm32;
437 79368f49 Michael Walle
    print_insn = print_insn_lm32;
438 9307c4c1 bellard
#else
439 376253ec aliguori
    monitor_printf(mon, "0x" TARGET_FMT_lx
440 376253ec aliguori
                   ": Asm output not supported on this arch\n", pc);
441 9307c4c1 bellard
    return;
442 9307c4c1 bellard
#endif
443 9307c4c1 bellard
444 9307c4c1 bellard
    for(i = 0; i < nb_insn; i++) {
445 376253ec aliguori
        monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
446 9307c4c1 bellard
        count = print_insn(pc, &disasm_info);
447 376253ec aliguori
        monitor_printf(mon, "\n");
448 9307c4c1 bellard
        if (count < 0)
449 9307c4c1 bellard
            break;
450 9307c4c1 bellard
        pc += count;
451 9307c4c1 bellard
    }
452 9307c4c1 bellard
}
453 9307c4c1 bellard
#endif