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/*
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 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions are met:
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 *     * Redistributions of source code must retain the above copyright
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 *       notice, this list of conditions and the following disclaimer.
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 *     * Redistributions in binary form must reproduce the above copyright
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 *       notice, this list of conditions and the following disclaimer in the
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 *       documentation and/or other materials provided with the distribution.
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 *     * Neither the name of the Open Source and Linux Lab nor the
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 *       names of its contributors may be used to endorse or promote products
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 *       derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#include "sysemu.h"
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#include "boards.h"
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#include "loader.h"
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#include "elf.h"
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#include "memory.h"
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#include "exec-memory.h"
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#include "pc.h"
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#include "sysbus.h"
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#include "flash.h"
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#include "xtensa_bootparam.h"
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typedef struct LxBoardDesc {
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    size_t flash_size;
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    size_t flash_sector_size;
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    size_t sram_size;
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} LxBoardDesc;
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typedef struct Lx60FpgaState {
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    MemoryRegion iomem;
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    uint32_t leds;
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    uint32_t switches;
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} Lx60FpgaState;
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static void lx60_fpga_reset(void *opaque)
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{
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    Lx60FpgaState *s = opaque;
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    s->leds = 0;
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    s->switches = 0;
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}
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static uint64_t lx60_fpga_read(void *opaque, target_phys_addr_t addr,
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        unsigned size)
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{
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    Lx60FpgaState *s = opaque;
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    switch (addr) {
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    case 0x0: /*build date code*/
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        return 0x09272011;
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    case 0x4: /*processor clock frequency, Hz*/
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        return 10000000;
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    case 0x8: /*LEDs (off = 0, on = 1)*/
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        return s->leds;
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    case 0xc: /*DIP switches (off = 0, on = 1)*/
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        return s->switches;
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    }
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    return 0;
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}
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static void lx60_fpga_write(void *opaque, target_phys_addr_t addr,
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        uint64_t val, unsigned size)
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{
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    Lx60FpgaState *s = opaque;
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    switch (addr) {
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    case 0x8: /*LEDs (off = 0, on = 1)*/
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        s->leds = val;
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        break;
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    case 0x10: /*board reset*/
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        if (val == 0xdead) {
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            qemu_system_reset_request();
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        }
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        break;
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    }
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}
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static const MemoryRegionOps lx60_fpga_ops = {
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    .read = lx60_fpga_read,
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    .write = lx60_fpga_write,
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    .endianness = DEVICE_NATIVE_ENDIAN,
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};
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static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space,
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        target_phys_addr_t base)
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{
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    Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState));
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    memory_region_init_io(&s->iomem, &lx60_fpga_ops, s,
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            "lx60.fpga", 0x10000);
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    memory_region_add_subregion(address_space, base, &s->iomem);
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    lx60_fpga_reset(s);
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    qemu_register_reset(lx60_fpga_reset, s);
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    return s;
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}
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static void lx60_net_init(MemoryRegion *address_space,
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        target_phys_addr_t base,
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        target_phys_addr_t descriptors,
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        target_phys_addr_t buffers,
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        qemu_irq irq, NICInfo *nd)
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{
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    DeviceState *dev;
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    SysBusDevice *s;
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    MemoryRegion *ram;
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    dev = qdev_create(NULL, "open_eth");
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    qdev_set_nic_properties(dev, nd);
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    qdev_init_nofail(dev);
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    s = sysbus_from_qdev(dev);
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    sysbus_connect_irq(s, 0, irq);
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    memory_region_add_subregion(address_space, base,
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            sysbus_mmio_get_region(s, 0));
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    memory_region_add_subregion(address_space, descriptors,
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            sysbus_mmio_get_region(s, 1));
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    ram = g_malloc(sizeof(*ram));
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    memory_region_init_ram(ram, "open_eth.ram", 16384);
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    vmstate_register_ram_global(ram);
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    memory_region_add_subregion(address_space, buffers, ram);
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}
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static uint64_t translate_phys_addr(void *env, uint64_t addr)
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{
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    return cpu_get_phys_page_debug(env, addr);
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}
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static void lx60_reset(void *opaque)
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{
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    CPUXtensaState *env = opaque;
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    cpu_state_reset(env);
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}
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static void lx_init(const LxBoardDesc *board,
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        ram_addr_t ram_size, const char *boot_device,
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        const char *kernel_filename, const char *kernel_cmdline,
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        const char *initrd_filename, const char *cpu_model)
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{
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#ifdef TARGET_WORDS_BIGENDIAN
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    int be = 1;
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#else
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    int be = 0;
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#endif
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    MemoryRegion *system_memory = get_system_memory();
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    CPUXtensaState *env = NULL;
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    MemoryRegion *ram, *rom, *system_io;
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    DriveInfo *dinfo;
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    pflash_t *flash = NULL;
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    int n;
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    if (!cpu_model) {
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        cpu_model = "dc232b";
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    }
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    for (n = 0; n < smp_cpus; n++) {
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        env = cpu_init(cpu_model);
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        if (!env) {
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            fprintf(stderr, "Unable to find CPU definition\n");
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            exit(1);
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        }
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        env->sregs[PRID] = n;
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        qemu_register_reset(lx60_reset, env);
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        /* Need MMU initialized prior to ELF loading,
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         * so that ELF gets loaded into virtual addresses
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         */
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        cpu_state_reset(env);
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    }
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    ram = g_malloc(sizeof(*ram));
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    memory_region_init_ram(ram, "lx60.dram", ram_size);
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    vmstate_register_ram_global(ram);
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    memory_region_add_subregion(system_memory, 0, ram);
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    system_io = g_malloc(sizeof(*system_io));
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    memory_region_init(system_io, "lx60.io", 224 * 1024 * 1024);
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    memory_region_add_subregion(system_memory, 0xf0000000, system_io);
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    lx60_fpga_init(system_io, 0x0d020000);
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    if (nd_table[0].vlan) {
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        lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,
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                xtensa_get_extint(env, 1), nd_table);
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    }
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    if (!serial_hds[0]) {
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        serial_hds[0] = qemu_chr_new("serial0", "null", NULL);
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    }
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    serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),
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            115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);
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    dinfo = drive_get(IF_PFLASH, 0, 0);
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    if (dinfo) {
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        flash = pflash_cfi01_register(0xf8000000,
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                NULL, "lx60.io.flash", board->flash_size,
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                dinfo->bdrv, board->flash_sector_size,
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                board->flash_size / board->flash_sector_size,
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                4, 0x0000, 0x0000, 0x0000, 0x0000, be);
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        if (flash == NULL) {
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            fprintf(stderr, "Unable to mount pflash\n");
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            exit(1);
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        }
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    }
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    /* Use presence of kernel file name as 'boot from SRAM' switch. */
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    if (kernel_filename) {
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        rom = g_malloc(sizeof(*rom));
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        memory_region_init_ram(rom, "lx60.sram", board->sram_size);
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        vmstate_register_ram_global(rom);
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        memory_region_add_subregion(system_memory, 0xfe000000, rom);
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        /* Put kernel bootparameters to the end of that SRAM */
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        if (kernel_cmdline) {
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            size_t cmdline_size = strlen(kernel_cmdline) + 1;
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            size_t bp_size = sizeof(BpTag[4]) + cmdline_size;
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            uint32_t tagptr = (0xfe000000 + board->sram_size - bp_size) & ~0xff;
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            env->regs[2] = tagptr;
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            tagptr = put_tag(tagptr, 0x7b0b, 0, NULL);
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            if (cmdline_size > 1) {
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                tagptr = put_tag(tagptr, 0x1001,
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                        cmdline_size, kernel_cmdline);
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            }
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            tagptr = put_tag(tagptr, 0x7e0b, 0, NULL);
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        }
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        uint64_t elf_entry;
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        uint64_t elf_lowaddr;
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        int success = load_elf(kernel_filename, translate_phys_addr, env,
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                &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0);
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        if (success > 0) {
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            env->pc = elf_entry;
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        }
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    } else {
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        if (flash) {
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            MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);
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            MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));
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            memory_region_init_alias(flash_io, "lx60.flash",
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                    flash_mr, 0, board->flash_size);
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            memory_region_add_subregion(system_memory, 0xfe000000,
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                    flash_io);
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        }
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    }
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}
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static void xtensa_lx60_init(ram_addr_t ram_size,
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                     const char *boot_device,
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                     const char *kernel_filename, const char *kernel_cmdline,
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                     const char *initrd_filename, const char *cpu_model)
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{
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    static const LxBoardDesc lx60_board = {
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        .flash_size = 0x400000,
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        .flash_sector_size = 0x10000,
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        .sram_size = 0x20000,
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    };
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    lx_init(&lx60_board, ram_size, boot_device,
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            kernel_filename, kernel_cmdline,
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            initrd_filename, cpu_model);
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}
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static void xtensa_lx200_init(ram_addr_t ram_size,
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                     const char *boot_device,
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                     const char *kernel_filename, const char *kernel_cmdline,
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                     const char *initrd_filename, const char *cpu_model)
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{
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    static const LxBoardDesc lx200_board = {
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        .flash_size = 0x1000000,
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        .flash_sector_size = 0x20000,
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        .sram_size = 0x2000000,
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    };
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    lx_init(&lx200_board, ram_size, boot_device,
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            kernel_filename, kernel_cmdline,
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            initrd_filename, cpu_model);
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}
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static QEMUMachine xtensa_lx60_machine = {
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    .name = "lx60",
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    .desc = "lx60 EVB (dc232b)",
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    .init = xtensa_lx60_init,
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    .max_cpus = 4,
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};
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static QEMUMachine xtensa_lx200_machine = {
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    .name = "lx200",
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    .desc = "lx200 EVB (dc232b)",
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    .init = xtensa_lx200_init,
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    .max_cpus = 4,
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};
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static void xtensa_lx_machines_init(void)
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{
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    qemu_register_machine(&xtensa_lx60_machine);
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    qemu_register_machine(&xtensa_lx200_machine);
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}
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machine_init(xtensa_lx_machines_init);