Revision 82e14b02 target-arm/translate-a64.c

b/target-arm/translate-a64.c
1062 1062
    }
1063 1063
}
1064 1064

  
1065
static void handle_rbit(DisasContext *s, unsigned int sf,
1066
                        unsigned int rn, unsigned int rd)
1067
{
1068
    TCGv_i64 tcg_rd, tcg_rn;
1069
    tcg_rd = cpu_reg(s, rd);
1070
    tcg_rn = cpu_reg(s, rn);
1071

  
1072
    if (sf) {
1073
        gen_helper_rbit64(tcg_rd, tcg_rn);
1074
    } else {
1075
        TCGv_i32 tcg_tmp32 = tcg_temp_new_i32();
1076
        tcg_gen_trunc_i64_i32(tcg_tmp32, tcg_rn);
1077
        gen_helper_rbit(tcg_tmp32, tcg_tmp32);
1078
        tcg_gen_extu_i32_i64(tcg_rd, tcg_tmp32);
1079
        tcg_temp_free_i32(tcg_tmp32);
1080
    }
1081
}
1082

  
1065 1083
/* C3.5.7 Data-processing (1 source)
1066 1084
 *   31  30  29  28             21 20     16 15    10 9    5 4    0
1067 1085
 * +----+---+---+-----------------+---------+--------+------+------+
......
1084 1102

  
1085 1103
    switch (opcode) {
1086 1104
    case 0: /* RBIT */
1105
        handle_rbit(s, sf, rn, rd);
1106
        break;
1087 1107
    case 1: /* REV16 */
1088 1108
    case 2: /* REV32 */
1089 1109
    case 3: /* REV64 */

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