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/*
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 *  QEMU model of the Milkymist VGA framebuffer.
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 *
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 *  Copyright (c) 2010-2012 Michael Walle <michael@walle.cc>
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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 *
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 *
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 * Specification available at:
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 *   http://www.milkymist.org/socdoc/vgafb.pdf
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 */
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#include "hw.h"
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#include "sysbus.h"
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#include "trace.h"
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#include "console.h"
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#include "framebuffer.h"
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#include "pixel_ops.h"
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#include "qemu-error.h"
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#define BITS 8
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#include "milkymist-vgafb_template.h"
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#define BITS 15
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#include "milkymist-vgafb_template.h"
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#define BITS 16
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#include "milkymist-vgafb_template.h"
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#define BITS 24
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#include "milkymist-vgafb_template.h"
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#define BITS 32
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#include "milkymist-vgafb_template.h"
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enum {
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    R_CTRL = 0,
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    R_HRES,
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    R_HSYNC_START,
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    R_HSYNC_END,
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    R_HSCAN,
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    R_VRES,
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    R_VSYNC_START,
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    R_VSYNC_END,
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    R_VSCAN,
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    R_BASEADDRESS,
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    R_BASEADDRESS_ACT,
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    R_BURST_COUNT,
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    R_DDC,
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    R_SOURCE_CLOCK,
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    R_MAX
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};
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enum {
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    CTRL_RESET = (1<<0),
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};
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struct MilkymistVgafbState {
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    SysBusDevice busdev;
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    MemoryRegion regs_region;
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    DisplayState *ds;
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    int invalidate;
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    uint32_t fb_offset;
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    uint32_t fb_mask;
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    uint32_t regs[R_MAX];
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};
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typedef struct MilkymistVgafbState MilkymistVgafbState;
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static int vgafb_enabled(MilkymistVgafbState *s)
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{
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    return !(s->regs[R_CTRL] & CTRL_RESET);
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}
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static void vgafb_update_display(void *opaque)
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{
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    MilkymistVgafbState *s = opaque;
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    int first = 0;
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    int last = 0;
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    drawfn fn;
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    if (!vgafb_enabled(s)) {
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        return;
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    }
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    int dest_width = s->regs[R_HRES];
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    switch (ds_get_bits_per_pixel(s->ds)) {
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    case 0:
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        return;
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    case 8:
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        fn = draw_line_8;
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        break;
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    case 15:
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        fn = draw_line_15;
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        dest_width *= 2;
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        break;
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    case 16:
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        fn = draw_line_16;
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        dest_width *= 2;
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        break;
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    case 24:
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        fn = draw_line_24;
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        dest_width *= 3;
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        break;
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    case 32:
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        fn = draw_line_32;
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        dest_width *= 4;
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        break;
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    default:
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        hw_error("milkymist_vgafb: bad color depth\n");
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        break;
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    }
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    framebuffer_update_display(s->ds, sysbus_address_space(&s->busdev),
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                               s->regs[R_BASEADDRESS] + s->fb_offset,
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                               s->regs[R_HRES],
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                               s->regs[R_VRES],
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                               s->regs[R_HRES] * 2,
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                               dest_width,
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                               0,
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                               s->invalidate,
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                               fn,
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                               NULL,
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                               &first, &last);
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    if (first >= 0) {
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        dpy_update(s->ds, 0, first, s->regs[R_HRES], last - first + 1);
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    }
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    s->invalidate = 0;
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}
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static void vgafb_invalidate_display(void *opaque)
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{
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    MilkymistVgafbState *s = opaque;
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    s->invalidate = 1;
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}
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static void vgafb_resize(MilkymistVgafbState *s)
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{
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    if (!vgafb_enabled(s)) {
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        return;
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    }
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    qemu_console_resize(s->ds, s->regs[R_HRES], s->regs[R_VRES]);
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    s->invalidate = 1;
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}
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static uint64_t vgafb_read(void *opaque, target_phys_addr_t addr,
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                           unsigned size)
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{
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    MilkymistVgafbState *s = opaque;
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    uint32_t r = 0;
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    addr >>= 2;
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    switch (addr) {
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    case R_CTRL:
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    case R_HRES:
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    case R_HSYNC_START:
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    case R_HSYNC_END:
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    case R_HSCAN:
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    case R_VRES:
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    case R_VSYNC_START:
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    case R_VSYNC_END:
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    case R_VSCAN:
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    case R_BASEADDRESS:
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    case R_BURST_COUNT:
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    case R_DDC:
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    case R_SOURCE_CLOCK:
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        r = s->regs[addr];
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    break;
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    case R_BASEADDRESS_ACT:
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        r = s->regs[R_BASEADDRESS];
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    break;
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    default:
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        error_report("milkymist_vgafb: read access to unknown register 0x"
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                TARGET_FMT_plx, addr << 2);
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        break;
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    }
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    trace_milkymist_vgafb_memory_read(addr << 2, r);
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    return r;
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}
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static void vgafb_write(void *opaque, target_phys_addr_t addr, uint64_t value,
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                        unsigned size)
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{
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    MilkymistVgafbState *s = opaque;
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    trace_milkymist_vgafb_memory_write(addr, value);
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    addr >>= 2;
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    switch (addr) {
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    case R_CTRL:
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        s->regs[addr] = value;
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        vgafb_resize(s);
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        break;
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    case R_HSYNC_START:
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    case R_HSYNC_END:
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    case R_HSCAN:
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    case R_VSYNC_START:
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    case R_VSYNC_END:
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    case R_VSCAN:
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    case R_BURST_COUNT:
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    case R_DDC:
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    case R_SOURCE_CLOCK:
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        s->regs[addr] = value;
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        break;
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    case R_BASEADDRESS:
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        if (value & 0x1f) {
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            error_report("milkymist_vgafb: framebuffer base address have to "
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                     "be 32 byte aligned");
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            break;
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        }
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        s->regs[addr] = value & s->fb_mask;
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        s->invalidate = 1;
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        break;
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    case R_HRES:
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    case R_VRES:
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        s->regs[addr] = value;
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        vgafb_resize(s);
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        break;
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    case R_BASEADDRESS_ACT:
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        error_report("milkymist_vgafb: write to read-only register 0x"
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                TARGET_FMT_plx, addr << 2);
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        break;
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    default:
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        error_report("milkymist_vgafb: write access to unknown register 0x"
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                TARGET_FMT_plx, addr << 2);
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        break;
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    }
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}
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static const MemoryRegionOps vgafb_mmio_ops = {
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    .read = vgafb_read,
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    .write = vgafb_write,
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    .valid = {
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        .min_access_size = 4,
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        .max_access_size = 4,
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    },
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    .endianness = DEVICE_NATIVE_ENDIAN,
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};
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static void milkymist_vgafb_reset(DeviceState *d)
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{
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    MilkymistVgafbState *s = container_of(d, MilkymistVgafbState, busdev.qdev);
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    int i;
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    for (i = 0; i < R_MAX; i++) {
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        s->regs[i] = 0;
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    }
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    /* defaults */
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    s->regs[R_CTRL] = CTRL_RESET;
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    s->regs[R_HRES] = 640;
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    s->regs[R_VRES] = 480;
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    s->regs[R_BASEADDRESS] = 0;
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}
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static int milkymist_vgafb_init(SysBusDevice *dev)
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{
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    MilkymistVgafbState *s = FROM_SYSBUS(typeof(*s), dev);
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    memory_region_init_io(&s->regs_region, &vgafb_mmio_ops, s,
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            "milkymist-vgafb", R_MAX * 4);
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    sysbus_init_mmio(dev, &s->regs_region);
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    s->ds = graphic_console_init(vgafb_update_display,
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                                 vgafb_invalidate_display,
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                                 NULL, NULL, s);
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    return 0;
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}
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static int vgafb_post_load(void *opaque, int version_id)
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{
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    vgafb_invalidate_display(opaque);
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    return 0;
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}
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static const VMStateDescription vmstate_milkymist_vgafb = {
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    .name = "milkymist-vgafb",
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    .version_id = 1,
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    .minimum_version_id = 1,
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    .minimum_version_id_old = 1,
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    .post_load = vgafb_post_load,
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    .fields      = (VMStateField[]) {
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        VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX),
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        VMSTATE_END_OF_LIST()
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    }
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};
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static Property milkymist_vgafb_properties[] = {
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    DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
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    DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
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    DEFINE_PROP_END_OF_LIST(),
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};
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static void milkymist_vgafb_class_init(ObjectClass *klass, void *data)
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{
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    DeviceClass *dc = DEVICE_CLASS(klass);
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    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
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    k->init = milkymist_vgafb_init;
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    dc->reset = milkymist_vgafb_reset;
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    dc->vmsd = &vmstate_milkymist_vgafb;
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    dc->props = milkymist_vgafb_properties;
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}
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static TypeInfo milkymist_vgafb_info = {
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    .name          = "milkymist-vgafb",
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    .parent        = TYPE_SYS_BUS_DEVICE,
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    .instance_size = sizeof(MilkymistVgafbState),
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    .class_init    = milkymist_vgafb_class_init,
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};
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static void milkymist_vgafb_register_types(void)
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{
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    type_register_static(&milkymist_vgafb_info);
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}
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type_init(milkymist_vgafb_register_types)