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1 | b00052e4 | balrog | /*
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2 | b00052e4 | balrog | * PXA270-based Clamshell PDA platforms.
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3 | b00052e4 | balrog | *
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4 | b00052e4 | balrog | * Copyright (c) 2006 Openedhand Ltd.
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5 | b00052e4 | balrog | * Written by Andrzej Zaborowski <balrog@zabor.org>
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6 | b00052e4 | balrog | *
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7 | b00052e4 | balrog | * This code is licensed under the GNU GPL v2.
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8 | b00052e4 | balrog | */
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9 | b00052e4 | balrog | |
10 | 87ecb68b | pbrook | #include "hw.h" |
11 | 87ecb68b | pbrook | #include "pxa.h" |
12 | 87ecb68b | pbrook | #include "arm-misc.h" |
13 | 87ecb68b | pbrook | #include "sysemu.h" |
14 | 87ecb68b | pbrook | #include "pcmcia.h" |
15 | 87ecb68b | pbrook | #include "i2c.h" |
16 | a984a69e | Paul Brook | #include "ssi.h" |
17 | 87ecb68b | pbrook | #include "flash.h" |
18 | 87ecb68b | pbrook | #include "qemu-timer.h" |
19 | 87ecb68b | pbrook | #include "devices.h" |
20 | e33d8cdb | balrog | #include "sharpsl.h" |
21 | 87ecb68b | pbrook | #include "console.h" |
22 | 87ecb68b | pbrook | #include "block.h" |
23 | 87ecb68b | pbrook | #include "audio/audio.h" |
24 | 87ecb68b | pbrook | #include "boards.h" |
25 | b00052e4 | balrog | |
26 | b00052e4 | balrog | #undef REG_FMT
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27 | 444ce241 | bellard | #if TARGET_PHYS_ADDR_BITS == 32 |
28 | 444ce241 | bellard | #define REG_FMT "0x%02x" |
29 | 444ce241 | bellard | #else
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30 | b00052e4 | balrog | #define REG_FMT "0x%02lx" |
31 | 444ce241 | bellard | #endif
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32 | b00052e4 | balrog | |
33 | b00052e4 | balrog | /* Spitz Flash */
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34 | b00052e4 | balrog | #define FLASH_BASE 0x0c000000 |
35 | b00052e4 | balrog | #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ |
36 | b00052e4 | balrog | #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ |
37 | b00052e4 | balrog | #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ |
38 | b00052e4 | balrog | #define FLASH_ECCCNTR 0x0c /* ECC byte counter */ |
39 | b00052e4 | balrog | #define FLASH_ECCCLRR 0x10 /* Clear ECC */ |
40 | b00052e4 | balrog | #define FLASH_FLASHIO 0x14 /* Flash I/O */ |
41 | b00052e4 | balrog | #define FLASH_FLASHCTL 0x18 /* Flash Control */ |
42 | b00052e4 | balrog | |
43 | b00052e4 | balrog | #define FLASHCTL_CE0 (1 << 0) |
44 | b00052e4 | balrog | #define FLASHCTL_CLE (1 << 1) |
45 | b00052e4 | balrog | #define FLASHCTL_ALE (1 << 2) |
46 | b00052e4 | balrog | #define FLASHCTL_WP (1 << 3) |
47 | b00052e4 | balrog | #define FLASHCTL_CE1 (1 << 4) |
48 | b00052e4 | balrog | #define FLASHCTL_RYBY (1 << 5) |
49 | b00052e4 | balrog | #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
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50 | b00052e4 | balrog | |
51 | bc24a225 | Paul Brook | typedef struct { |
52 | bc24a225 | Paul Brook | NANDFlashState *nand; |
53 | b00052e4 | balrog | uint8_t ctl; |
54 | bc24a225 | Paul Brook | ECCState ecc; |
55 | bc24a225 | Paul Brook | } SLNANDState; |
56 | b00052e4 | balrog | |
57 | b00052e4 | balrog | static uint32_t sl_readb(void *opaque, target_phys_addr_t addr) |
58 | b00052e4 | balrog | { |
59 | bc24a225 | Paul Brook | SLNANDState *s = (SLNANDState *) opaque; |
60 | b00052e4 | balrog | int ryby;
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61 | b00052e4 | balrog | |
62 | b00052e4 | balrog | switch (addr) {
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63 | b00052e4 | balrog | #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) |
64 | b00052e4 | balrog | case FLASH_ECCLPLB:
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65 | b00052e4 | balrog | return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | |
66 | b00052e4 | balrog | BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); |
67 | b00052e4 | balrog | |
68 | b00052e4 | balrog | #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) |
69 | b00052e4 | balrog | case FLASH_ECCLPUB:
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70 | b00052e4 | balrog | return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | |
71 | b00052e4 | balrog | BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); |
72 | b00052e4 | balrog | |
73 | b00052e4 | balrog | case FLASH_ECCCP:
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74 | b00052e4 | balrog | return s->ecc.cp;
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75 | b00052e4 | balrog | |
76 | b00052e4 | balrog | case FLASH_ECCCNTR:
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77 | b00052e4 | balrog | return s->ecc.count & 0xff; |
78 | b00052e4 | balrog | |
79 | b00052e4 | balrog | case FLASH_FLASHCTL:
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80 | b00052e4 | balrog | nand_getpins(s->nand, &ryby); |
81 | b00052e4 | balrog | if (ryby)
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82 | b00052e4 | balrog | return s->ctl | FLASHCTL_RYBY;
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83 | b00052e4 | balrog | else
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84 | b00052e4 | balrog | return s->ctl;
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85 | b00052e4 | balrog | |
86 | b00052e4 | balrog | case FLASH_FLASHIO:
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87 | b00052e4 | balrog | return ecc_digest(&s->ecc, nand_getio(s->nand));
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88 | b00052e4 | balrog | |
89 | b00052e4 | balrog | default:
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90 | 89cdb6af | balrog | zaurus_printf("Bad register offset " REG_FMT "\n", addr); |
91 | b00052e4 | balrog | } |
92 | b00052e4 | balrog | return 0; |
93 | b00052e4 | balrog | } |
94 | b00052e4 | balrog | |
95 | a5236105 | balrog | static uint32_t sl_readl(void *opaque, target_phys_addr_t addr) |
96 | a5236105 | balrog | { |
97 | bc24a225 | Paul Brook | SLNANDState *s = (SLNANDState *) opaque; |
98 | a5236105 | balrog | |
99 | a5236105 | balrog | if (addr == FLASH_FLASHIO)
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100 | a5236105 | balrog | return ecc_digest(&s->ecc, nand_getio(s->nand)) |
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101 | a5236105 | balrog | (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
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102 | a5236105 | balrog | |
103 | a5236105 | balrog | return sl_readb(opaque, addr);
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104 | a5236105 | balrog | } |
105 | a5236105 | balrog | |
106 | b00052e4 | balrog | static void sl_writeb(void *opaque, target_phys_addr_t addr, |
107 | b00052e4 | balrog | uint32_t value) |
108 | b00052e4 | balrog | { |
109 | bc24a225 | Paul Brook | SLNANDState *s = (SLNANDState *) opaque; |
110 | b00052e4 | balrog | |
111 | b00052e4 | balrog | switch (addr) {
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112 | b00052e4 | balrog | case FLASH_ECCCLRR:
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113 | b00052e4 | balrog | /* Value is ignored. */
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114 | b00052e4 | balrog | ecc_reset(&s->ecc); |
115 | b00052e4 | balrog | break;
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116 | b00052e4 | balrog | |
117 | b00052e4 | balrog | case FLASH_FLASHCTL:
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118 | b00052e4 | balrog | s->ctl = value & 0xff & ~FLASHCTL_RYBY;
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119 | b00052e4 | balrog | nand_setpins(s->nand, |
120 | b00052e4 | balrog | s->ctl & FLASHCTL_CLE, |
121 | b00052e4 | balrog | s->ctl & FLASHCTL_ALE, |
122 | b00052e4 | balrog | s->ctl & FLASHCTL_NCE, |
123 | b00052e4 | balrog | s->ctl & FLASHCTL_WP, |
124 | b00052e4 | balrog | 0);
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125 | b00052e4 | balrog | break;
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126 | b00052e4 | balrog | |
127 | b00052e4 | balrog | case FLASH_FLASHIO:
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128 | b00052e4 | balrog | nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
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129 | b00052e4 | balrog | break;
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130 | b00052e4 | balrog | |
131 | b00052e4 | balrog | default:
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132 | 89cdb6af | balrog | zaurus_printf("Bad register offset " REG_FMT "\n", addr); |
133 | b00052e4 | balrog | } |
134 | b00052e4 | balrog | } |
135 | b00052e4 | balrog | |
136 | aa941b94 | balrog | static void sl_save(QEMUFile *f, void *opaque) |
137 | aa941b94 | balrog | { |
138 | bc24a225 | Paul Brook | SLNANDState *s = (SLNANDState *) opaque; |
139 | aa941b94 | balrog | |
140 | aa941b94 | balrog | qemu_put_8s(f, &s->ctl); |
141 | aa941b94 | balrog | ecc_put(f, &s->ecc); |
142 | aa941b94 | balrog | } |
143 | aa941b94 | balrog | |
144 | aa941b94 | balrog | static int sl_load(QEMUFile *f, void *opaque, int version_id) |
145 | aa941b94 | balrog | { |
146 | bc24a225 | Paul Brook | SLNANDState *s = (SLNANDState *) opaque; |
147 | aa941b94 | balrog | |
148 | aa941b94 | balrog | qemu_get_8s(f, &s->ctl); |
149 | aa941b94 | balrog | ecc_get(f, &s->ecc); |
150 | aa941b94 | balrog | |
151 | aa941b94 | balrog | return 0; |
152 | aa941b94 | balrog | } |
153 | aa941b94 | balrog | |
154 | b00052e4 | balrog | enum {
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155 | b00052e4 | balrog | FLASH_128M, |
156 | b00052e4 | balrog | FLASH_1024M, |
157 | b00052e4 | balrog | }; |
158 | b00052e4 | balrog | |
159 | bc24a225 | Paul Brook | static void sl_flash_register(PXA2xxState *cpu, int size) |
160 | b00052e4 | balrog | { |
161 | b00052e4 | balrog | int iomemtype;
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162 | bc24a225 | Paul Brook | SLNANDState *s; |
163 | b00052e4 | balrog | CPUReadMemoryFunc *sl_readfn[] = { |
164 | b00052e4 | balrog | sl_readb, |
165 | b00052e4 | balrog | sl_readb, |
166 | a5236105 | balrog | sl_readl, |
167 | b00052e4 | balrog | }; |
168 | b00052e4 | balrog | CPUWriteMemoryFunc *sl_writefn[] = { |
169 | b00052e4 | balrog | sl_writeb, |
170 | b00052e4 | balrog | sl_writeb, |
171 | b00052e4 | balrog | sl_writeb, |
172 | b00052e4 | balrog | }; |
173 | b00052e4 | balrog | |
174 | bc24a225 | Paul Brook | s = (SLNANDState *) qemu_mallocz(sizeof(SLNANDState));
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175 | b00052e4 | balrog | s->ctl = 0;
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176 | b00052e4 | balrog | if (size == FLASH_128M)
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177 | b00052e4 | balrog | s->nand = nand_init(NAND_MFR_SAMSUNG, 0x73);
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178 | b00052e4 | balrog | else if (size == FLASH_1024M) |
179 | b00052e4 | balrog | s->nand = nand_init(NAND_MFR_SAMSUNG, 0xf1);
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180 | b00052e4 | balrog | |
181 | b00052e4 | balrog | iomemtype = cpu_register_io_memory(0, sl_readfn,
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182 | b00052e4 | balrog | sl_writefn, s); |
183 | 8da3ff18 | pbrook | cpu_register_physical_memory(FLASH_BASE, 0x40, iomemtype);
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184 | aa941b94 | balrog | |
185 | aa941b94 | balrog | register_savevm("sl_flash", 0, 0, sl_save, sl_load, s); |
186 | b00052e4 | balrog | } |
187 | b00052e4 | balrog | |
188 | b00052e4 | balrog | /* Spitz Keyboard */
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189 | b00052e4 | balrog | |
190 | b00052e4 | balrog | #define SPITZ_KEY_STROBE_NUM 11 |
191 | b00052e4 | balrog | #define SPITZ_KEY_SENSE_NUM 7 |
192 | b00052e4 | balrog | |
193 | b00052e4 | balrog | static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { |
194 | b00052e4 | balrog | 12, 17, 91, 34, 36, 38, 39 |
195 | b00052e4 | balrog | }; |
196 | b00052e4 | balrog | |
197 | b00052e4 | balrog | static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { |
198 | b00052e4 | balrog | 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 |
199 | b00052e4 | balrog | }; |
200 | b00052e4 | balrog | |
201 | b00052e4 | balrog | /* Eighth additional row maps the special keys */
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202 | b00052e4 | balrog | static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { |
203 | b00052e4 | balrog | { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, |
204 | b00052e4 | balrog | { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, |
205 | b00052e4 | balrog | { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, |
206 | b00052e4 | balrog | { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, |
207 | b00052e4 | balrog | { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, |
208 | 2b76bdc9 | balrog | { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, |
209 | 2b76bdc9 | balrog | { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, |
210 | b00052e4 | balrog | { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, |
211 | b00052e4 | balrog | }; |
212 | b00052e4 | balrog | |
213 | b00052e4 | balrog | #define SPITZ_GPIO_AK_INT 13 /* Remote control */ |
214 | b00052e4 | balrog | #define SPITZ_GPIO_SYNC 16 /* Sync button */ |
215 | b00052e4 | balrog | #define SPITZ_GPIO_ON_KEY 95 /* Power button */ |
216 | b00052e4 | balrog | #define SPITZ_GPIO_SWA 97 /* Lid */ |
217 | b00052e4 | balrog | #define SPITZ_GPIO_SWB 96 /* Tablet mode */ |
218 | b00052e4 | balrog | |
219 | b00052e4 | balrog | /* The special buttons are mapped to unused keys */
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220 | b00052e4 | balrog | static const int spitz_gpiomap[5] = { |
221 | b00052e4 | balrog | SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, |
222 | b00052e4 | balrog | SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, |
223 | b00052e4 | balrog | }; |
224 | b00052e4 | balrog | static int spitz_gpio_invert[5] = { 0, 0, 0, 0, 0, }; |
225 | b00052e4 | balrog | |
226 | bc24a225 | Paul Brook | typedef struct { |
227 | 38641a52 | balrog | qemu_irq sense[SPITZ_KEY_SENSE_NUM]; |
228 | 38641a52 | balrog | qemu_irq *strobe; |
229 | 38641a52 | balrog | qemu_irq gpiomap[5];
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230 | b00052e4 | balrog | int keymap[0x80]; |
231 | b00052e4 | balrog | uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; |
232 | b00052e4 | balrog | uint16_t strobe_state; |
233 | b00052e4 | balrog | uint16_t sense_state; |
234 | b00052e4 | balrog | |
235 | b00052e4 | balrog | uint16_t pre_map[0x100];
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236 | b00052e4 | balrog | uint16_t modifiers; |
237 | b00052e4 | balrog | uint16_t imodifiers; |
238 | b00052e4 | balrog | uint8_t fifo[16];
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239 | b00052e4 | balrog | int fifopos, fifolen;
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240 | b00052e4 | balrog | QEMUTimer *kbdtimer; |
241 | bc24a225 | Paul Brook | } SpitzKeyboardState; |
242 | b00052e4 | balrog | |
243 | bc24a225 | Paul Brook | static void spitz_keyboard_sense_update(SpitzKeyboardState *s) |
244 | b00052e4 | balrog | { |
245 | b00052e4 | balrog | int i;
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246 | b00052e4 | balrog | uint16_t strobe, sense = 0;
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247 | b00052e4 | balrog | for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { |
248 | b00052e4 | balrog | strobe = s->keyrow[i] & s->strobe_state; |
249 | b00052e4 | balrog | if (strobe) {
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250 | b00052e4 | balrog | sense |= 1 << i;
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251 | b00052e4 | balrog | if (!(s->sense_state & (1 << i))) |
252 | 38641a52 | balrog | qemu_irq_raise(s->sense[i]); |
253 | b00052e4 | balrog | } else if (s->sense_state & (1 << i)) |
254 | 38641a52 | balrog | qemu_irq_lower(s->sense[i]); |
255 | b00052e4 | balrog | } |
256 | b00052e4 | balrog | |
257 | b00052e4 | balrog | s->sense_state = sense; |
258 | b00052e4 | balrog | } |
259 | b00052e4 | balrog | |
260 | 38641a52 | balrog | static void spitz_keyboard_strobe(void *opaque, int line, int level) |
261 | b00052e4 | balrog | { |
262 | bc24a225 | Paul Brook | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
263 | 38641a52 | balrog | |
264 | 38641a52 | balrog | if (level)
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265 | 38641a52 | balrog | s->strobe_state |= 1 << line;
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266 | 38641a52 | balrog | else
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267 | 38641a52 | balrog | s->strobe_state &= ~(1 << line);
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268 | 38641a52 | balrog | spitz_keyboard_sense_update(s); |
269 | b00052e4 | balrog | } |
270 | b00052e4 | balrog | |
271 | bc24a225 | Paul Brook | static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) |
272 | b00052e4 | balrog | { |
273 | b00052e4 | balrog | int spitz_keycode = s->keymap[keycode & 0x7f]; |
274 | b00052e4 | balrog | if (spitz_keycode == -1) |
275 | b00052e4 | balrog | return;
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276 | b00052e4 | balrog | |
277 | b00052e4 | balrog | /* Handle the additional keys */
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278 | b00052e4 | balrog | if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { |
279 | 38641a52 | balrog | qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80) ^ |
280 | b00052e4 | balrog | spitz_gpio_invert[spitz_keycode & 0xf]);
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281 | b00052e4 | balrog | return;
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282 | b00052e4 | balrog | } |
283 | b00052e4 | balrog | |
284 | b00052e4 | balrog | if (keycode & 0x80) |
285 | b00052e4 | balrog | s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); |
286 | b00052e4 | balrog | else
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287 | b00052e4 | balrog | s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); |
288 | b00052e4 | balrog | |
289 | b00052e4 | balrog | spitz_keyboard_sense_update(s); |
290 | b00052e4 | balrog | } |
291 | b00052e4 | balrog | |
292 | b00052e4 | balrog | #define SHIFT (1 << 7) |
293 | b00052e4 | balrog | #define CTRL (1 << 8) |
294 | b00052e4 | balrog | #define FN (1 << 9) |
295 | b00052e4 | balrog | |
296 | b00052e4 | balrog | #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c |
297 | b00052e4 | balrog | |
298 | bc24a225 | Paul Brook | static void spitz_keyboard_handler(SpitzKeyboardState *s, int keycode) |
299 | b00052e4 | balrog | { |
300 | b00052e4 | balrog | uint16_t code; |
301 | b00052e4 | balrog | int mapcode;
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302 | b00052e4 | balrog | switch (keycode) {
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303 | b00052e4 | balrog | case 0x2a: /* Left Shift */ |
304 | b00052e4 | balrog | s->modifiers |= 1;
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305 | b00052e4 | balrog | break;
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306 | b00052e4 | balrog | case 0xaa: |
307 | b00052e4 | balrog | s->modifiers &= ~1;
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308 | b00052e4 | balrog | break;
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309 | b00052e4 | balrog | case 0x36: /* Right Shift */ |
310 | b00052e4 | balrog | s->modifiers |= 2;
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311 | b00052e4 | balrog | break;
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312 | b00052e4 | balrog | case 0xb6: |
313 | b00052e4 | balrog | s->modifiers &= ~2;
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314 | b00052e4 | balrog | break;
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315 | b00052e4 | balrog | case 0x1d: /* Control */ |
316 | b00052e4 | balrog | s->modifiers |= 4;
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317 | b00052e4 | balrog | break;
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318 | b00052e4 | balrog | case 0x9d: |
319 | b00052e4 | balrog | s->modifiers &= ~4;
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320 | b00052e4 | balrog | break;
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321 | b00052e4 | balrog | case 0x38: /* Alt */ |
322 | b00052e4 | balrog | s->modifiers |= 8;
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323 | b00052e4 | balrog | break;
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324 | b00052e4 | balrog | case 0xb8: |
325 | b00052e4 | balrog | s->modifiers &= ~8;
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326 | b00052e4 | balrog | break;
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327 | b00052e4 | balrog | } |
328 | b00052e4 | balrog | |
329 | b00052e4 | balrog | code = s->pre_map[mapcode = ((s->modifiers & 3) ?
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330 | b00052e4 | balrog | (keycode | SHIFT) : |
331 | b00052e4 | balrog | (keycode & ~SHIFT))]; |
332 | b00052e4 | balrog | |
333 | b00052e4 | balrog | if (code != mapcode) {
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334 | b00052e4 | balrog | #if 0
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335 | b00052e4 | balrog | if ((code & SHIFT) && !(s->modifiers & 1))
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336 | b00052e4 | balrog | QUEUE_KEY(0x2a | (keycode & 0x80));
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337 | b00052e4 | balrog | if ((code & CTRL ) && !(s->modifiers & 4))
|
338 | b00052e4 | balrog | QUEUE_KEY(0x1d | (keycode & 0x80));
|
339 | b00052e4 | balrog | if ((code & FN ) && !(s->modifiers & 8))
|
340 | b00052e4 | balrog | QUEUE_KEY(0x38 | (keycode & 0x80));
|
341 | b00052e4 | balrog | if ((code & FN ) && (s->modifiers & 1))
|
342 | b00052e4 | balrog | QUEUE_KEY(0x2a | (~keycode & 0x80));
|
343 | b00052e4 | balrog | if ((code & FN ) && (s->modifiers & 2))
|
344 | b00052e4 | balrog | QUEUE_KEY(0x36 | (~keycode & 0x80));
|
345 | b00052e4 | balrog | #else
|
346 | b00052e4 | balrog | if (keycode & 0x80) { |
347 | b00052e4 | balrog | if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) |
348 | b00052e4 | balrog | QUEUE_KEY(0x2a | 0x80); |
349 | b00052e4 | balrog | if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) |
350 | b00052e4 | balrog | QUEUE_KEY(0x1d | 0x80); |
351 | b00052e4 | balrog | if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) |
352 | b00052e4 | balrog | QUEUE_KEY(0x38 | 0x80); |
353 | b00052e4 | balrog | if ((s->imodifiers & 0x10) && (s->modifiers & 1)) |
354 | b00052e4 | balrog | QUEUE_KEY(0x2a);
|
355 | b00052e4 | balrog | if ((s->imodifiers & 0x20) && (s->modifiers & 2)) |
356 | b00052e4 | balrog | QUEUE_KEY(0x36);
|
357 | b00052e4 | balrog | s->imodifiers = 0;
|
358 | b00052e4 | balrog | } else {
|
359 | b00052e4 | balrog | if ((code & SHIFT) && !((s->modifiers | s->imodifiers) & 1)) { |
360 | b00052e4 | balrog | QUEUE_KEY(0x2a);
|
361 | b00052e4 | balrog | s->imodifiers |= 1;
|
362 | b00052e4 | balrog | } |
363 | b00052e4 | balrog | if ((code & CTRL ) && !((s->modifiers | s->imodifiers) & 4)) { |
364 | b00052e4 | balrog | QUEUE_KEY(0x1d);
|
365 | b00052e4 | balrog | s->imodifiers |= 4;
|
366 | b00052e4 | balrog | } |
367 | b00052e4 | balrog | if ((code & FN ) && !((s->modifiers | s->imodifiers) & 8)) { |
368 | b00052e4 | balrog | QUEUE_KEY(0x38);
|
369 | b00052e4 | balrog | s->imodifiers |= 8;
|
370 | b00052e4 | balrog | } |
371 | b00052e4 | balrog | if ((code & FN ) && (s->modifiers & 1) && |
372 | b00052e4 | balrog | !(s->imodifiers & 0x10)) {
|
373 | b00052e4 | balrog | QUEUE_KEY(0x2a | 0x80); |
374 | b00052e4 | balrog | s->imodifiers |= 0x10;
|
375 | b00052e4 | balrog | } |
376 | b00052e4 | balrog | if ((code & FN ) && (s->modifiers & 2) && |
377 | b00052e4 | balrog | !(s->imodifiers & 0x20)) {
|
378 | b00052e4 | balrog | QUEUE_KEY(0x36 | 0x80); |
379 | b00052e4 | balrog | s->imodifiers |= 0x20;
|
380 | b00052e4 | balrog | } |
381 | b00052e4 | balrog | } |
382 | b00052e4 | balrog | #endif
|
383 | b00052e4 | balrog | } |
384 | b00052e4 | balrog | |
385 | b00052e4 | balrog | QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); |
386 | b00052e4 | balrog | } |
387 | b00052e4 | balrog | |
388 | b00052e4 | balrog | static void spitz_keyboard_tick(void *opaque) |
389 | b00052e4 | balrog | { |
390 | bc24a225 | Paul Brook | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
391 | b00052e4 | balrog | |
392 | b00052e4 | balrog | if (s->fifolen) {
|
393 | b00052e4 | balrog | spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); |
394 | b00052e4 | balrog | s->fifolen --; |
395 | b00052e4 | balrog | if (s->fifopos >= 16) |
396 | b00052e4 | balrog | s->fifopos = 0;
|
397 | b00052e4 | balrog | } |
398 | b00052e4 | balrog | |
399 | b00052e4 | balrog | qemu_mod_timer(s->kbdtimer, qemu_get_clock(vm_clock) + ticks_per_sec / 32);
|
400 | b00052e4 | balrog | } |
401 | b00052e4 | balrog | |
402 | bc24a225 | Paul Brook | static void spitz_keyboard_pre_map(SpitzKeyboardState *s) |
403 | b00052e4 | balrog | { |
404 | b00052e4 | balrog | int i;
|
405 | b00052e4 | balrog | for (i = 0; i < 0x100; i ++) |
406 | b00052e4 | balrog | s->pre_map[i] = i; |
407 | b00052e4 | balrog | s->pre_map[0x02 | SHIFT ] = 0x02 | SHIFT; /* exclam */ |
408 | b00052e4 | balrog | s->pre_map[0x28 | SHIFT ] = 0x03 | SHIFT; /* quotedbl */ |
409 | b00052e4 | balrog | s->pre_map[0x04 | SHIFT ] = 0x04 | SHIFT; /* numbersign */ |
410 | b00052e4 | balrog | s->pre_map[0x05 | SHIFT ] = 0x05 | SHIFT; /* dollar */ |
411 | b00052e4 | balrog | s->pre_map[0x06 | SHIFT ] = 0x06 | SHIFT; /* percent */ |
412 | b00052e4 | balrog | s->pre_map[0x08 | SHIFT ] = 0x07 | SHIFT; /* ampersand */ |
413 | b00052e4 | balrog | s->pre_map[0x28 ] = 0x08 | SHIFT; /* apostrophe */ |
414 | b00052e4 | balrog | s->pre_map[0x0a | SHIFT ] = 0x09 | SHIFT; /* parenleft */ |
415 | b00052e4 | balrog | s->pre_map[0x0b | SHIFT ] = 0x0a | SHIFT; /* parenright */ |
416 | b00052e4 | balrog | s->pre_map[0x29 | SHIFT ] = 0x0b | SHIFT; /* asciitilde */ |
417 | b00052e4 | balrog | s->pre_map[0x03 | SHIFT ] = 0x0c | SHIFT; /* at */ |
418 | b00052e4 | balrog | s->pre_map[0xd3 ] = 0x0e | FN; /* Delete */ |
419 | b00052e4 | balrog | s->pre_map[0x3a ] = 0x0f | FN; /* Caps_Lock */ |
420 | b00052e4 | balrog | s->pre_map[0x07 | SHIFT ] = 0x11 | FN; /* asciicircum */ |
421 | b00052e4 | balrog | s->pre_map[0x0d ] = 0x12 | FN; /* equal */ |
422 | b00052e4 | balrog | s->pre_map[0x0d | SHIFT ] = 0x13 | FN; /* plus */ |
423 | b00052e4 | balrog | s->pre_map[0x1a ] = 0x14 | FN; /* bracketleft */ |
424 | b00052e4 | balrog | s->pre_map[0x1b ] = 0x15 | FN; /* bracketright */ |
425 | 2b76bdc9 | balrog | s->pre_map[0x1a | SHIFT ] = 0x16 | FN; /* braceleft */ |
426 | 2b76bdc9 | balrog | s->pre_map[0x1b | SHIFT ] = 0x17 | FN; /* braceright */ |
427 | b00052e4 | balrog | s->pre_map[0x27 ] = 0x22 | FN; /* semicolon */ |
428 | b00052e4 | balrog | s->pre_map[0x27 | SHIFT ] = 0x23 | FN; /* colon */ |
429 | b00052e4 | balrog | s->pre_map[0x09 | SHIFT ] = 0x24 | FN; /* asterisk */ |
430 | b00052e4 | balrog | s->pre_map[0x2b ] = 0x25 | FN; /* backslash */ |
431 | b00052e4 | balrog | s->pre_map[0x2b | SHIFT ] = 0x26 | FN; /* bar */ |
432 | b00052e4 | balrog | s->pre_map[0x0c | SHIFT ] = 0x30 | FN; /* underscore */ |
433 | 2b76bdc9 | balrog | s->pre_map[0x33 | SHIFT ] = 0x33 | FN; /* less */ |
434 | b00052e4 | balrog | s->pre_map[0x35 ] = 0x33 | SHIFT; /* slash */ |
435 | 2b76bdc9 | balrog | s->pre_map[0x34 | SHIFT ] = 0x34 | FN; /* greater */ |
436 | b00052e4 | balrog | s->pre_map[0x35 | SHIFT ] = 0x34 | SHIFT; /* question */ |
437 | b00052e4 | balrog | s->pre_map[0x49 ] = 0x48 | FN; /* Page_Up */ |
438 | b00052e4 | balrog | s->pre_map[0x51 ] = 0x50 | FN; /* Page_Down */ |
439 | b00052e4 | balrog | |
440 | b00052e4 | balrog | s->modifiers = 0;
|
441 | b00052e4 | balrog | s->imodifiers = 0;
|
442 | b00052e4 | balrog | s->fifopos = 0;
|
443 | b00052e4 | balrog | s->fifolen = 0;
|
444 | b00052e4 | balrog | s->kbdtimer = qemu_new_timer(vm_clock, spitz_keyboard_tick, s); |
445 | b00052e4 | balrog | spitz_keyboard_tick(s); |
446 | b00052e4 | balrog | } |
447 | b00052e4 | balrog | |
448 | b00052e4 | balrog | #undef SHIFT
|
449 | b00052e4 | balrog | #undef CTRL
|
450 | b00052e4 | balrog | #undef FN
|
451 | b00052e4 | balrog | |
452 | aa941b94 | balrog | static void spitz_keyboard_save(QEMUFile *f, void *opaque) |
453 | aa941b94 | balrog | { |
454 | bc24a225 | Paul Brook | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
455 | aa941b94 | balrog | int i;
|
456 | aa941b94 | balrog | |
457 | aa941b94 | balrog | qemu_put_be16s(f, &s->sense_state); |
458 | aa941b94 | balrog | qemu_put_be16s(f, &s->strobe_state); |
459 | aa941b94 | balrog | for (i = 0; i < 5; i ++) |
460 | aa941b94 | balrog | qemu_put_byte(f, spitz_gpio_invert[i]); |
461 | aa941b94 | balrog | } |
462 | aa941b94 | balrog | |
463 | aa941b94 | balrog | static int spitz_keyboard_load(QEMUFile *f, void *opaque, int version_id) |
464 | aa941b94 | balrog | { |
465 | bc24a225 | Paul Brook | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
466 | aa941b94 | balrog | int i;
|
467 | aa941b94 | balrog | |
468 | aa941b94 | balrog | qemu_get_be16s(f, &s->sense_state); |
469 | aa941b94 | balrog | qemu_get_be16s(f, &s->strobe_state); |
470 | aa941b94 | balrog | for (i = 0; i < 5; i ++) |
471 | aa941b94 | balrog | spitz_gpio_invert[i] = qemu_get_byte(f); |
472 | aa941b94 | balrog | |
473 | aa941b94 | balrog | /* Release all pressed keys */
|
474 | aa941b94 | balrog | memset(s->keyrow, 0, sizeof(s->keyrow)); |
475 | aa941b94 | balrog | spitz_keyboard_sense_update(s); |
476 | aa941b94 | balrog | s->modifiers = 0;
|
477 | aa941b94 | balrog | s->imodifiers = 0;
|
478 | aa941b94 | balrog | s->fifopos = 0;
|
479 | aa941b94 | balrog | s->fifolen = 0;
|
480 | aa941b94 | balrog | |
481 | aa941b94 | balrog | return 0; |
482 | aa941b94 | balrog | } |
483 | aa941b94 | balrog | |
484 | bc24a225 | Paul Brook | static void spitz_keyboard_register(PXA2xxState *cpu) |
485 | b00052e4 | balrog | { |
486 | b00052e4 | balrog | int i, j;
|
487 | bc24a225 | Paul Brook | SpitzKeyboardState *s; |
488 | b00052e4 | balrog | |
489 | bc24a225 | Paul Brook | s = (SpitzKeyboardState *) |
490 | bc24a225 | Paul Brook | qemu_mallocz(sizeof(SpitzKeyboardState));
|
491 | bc24a225 | Paul Brook | memset(s, 0, sizeof(SpitzKeyboardState)); |
492 | b00052e4 | balrog | |
493 | b00052e4 | balrog | for (i = 0; i < 0x80; i ++) |
494 | b00052e4 | balrog | s->keymap[i] = -1;
|
495 | b00052e4 | balrog | for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) |
496 | b00052e4 | balrog | for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) |
497 | b00052e4 | balrog | if (spitz_keymap[i][j] != -1) |
498 | b00052e4 | balrog | s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
|
499 | b00052e4 | balrog | |
500 | 38641a52 | balrog | for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) |
501 | 38641a52 | balrog | s->sense[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpio_key_sense[i]]; |
502 | 38641a52 | balrog | |
503 | 38641a52 | balrog | for (i = 0; i < 5; i ++) |
504 | 38641a52 | balrog | s->gpiomap[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpiomap[i]]; |
505 | 38641a52 | balrog | |
506 | 38641a52 | balrog | s->strobe = qemu_allocate_irqs(spitz_keyboard_strobe, s, |
507 | 38641a52 | balrog | SPITZ_KEY_STROBE_NUM); |
508 | b00052e4 | balrog | for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) |
509 | 38641a52 | balrog | pxa2xx_gpio_out_set(cpu->gpio, spitz_gpio_key_strobe[i], s->strobe[i]); |
510 | b00052e4 | balrog | |
511 | b00052e4 | balrog | spitz_keyboard_pre_map(s); |
512 | b00052e4 | balrog | qemu_add_kbd_event_handler((QEMUPutKBDEvent *) spitz_keyboard_handler, s); |
513 | aa941b94 | balrog | |
514 | aa941b94 | balrog | register_savevm("spitz_keyboard", 0, 0, |
515 | aa941b94 | balrog | spitz_keyboard_save, spitz_keyboard_load, s); |
516 | b00052e4 | balrog | } |
517 | b00052e4 | balrog | |
518 | b00052e4 | balrog | /* LCD backlight controller */
|
519 | b00052e4 | balrog | |
520 | b00052e4 | balrog | #define LCDTG_RESCTL 0x00 |
521 | b00052e4 | balrog | #define LCDTG_PHACTRL 0x01 |
522 | b00052e4 | balrog | #define LCDTG_DUTYCTRL 0x02 |
523 | b00052e4 | balrog | #define LCDTG_POWERREG0 0x03 |
524 | b00052e4 | balrog | #define LCDTG_POWERREG1 0x04 |
525 | b00052e4 | balrog | #define LCDTG_GPOR3 0x05 |
526 | b00052e4 | balrog | #define LCDTG_PICTRL 0x06 |
527 | b00052e4 | balrog | #define LCDTG_POLCTRL 0x07 |
528 | b00052e4 | balrog | |
529 | a984a69e | Paul Brook | typedef struct { |
530 | a984a69e | Paul Brook | SSISlave ssidev; |
531 | a984a69e | Paul Brook | int bl_intensity;
|
532 | a984a69e | Paul Brook | int bl_power;
|
533 | a984a69e | Paul Brook | } SpitzLCDTG; |
534 | b00052e4 | balrog | |
535 | a984a69e | Paul Brook | static void spitz_bl_update(SpitzLCDTG *s) |
536 | b00052e4 | balrog | { |
537 | a984a69e | Paul Brook | if (s->bl_power && s->bl_intensity)
|
538 | a984a69e | Paul Brook | zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
|
539 | b00052e4 | balrog | else
|
540 | 89cdb6af | balrog | zaurus_printf("LCD Backlight now off\n");
|
541 | b00052e4 | balrog | } |
542 | b00052e4 | balrog | |
543 | a984a69e | Paul Brook | /* FIXME: Implement GPIO properly and remove this hack. */
|
544 | a984a69e | Paul Brook | static SpitzLCDTG *spitz_lcdtg;
|
545 | a984a69e | Paul Brook | |
546 | 38641a52 | balrog | static inline void spitz_bl_bit5(void *opaque, int line, int level) |
547 | b00052e4 | balrog | { |
548 | a984a69e | Paul Brook | SpitzLCDTG *s = spitz_lcdtg; |
549 | a984a69e | Paul Brook | int prev = s->bl_intensity;
|
550 | b00052e4 | balrog | |
551 | b00052e4 | balrog | if (level)
|
552 | a984a69e | Paul Brook | s->bl_intensity &= ~0x20;
|
553 | b00052e4 | balrog | else
|
554 | a984a69e | Paul Brook | s->bl_intensity |= 0x20;
|
555 | b00052e4 | balrog | |
556 | a984a69e | Paul Brook | if (s->bl_power && prev != s->bl_intensity)
|
557 | a984a69e | Paul Brook | spitz_bl_update(s); |
558 | b00052e4 | balrog | } |
559 | b00052e4 | balrog | |
560 | 38641a52 | balrog | static inline void spitz_bl_power(void *opaque, int line, int level) |
561 | b00052e4 | balrog | { |
562 | a984a69e | Paul Brook | SpitzLCDTG *s = spitz_lcdtg; |
563 | a984a69e | Paul Brook | s->bl_power = !!level; |
564 | a984a69e | Paul Brook | spitz_bl_update(s); |
565 | b00052e4 | balrog | } |
566 | b00052e4 | balrog | |
567 | a984a69e | Paul Brook | static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
|
568 | b00052e4 | balrog | { |
569 | a984a69e | Paul Brook | SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); |
570 | a984a69e | Paul Brook | int addr;
|
571 | a984a69e | Paul Brook | addr = value >> 5;
|
572 | a984a69e | Paul Brook | value &= 0x1f;
|
573 | b00052e4 | balrog | |
574 | b00052e4 | balrog | switch (addr) {
|
575 | b00052e4 | balrog | case LCDTG_RESCTL:
|
576 | b00052e4 | balrog | if (value)
|
577 | 89cdb6af | balrog | zaurus_printf("LCD in QVGA mode\n");
|
578 | b00052e4 | balrog | else
|
579 | 89cdb6af | balrog | zaurus_printf("LCD in VGA mode\n");
|
580 | b00052e4 | balrog | break;
|
581 | b00052e4 | balrog | |
582 | b00052e4 | balrog | case LCDTG_DUTYCTRL:
|
583 | a984a69e | Paul Brook | s->bl_intensity &= ~0x1f;
|
584 | a984a69e | Paul Brook | s->bl_intensity |= value; |
585 | a984a69e | Paul Brook | if (s->bl_power)
|
586 | a984a69e | Paul Brook | spitz_bl_update(s); |
587 | b00052e4 | balrog | break;
|
588 | b00052e4 | balrog | |
589 | b00052e4 | balrog | case LCDTG_POWERREG0:
|
590 | b00052e4 | balrog | /* Set common voltage to M62332FP */
|
591 | b00052e4 | balrog | break;
|
592 | b00052e4 | balrog | } |
593 | a984a69e | Paul Brook | return 0; |
594 | a984a69e | Paul Brook | } |
595 | a984a69e | Paul Brook | |
596 | a984a69e | Paul Brook | static void spitz_lcdtg_save(QEMUFile *f, void *opaque) |
597 | a984a69e | Paul Brook | { |
598 | a984a69e | Paul Brook | SpitzLCDTG *s = (SpitzLCDTG *)opaque; |
599 | a984a69e | Paul Brook | qemu_put_be32(f, s->bl_intensity); |
600 | a984a69e | Paul Brook | qemu_put_be32(f, s->bl_power); |
601 | a984a69e | Paul Brook | } |
602 | a984a69e | Paul Brook | |
603 | a984a69e | Paul Brook | static int spitz_lcdtg_load(QEMUFile *f, void *opaque, int version_id) |
604 | a984a69e | Paul Brook | { |
605 | a984a69e | Paul Brook | SpitzLCDTG *s = (SpitzLCDTG *)opaque; |
606 | a984a69e | Paul Brook | s->bl_intensity = qemu_get_be32(f); |
607 | a984a69e | Paul Brook | s->bl_power = qemu_get_be32(f); |
608 | a984a69e | Paul Brook | return 0; |
609 | a984a69e | Paul Brook | } |
610 | a984a69e | Paul Brook | |
611 | a984a69e | Paul Brook | static void spitz_lcdtg_init(SSISlave *dev) |
612 | a984a69e | Paul Brook | { |
613 | a984a69e | Paul Brook | SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); |
614 | a984a69e | Paul Brook | |
615 | a984a69e | Paul Brook | spitz_lcdtg = s; |
616 | a984a69e | Paul Brook | s->bl_power = 0;
|
617 | a984a69e | Paul Brook | s->bl_intensity = 0x20;
|
618 | a984a69e | Paul Brook | |
619 | a984a69e | Paul Brook | register_savevm("spitz-lcdtg", -1, 1, |
620 | a984a69e | Paul Brook | spitz_lcdtg_save, spitz_lcdtg_load, s); |
621 | b00052e4 | balrog | } |
622 | b00052e4 | balrog | |
623 | b00052e4 | balrog | /* SSP devices */
|
624 | b00052e4 | balrog | |
625 | b00052e4 | balrog | #define CORGI_SSP_PORT 2 |
626 | b00052e4 | balrog | |
627 | b00052e4 | balrog | #define SPITZ_GPIO_LCDCON_CS 53 |
628 | b00052e4 | balrog | #define SPITZ_GPIO_ADS7846_CS 14 |
629 | b00052e4 | balrog | #define SPITZ_GPIO_MAX1111_CS 20 |
630 | b00052e4 | balrog | #define SPITZ_GPIO_TP_INT 11 |
631 | b00052e4 | balrog | |
632 | a984a69e | Paul Brook | static DeviceState *max1111;
|
633 | b00052e4 | balrog | |
634 | b00052e4 | balrog | /* "Demux" the signal based on current chipselect */
|
635 | a984a69e | Paul Brook | typedef struct { |
636 | a984a69e | Paul Brook | SSISlave ssidev; |
637 | a984a69e | Paul Brook | SSIBus *bus[3];
|
638 | a984a69e | Paul Brook | int enable[3]; |
639 | a984a69e | Paul Brook | } CorgiSSPState; |
640 | b00052e4 | balrog | |
641 | a984a69e | Paul Brook | static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
|
642 | b00052e4 | balrog | { |
643 | a984a69e | Paul Brook | CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev); |
644 | a984a69e | Paul Brook | int i;
|
645 | a984a69e | Paul Brook | |
646 | a984a69e | Paul Brook | for (i = 0; i < 3; i++) { |
647 | a984a69e | Paul Brook | if (s->enable[i]) {
|
648 | a984a69e | Paul Brook | return ssi_transfer(s->bus[i], value);
|
649 | a984a69e | Paul Brook | } |
650 | a984a69e | Paul Brook | } |
651 | a984a69e | Paul Brook | return 0; |
652 | b00052e4 | balrog | } |
653 | b00052e4 | balrog | |
654 | 38641a52 | balrog | static void corgi_ssp_gpio_cs(void *opaque, int line, int level) |
655 | b00052e4 | balrog | { |
656 | a984a69e | Paul Brook | CorgiSSPState *s = (CorgiSSPState *)opaque; |
657 | a984a69e | Paul Brook | assert(line >= 0 && line < 3); |
658 | a984a69e | Paul Brook | s->enable[line] = !level; |
659 | b00052e4 | balrog | } |
660 | b00052e4 | balrog | |
661 | b00052e4 | balrog | #define MAX1111_BATT_VOLT 1 |
662 | b00052e4 | balrog | #define MAX1111_BATT_TEMP 2 |
663 | b00052e4 | balrog | #define MAX1111_ACIN_VOLT 3 |
664 | b00052e4 | balrog | |
665 | b00052e4 | balrog | #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ |
666 | b00052e4 | balrog | #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ |
667 | b00052e4 | balrog | #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ |
668 | b00052e4 | balrog | |
669 | 38641a52 | balrog | static void spitz_adc_temp_on(void *opaque, int line, int level) |
670 | b00052e4 | balrog | { |
671 | b00052e4 | balrog | if (!max1111)
|
672 | b00052e4 | balrog | return;
|
673 | b00052e4 | balrog | |
674 | b00052e4 | balrog | if (level)
|
675 | b00052e4 | balrog | max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP); |
676 | b00052e4 | balrog | else
|
677 | b00052e4 | balrog | max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
|
678 | b00052e4 | balrog | } |
679 | b00052e4 | balrog | |
680 | aa941b94 | balrog | static void spitz_ssp_save(QEMUFile *f, void *opaque) |
681 | aa941b94 | balrog | { |
682 | a984a69e | Paul Brook | CorgiSSPState *s = (CorgiSSPState *)opaque; |
683 | a984a69e | Paul Brook | int i;
|
684 | a984a69e | Paul Brook | |
685 | a984a69e | Paul Brook | for (i = 0; i < 3; i++) { |
686 | a984a69e | Paul Brook | qemu_put_be32(f, s->enable[i]); |
687 | a984a69e | Paul Brook | } |
688 | aa941b94 | balrog | } |
689 | aa941b94 | balrog | |
690 | aa941b94 | balrog | static int spitz_ssp_load(QEMUFile *f, void *opaque, int version_id) |
691 | aa941b94 | balrog | { |
692 | a984a69e | Paul Brook | CorgiSSPState *s = (CorgiSSPState *)opaque; |
693 | a984a69e | Paul Brook | int i;
|
694 | aa941b94 | balrog | |
695 | a984a69e | Paul Brook | if (version_id != 1) { |
696 | a984a69e | Paul Brook | return -EINVAL;
|
697 | a984a69e | Paul Brook | } |
698 | a984a69e | Paul Brook | for (i = 0; i < 3; i++) { |
699 | a984a69e | Paul Brook | s->enable[i] = qemu_get_be32(f); |
700 | a984a69e | Paul Brook | } |
701 | aa941b94 | balrog | return 0; |
702 | aa941b94 | balrog | } |
703 | aa941b94 | balrog | |
704 | a984a69e | Paul Brook | static void corgi_ssp_init(SSISlave *dev) |
705 | a984a69e | Paul Brook | { |
706 | a984a69e | Paul Brook | CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev); |
707 | a984a69e | Paul Brook | |
708 | a984a69e | Paul Brook | qdev_init_gpio_in(&dev->qdev, corgi_ssp_gpio_cs, 3);
|
709 | a984a69e | Paul Brook | s->bus[0] = ssi_create_bus();
|
710 | a984a69e | Paul Brook | qdev_attach_child_bus(&dev->qdev, "ssi0", s->bus[0]); |
711 | a984a69e | Paul Brook | s->bus[1] = ssi_create_bus();
|
712 | a984a69e | Paul Brook | qdev_attach_child_bus(&dev->qdev, "ssi1", s->bus[1]); |
713 | a984a69e | Paul Brook | s->bus[2] = ssi_create_bus();
|
714 | a984a69e | Paul Brook | qdev_attach_child_bus(&dev->qdev, "ssi2", s->bus[2]); |
715 | a984a69e | Paul Brook | |
716 | a984a69e | Paul Brook | register_savevm("spitz_ssp", -1, 1, spitz_ssp_save, spitz_ssp_load, s); |
717 | a984a69e | Paul Brook | } |
718 | a984a69e | Paul Brook | |
719 | bc24a225 | Paul Brook | static void spitz_ssp_attach(PXA2xxState *cpu) |
720 | b00052e4 | balrog | { |
721 | a984a69e | Paul Brook | DeviceState *mux; |
722 | a984a69e | Paul Brook | DeviceState *dev; |
723 | a984a69e | Paul Brook | void *bus;
|
724 | a984a69e | Paul Brook | |
725 | a984a69e | Paul Brook | mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp"); |
726 | 38641a52 | balrog | |
727 | a984a69e | Paul Brook | bus = qdev_get_child_bus(mux, "ssi0");
|
728 | a984a69e | Paul Brook | dev = ssi_create_slave(bus, "spitz-lcdtg");
|
729 | b00052e4 | balrog | |
730 | a984a69e | Paul Brook | bus = qdev_get_child_bus(mux, "ssi1");
|
731 | a984a69e | Paul Brook | dev = ssi_create_slave(bus, "ads7846");
|
732 | a984a69e | Paul Brook | qdev_connect_gpio_out(dev, 0,
|
733 | a984a69e | Paul Brook | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_TP_INT]); |
734 | b00052e4 | balrog | |
735 | a984a69e | Paul Brook | bus = qdev_get_child_bus(mux, "ssi2");
|
736 | a984a69e | Paul Brook | max1111 = ssi_create_slave(bus, "max1111");
|
737 | b00052e4 | balrog | max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT); |
738 | b00052e4 | balrog | max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
|
739 | b00052e4 | balrog | max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN); |
740 | b00052e4 | balrog | |
741 | a984a69e | Paul Brook | pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_LCDCON_CS, |
742 | a984a69e | Paul Brook | qdev_get_gpio_in(mux, 0));
|
743 | a984a69e | Paul Brook | pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ADS7846_CS, |
744 | a984a69e | Paul Brook | qdev_get_gpio_in(mux, 1));
|
745 | a984a69e | Paul Brook | pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_MAX1111_CS, |
746 | a984a69e | Paul Brook | qdev_get_gpio_in(mux, 2));
|
747 | b00052e4 | balrog | } |
748 | b00052e4 | balrog | |
749 | b00052e4 | balrog | /* CF Microdrive */
|
750 | b00052e4 | balrog | |
751 | bc24a225 | Paul Brook | static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) |
752 | b00052e4 | balrog | { |
753 | bc24a225 | Paul Brook | PCMCIACardState *md; |
754 | e4bcb14c | ths | int index;
|
755 | e4bcb14c | ths | BlockDriverState *bs; |
756 | b00052e4 | balrog | |
757 | e4bcb14c | ths | index = drive_get_index(IF_IDE, 0, 0); |
758 | e4bcb14c | ths | if (index == -1) |
759 | e4bcb14c | ths | return;
|
760 | e4bcb14c | ths | bs = drives_table[index].bdrv; |
761 | e4bcb14c | ths | if (bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {
|
762 | b00052e4 | balrog | md = dscm1xxxx_init(bs); |
763 | 15b18ec2 | balrog | pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); |
764 | b00052e4 | balrog | } |
765 | b00052e4 | balrog | } |
766 | b00052e4 | balrog | |
767 | adb86c37 | balrog | /* Wm8750 and Max7310 on I2C */
|
768 | adb86c37 | balrog | |
769 | adb86c37 | balrog | #define AKITA_MAX_ADDR 0x18 |
770 | 611d7189 | balrog | #define SPITZ_WM_ADDRL 0x1b |
771 | 611d7189 | balrog | #define SPITZ_WM_ADDRH 0x1a |
772 | adb86c37 | balrog | |
773 | adb86c37 | balrog | #define SPITZ_GPIO_WM 5 |
774 | adb86c37 | balrog | |
775 | adb86c37 | balrog | #ifdef HAS_AUDIO
|
776 | 38641a52 | balrog | static void spitz_wm8750_addr(void *opaque, int line, int level) |
777 | adb86c37 | balrog | { |
778 | adb86c37 | balrog | i2c_slave *wm = (i2c_slave *) opaque; |
779 | adb86c37 | balrog | if (level)
|
780 | adb86c37 | balrog | i2c_set_slave_address(wm, SPITZ_WM_ADDRH); |
781 | adb86c37 | balrog | else
|
782 | adb86c37 | balrog | i2c_set_slave_address(wm, SPITZ_WM_ADDRL); |
783 | adb86c37 | balrog | } |
784 | adb86c37 | balrog | #endif
|
785 | adb86c37 | balrog | |
786 | bc24a225 | Paul Brook | static void spitz_i2c_setup(PXA2xxState *cpu) |
787 | adb86c37 | balrog | { |
788 | adb86c37 | balrog | /* Attach the CPU on one end of our I2C bus. */
|
789 | adb86c37 | balrog | i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
|
790 | adb86c37 | balrog | |
791 | adb86c37 | balrog | #ifdef HAS_AUDIO
|
792 | cdbe40ca | Paul Brook | DeviceState *wm; |
793 | adb86c37 | balrog | |
794 | adb86c37 | balrog | /* Attach a WM8750 to the bus */
|
795 | cdbe40ca | Paul Brook | wm = i2c_create_slave(bus, "wm8750", 0); |
796 | adb86c37 | balrog | |
797 | 38641a52 | balrog | spitz_wm8750_addr(wm, 0, 0); |
798 | 38641a52 | balrog | pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_WM, |
799 | 38641a52 | balrog | qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]); |
800 | adb86c37 | balrog | /* .. and to the sound interface. */
|
801 | adb86c37 | balrog | cpu->i2s->opaque = wm; |
802 | adb86c37 | balrog | cpu->i2s->codec_out = wm8750_dac_dat; |
803 | adb86c37 | balrog | cpu->i2s->codec_in = wm8750_adc_dat; |
804 | adb86c37 | balrog | wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); |
805 | adb86c37 | balrog | #endif
|
806 | adb86c37 | balrog | } |
807 | adb86c37 | balrog | |
808 | bc24a225 | Paul Brook | static void spitz_akita_i2c_setup(PXA2xxState *cpu) |
809 | adb86c37 | balrog | { |
810 | adb86c37 | balrog | /* Attach a Max7310 to Akita I2C bus. */
|
811 | 6c0bd6bd | Paul Brook | i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", |
812 | 6c0bd6bd | Paul Brook | AKITA_MAX_ADDR); |
813 | adb86c37 | balrog | } |
814 | adb86c37 | balrog | |
815 | b00052e4 | balrog | /* Other peripherals */
|
816 | b00052e4 | balrog | |
817 | 38641a52 | balrog | static void spitz_out_switch(void *opaque, int line, int level) |
818 | b00052e4 | balrog | { |
819 | 38641a52 | balrog | switch (line) {
|
820 | 38641a52 | balrog | case 0: |
821 | 89cdb6af | balrog | zaurus_printf("Charging %s.\n", level ? "off" : "on"); |
822 | 38641a52 | balrog | break;
|
823 | 38641a52 | balrog | case 1: |
824 | 89cdb6af | balrog | zaurus_printf("Discharging %s.\n", level ? "on" : "off"); |
825 | 38641a52 | balrog | break;
|
826 | 38641a52 | balrog | case 2: |
827 | 89cdb6af | balrog | zaurus_printf("Green LED %s.\n", level ? "on" : "off"); |
828 | 38641a52 | balrog | break;
|
829 | 38641a52 | balrog | case 3: |
830 | 89cdb6af | balrog | zaurus_printf("Orange LED %s.\n", level ? "on" : "off"); |
831 | 38641a52 | balrog | break;
|
832 | 38641a52 | balrog | case 4: |
833 | 38641a52 | balrog | spitz_bl_bit5(opaque, line, level); |
834 | 38641a52 | balrog | break;
|
835 | 38641a52 | balrog | case 5: |
836 | 38641a52 | balrog | spitz_bl_power(opaque, line, level); |
837 | 38641a52 | balrog | break;
|
838 | 38641a52 | balrog | case 6: |
839 | 38641a52 | balrog | spitz_adc_temp_on(opaque, line, level); |
840 | 38641a52 | balrog | break;
|
841 | 38641a52 | balrog | } |
842 | b00052e4 | balrog | } |
843 | b00052e4 | balrog | |
844 | b00052e4 | balrog | #define SPITZ_SCP_LED_GREEN 1 |
845 | b00052e4 | balrog | #define SPITZ_SCP_JK_B 2 |
846 | b00052e4 | balrog | #define SPITZ_SCP_CHRG_ON 3 |
847 | b00052e4 | balrog | #define SPITZ_SCP_MUTE_L 4 |
848 | b00052e4 | balrog | #define SPITZ_SCP_MUTE_R 5 |
849 | b00052e4 | balrog | #define SPITZ_SCP_CF_POWER 6 |
850 | b00052e4 | balrog | #define SPITZ_SCP_LED_ORANGE 7 |
851 | b00052e4 | balrog | #define SPITZ_SCP_JK_A 8 |
852 | b00052e4 | balrog | #define SPITZ_SCP_ADC_TEMP_ON 9 |
853 | b00052e4 | balrog | #define SPITZ_SCP2_IR_ON 1 |
854 | b00052e4 | balrog | #define SPITZ_SCP2_AKIN_PULLUP 2 |
855 | b00052e4 | balrog | #define SPITZ_SCP2_BACKLIGHT_CONT 7 |
856 | b00052e4 | balrog | #define SPITZ_SCP2_BACKLIGHT_ON 8 |
857 | b00052e4 | balrog | #define SPITZ_SCP2_MIC_BIAS 9 |
858 | b00052e4 | balrog | |
859 | bc24a225 | Paul Brook | static void spitz_scoop_gpio_setup(PXA2xxState *cpu, |
860 | bc24a225 | Paul Brook | ScoopInfo *scp0, ScoopInfo *scp1) |
861 | b00052e4 | balrog | { |
862 | 38641a52 | balrog | qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
|
863 | 38641a52 | balrog | |
864 | e33d8cdb | balrog | scoop_gpio_out_set(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
|
865 | e33d8cdb | balrog | scoop_gpio_out_set(scp0, SPITZ_SCP_JK_B, outsignals[1]);
|
866 | e33d8cdb | balrog | scoop_gpio_out_set(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
|
867 | e33d8cdb | balrog | scoop_gpio_out_set(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
|
868 | b00052e4 | balrog | |
869 | e33d8cdb | balrog | if (scp1) {
|
870 | e33d8cdb | balrog | scoop_gpio_out_set(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
|
871 | e33d8cdb | balrog | scoop_gpio_out_set(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
|
872 | b00052e4 | balrog | } |
873 | b00052e4 | balrog | |
874 | e33d8cdb | balrog | scoop_gpio_out_set(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
|
875 | b00052e4 | balrog | } |
876 | b00052e4 | balrog | |
877 | b00052e4 | balrog | #define SPITZ_GPIO_HSYNC 22 |
878 | b00052e4 | balrog | #define SPITZ_GPIO_SD_DETECT 9 |
879 | b00052e4 | balrog | #define SPITZ_GPIO_SD_WP 81 |
880 | b00052e4 | balrog | #define SPITZ_GPIO_ON_RESET 89 |
881 | b00052e4 | balrog | #define SPITZ_GPIO_BAT_COVER 90 |
882 | b00052e4 | balrog | #define SPITZ_GPIO_CF1_IRQ 105 |
883 | b00052e4 | balrog | #define SPITZ_GPIO_CF1_CD 94 |
884 | b00052e4 | balrog | #define SPITZ_GPIO_CF2_IRQ 106 |
885 | b00052e4 | balrog | #define SPITZ_GPIO_CF2_CD 93 |
886 | b00052e4 | balrog | |
887 | 38641a52 | balrog | static int spitz_hsync; |
888 | b00052e4 | balrog | |
889 | 38641a52 | balrog | static void spitz_lcd_hsync_handler(void *opaque, int line, int level) |
890 | b00052e4 | balrog | { |
891 | bc24a225 | Paul Brook | PXA2xxState *cpu = (PXA2xxState *) opaque; |
892 | 38641a52 | balrog | qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_HSYNC], spitz_hsync); |
893 | b00052e4 | balrog | spitz_hsync ^= 1;
|
894 | b00052e4 | balrog | } |
895 | b00052e4 | balrog | |
896 | bc24a225 | Paul Brook | static void spitz_gpio_setup(PXA2xxState *cpu, int slots) |
897 | b00052e4 | balrog | { |
898 | 38641a52 | balrog | qemu_irq lcd_hsync; |
899 | b00052e4 | balrog | /*
|
900 | b00052e4 | balrog | * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
|
901 | b00052e4 | balrog | * read to satisfy broken guests that poll-wait for hsync.
|
902 | b00052e4 | balrog | * Simulating a real hsync event would be less practical and
|
903 | b00052e4 | balrog | * wouldn't guarantee that a guest ever exits the loop.
|
904 | b00052e4 | balrog | */
|
905 | b00052e4 | balrog | spitz_hsync = 0;
|
906 | 38641a52 | balrog | lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0]; |
907 | 38641a52 | balrog | pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); |
908 | 38641a52 | balrog | pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); |
909 | b00052e4 | balrog | |
910 | b00052e4 | balrog | /* MMC/SD host */
|
911 | 02ce600c | balrog | pxa2xx_mmci_handlers(cpu->mmc, |
912 | 02ce600c | balrog | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP], |
913 | 02ce600c | balrog | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT]); |
914 | b00052e4 | balrog | |
915 | b00052e4 | balrog | /* Battery lock always closed */
|
916 | 38641a52 | balrog | qemu_irq_raise(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_BAT_COVER]); |
917 | b00052e4 | balrog | |
918 | b00052e4 | balrog | /* Handle reset */
|
919 | 38641a52 | balrog | pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset); |
920 | b00052e4 | balrog | |
921 | b00052e4 | balrog | /* PCMCIA signals: card's IRQ and Card-Detect */
|
922 | b00052e4 | balrog | if (slots >= 1) |
923 | 38641a52 | balrog | pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
|
924 | 38641a52 | balrog | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_IRQ], |
925 | 38641a52 | balrog | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_CD]); |
926 | b00052e4 | balrog | if (slots >= 2) |
927 | 38641a52 | balrog | pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
|
928 | 38641a52 | balrog | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_IRQ], |
929 | 38641a52 | balrog | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_CD]); |
930 | b00052e4 | balrog | |
931 | b00052e4 | balrog | /* Initialise the screen rotation related signals */
|
932 | b00052e4 | balrog | spitz_gpio_invert[3] = 0; /* Always open */ |
933 | b00052e4 | balrog | if (graphic_rotate) { /* Tablet mode */ |
934 | b00052e4 | balrog | spitz_gpio_invert[4] = 0; |
935 | b00052e4 | balrog | } else { /* Portrait mode */ |
936 | b00052e4 | balrog | spitz_gpio_invert[4] = 1; |
937 | b00052e4 | balrog | } |
938 | 38641a52 | balrog | qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWA], |
939 | 38641a52 | balrog | spitz_gpio_invert[3]);
|
940 | 38641a52 | balrog | qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWB], |
941 | 38641a52 | balrog | spitz_gpio_invert[4]);
|
942 | b00052e4 | balrog | } |
943 | b00052e4 | balrog | |
944 | b00052e4 | balrog | /* Board init. */
|
945 | b00052e4 | balrog | enum spitz_model_e { spitz, akita, borzoi, terrier };
|
946 | b00052e4 | balrog | |
947 | 7fb4fdcf | balrog | #define SPITZ_RAM 0x04000000 |
948 | 7fb4fdcf | balrog | #define SPITZ_ROM 0x00800000 |
949 | 7fb4fdcf | balrog | |
950 | f93eb9ff | balrog | static struct arm_boot_info spitz_binfo = { |
951 | f93eb9ff | balrog | .loader_start = PXA2XX_SDRAM_BASE, |
952 | f93eb9ff | balrog | .ram_size = 0x04000000,
|
953 | f93eb9ff | balrog | }; |
954 | f93eb9ff | balrog | |
955 | fbe1b595 | Paul Brook | static void spitz_common_init(ram_addr_t ram_size, |
956 | 3023f332 | aliguori | const char *kernel_filename, |
957 | b00052e4 | balrog | const char *kernel_cmdline, const char *initrd_filename, |
958 | 4207117c | balrog | const char *cpu_model, enum spitz_model_e model, int arm_id) |
959 | b00052e4 | balrog | { |
960 | bc24a225 | Paul Brook | PXA2xxState *cpu; |
961 | bc24a225 | Paul Brook | ScoopInfo *scp0, *scp1 = NULL;
|
962 | b00052e4 | balrog | |
963 | 4207117c | balrog | if (!cpu_model)
|
964 | 4207117c | balrog | cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0"; |
965 | b00052e4 | balrog | |
966 | d95b2f8d | balrog | /* Setup CPU & memory */
|
967 | 3023f332 | aliguori | cpu = pxa270_init(spitz_binfo.ram_size, cpu_model); |
968 | b00052e4 | balrog | |
969 | b00052e4 | balrog | sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M); |
970 | b00052e4 | balrog | |
971 | 7fb4fdcf | balrog | cpu_register_physical_memory(0, SPITZ_ROM,
|
972 | 7fb4fdcf | balrog | qemu_ram_alloc(SPITZ_ROM) | IO_MEM_ROM); |
973 | b00052e4 | balrog | |
974 | b00052e4 | balrog | /* Setup peripherals */
|
975 | b00052e4 | balrog | spitz_keyboard_register(cpu); |
976 | b00052e4 | balrog | |
977 | b00052e4 | balrog | spitz_ssp_attach(cpu); |
978 | b00052e4 | balrog | |
979 | e33d8cdb | balrog | scp0 = scoop_init(cpu, 0, 0x10800000); |
980 | e33d8cdb | balrog | if (model != akita) {
|
981 | e33d8cdb | balrog | scp1 = scoop_init(cpu, 1, 0x08800040); |
982 | e33d8cdb | balrog | } |
983 | b00052e4 | balrog | |
984 | e33d8cdb | balrog | spitz_scoop_gpio_setup(cpu, scp0, scp1); |
985 | b00052e4 | balrog | |
986 | b00052e4 | balrog | spitz_gpio_setup(cpu, (model == akita) ? 1 : 2); |
987 | b00052e4 | balrog | |
988 | adb86c37 | balrog | spitz_i2c_setup(cpu); |
989 | adb86c37 | balrog | |
990 | adb86c37 | balrog | if (model == akita)
|
991 | adb86c37 | balrog | spitz_akita_i2c_setup(cpu); |
992 | adb86c37 | balrog | |
993 | b00052e4 | balrog | if (model == terrier)
|
994 | bf5ee248 | balrog | /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
|
995 | 15b18ec2 | balrog | spitz_microdrive_attach(cpu, 1);
|
996 | b00052e4 | balrog | else if (model != akita) |
997 | 15b18ec2 | balrog | /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
|
998 | 15b18ec2 | balrog | spitz_microdrive_attach(cpu, 0);
|
999 | b00052e4 | balrog | |
1000 | b00052e4 | balrog | /* Setup initial (reset) machine state */
|
1001 | f93eb9ff | balrog | cpu->env->regs[15] = spitz_binfo.loader_start;
|
1002 | b00052e4 | balrog | |
1003 | f93eb9ff | balrog | spitz_binfo.kernel_filename = kernel_filename; |
1004 | f93eb9ff | balrog | spitz_binfo.kernel_cmdline = kernel_cmdline; |
1005 | f93eb9ff | balrog | spitz_binfo.initrd_filename = initrd_filename; |
1006 | f93eb9ff | balrog | spitz_binfo.board_id = arm_id; |
1007 | f93eb9ff | balrog | arm_load_kernel(cpu->env, &spitz_binfo); |
1008 | f78630ab | pbrook | sl_bootparam_write(SL_PXA_PARAM_BASE); |
1009 | b00052e4 | balrog | } |
1010 | b00052e4 | balrog | |
1011 | fbe1b595 | Paul Brook | static void spitz_init(ram_addr_t ram_size, |
1012 | 3023f332 | aliguori | const char *boot_device, |
1013 | b00052e4 | balrog | const char *kernel_filename, const char *kernel_cmdline, |
1014 | b00052e4 | balrog | const char *initrd_filename, const char *cpu_model) |
1015 | b00052e4 | balrog | { |
1016 | fbe1b595 | Paul Brook | spitz_common_init(ram_size, kernel_filename, |
1017 | 4207117c | balrog | kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
|
1018 | b00052e4 | balrog | } |
1019 | b00052e4 | balrog | |
1020 | fbe1b595 | Paul Brook | static void borzoi_init(ram_addr_t ram_size, |
1021 | 3023f332 | aliguori | const char *boot_device, |
1022 | b00052e4 | balrog | const char *kernel_filename, const char *kernel_cmdline, |
1023 | b00052e4 | balrog | const char *initrd_filename, const char *cpu_model) |
1024 | b00052e4 | balrog | { |
1025 | fbe1b595 | Paul Brook | spitz_common_init(ram_size, kernel_filename, |
1026 | 4207117c | balrog | kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
|
1027 | b00052e4 | balrog | } |
1028 | b00052e4 | balrog | |
1029 | fbe1b595 | Paul Brook | static void akita_init(ram_addr_t ram_size, |
1030 | 3023f332 | aliguori | const char *boot_device, |
1031 | b00052e4 | balrog | const char *kernel_filename, const char *kernel_cmdline, |
1032 | b00052e4 | balrog | const char *initrd_filename, const char *cpu_model) |
1033 | b00052e4 | balrog | { |
1034 | fbe1b595 | Paul Brook | spitz_common_init(ram_size, kernel_filename, |
1035 | 4207117c | balrog | kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
|
1036 | b00052e4 | balrog | } |
1037 | b00052e4 | balrog | |
1038 | fbe1b595 | Paul Brook | static void terrier_init(ram_addr_t ram_size, |
1039 | 3023f332 | aliguori | const char *boot_device, |
1040 | b00052e4 | balrog | const char *kernel_filename, const char *kernel_cmdline, |
1041 | b00052e4 | balrog | const char *initrd_filename, const char *cpu_model) |
1042 | b00052e4 | balrog | { |
1043 | fbe1b595 | Paul Brook | spitz_common_init(ram_size, kernel_filename, |
1044 | 4207117c | balrog | kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
|
1045 | b00052e4 | balrog | } |
1046 | b00052e4 | balrog | |
1047 | b00052e4 | balrog | QEMUMachine akitapda_machine = { |
1048 | 4b32e168 | aliguori | .name = "akita",
|
1049 | 4b32e168 | aliguori | .desc = "Akita PDA (PXA270)",
|
1050 | 4b32e168 | aliguori | .init = akita_init, |
1051 | b00052e4 | balrog | }; |
1052 | b00052e4 | balrog | |
1053 | b00052e4 | balrog | QEMUMachine spitzpda_machine = { |
1054 | 4b32e168 | aliguori | .name = "spitz",
|
1055 | 4b32e168 | aliguori | .desc = "Spitz PDA (PXA270)",
|
1056 | 4b32e168 | aliguori | .init = spitz_init, |
1057 | b00052e4 | balrog | }; |
1058 | b00052e4 | balrog | |
1059 | b00052e4 | balrog | QEMUMachine borzoipda_machine = { |
1060 | 4b32e168 | aliguori | .name = "borzoi",
|
1061 | 4b32e168 | aliguori | .desc = "Borzoi PDA (PXA270)",
|
1062 | 4b32e168 | aliguori | .init = borzoi_init, |
1063 | b00052e4 | balrog | }; |
1064 | b00052e4 | balrog | |
1065 | b00052e4 | balrog | QEMUMachine terrierpda_machine = { |
1066 | 4b32e168 | aliguori | .name = "terrier",
|
1067 | 4b32e168 | aliguori | .desc = "Terrier PDA (PXA270)",
|
1068 | 4b32e168 | aliguori | .init = terrier_init, |
1069 | b00052e4 | balrog | }; |
1070 | a984a69e | Paul Brook | |
1071 | a984a69e | Paul Brook | static SSISlaveInfo corgi_ssp_info = {
|
1072 | a984a69e | Paul Brook | .init = corgi_ssp_init, |
1073 | a984a69e | Paul Brook | .transfer = corgi_ssp_transfer |
1074 | a984a69e | Paul Brook | }; |
1075 | a984a69e | Paul Brook | |
1076 | a984a69e | Paul Brook | static SSISlaveInfo spitz_lcdtg_info = {
|
1077 | a984a69e | Paul Brook | .init = spitz_lcdtg_init, |
1078 | a984a69e | Paul Brook | .transfer = spitz_lcdtg_transfer |
1079 | a984a69e | Paul Brook | }; |
1080 | a984a69e | Paul Brook | |
1081 | a984a69e | Paul Brook | static void spitz_register_devices(void) |
1082 | a984a69e | Paul Brook | { |
1083 | a984a69e | Paul Brook | ssi_register_slave("corgi-ssp", sizeof(CorgiSSPState), &corgi_ssp_info); |
1084 | a984a69e | Paul Brook | ssi_register_slave("spitz-lcdtg", sizeof(SpitzLCDTG), &spitz_lcdtg_info); |
1085 | a984a69e | Paul Brook | } |
1086 | a984a69e | Paul Brook | |
1087 | a984a69e | Paul Brook | device_init(spitz_register_devices) |