root / pc-bios / vgabios.diff @ 86cc1ce0
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1 | 9d0869b6 | bellard | Index: Makefile
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2 | 9d0869b6 | bellard | ===================================================================
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3 | 9d0869b6 | bellard | RCS file: /sources/vgabios/vgabios/Makefile,v
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4 | 9d0869b6 | bellard | retrieving revision 1.17
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5 | 9d0869b6 | bellard | diff -u -w -r1.17 Makefile
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6 | 9d0869b6 | bellard | --- Makefile 6 Mar 2005 13:06:47 -0000 1.17
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7 | 9d0869b6 | bellard | +++ Makefile 14 Jun 2006 00:51:06 -0000
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8 | 9d0869b6 | bellard | @@ -22,7 +22,7 @@
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9 | 9d0869b6 | bellard | cirrus-bios: vgabios-cirrus.bin vgabios-cirrus.debug.bin |
10 | 9d0869b6 | bellard | |
11 | 9d0869b6 | bellard | clean: |
12 | 9d0869b6 | bellard | - /bin/rm -f biossums *.o *.s *.ld86 \
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13 | 9d0869b6 | bellard | + /bin/rm -f biossums vbetables-gen vbetables.h *.o *.s *.ld86 \
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14 | 9d0869b6 | bellard | temp.awk.* vgabios*.orig _vgabios_* _vgabios-debug_* core vgabios*.bin vgabios*.txt $(RELEASE).bin *.bak |
15 | 9d0869b6 | bellard | |
16 | 9d0869b6 | bellard | dist-clean: clean |
17 | 9d0869b6 | bellard | @@ -79,3 +79,9 @@
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18 | 9d0869b6 | bellard | |
19 | 9d0869b6 | bellard | biossums: biossums.c |
20 | 9d0869b6 | bellard | $(CC) -o biossums biossums.c |
21 | 9d0869b6 | bellard | +
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22 | 9d0869b6 | bellard | +vbetables-gen: vbetables-gen.c
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23 | 9d0869b6 | bellard | + $(CC) -o vbetables-gen vbetables-gen.c
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24 | 9d0869b6 | bellard | +
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25 | 9d0869b6 | bellard | +vbetables.h: vbetables-gen
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26 | 9d0869b6 | bellard | + ./vbetables-gen > $@
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27 | 02cfb0b4 | bellard | Index: clext.c
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28 | 02cfb0b4 | bellard | ===================================================================
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29 | 26f69dc0 | bellard | RCS file: /sources/vgabios/vgabios/clext.c,v
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30 | 1c46d713 | bellard | retrieving revision 1.10
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31 | 1c46d713 | bellard | diff -u -w -r1.10 clext.c
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32 | 1c46d713 | bellard | --- clext.c 25 Mar 2006 10:19:15 -0000 1.10
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33 | 9d0869b6 | bellard | +++ clext.c 14 Jun 2006 00:51:06 -0000
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34 | 1c46d713 | bellard | @@ -544,6 +544,13 @@
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35 | 1c46d713 | bellard | cirrus_set_video_mode_extended:
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36 | 1c46d713 | bellard | call cirrus_switch_mode |
37 | 1c46d713 | bellard | pop ax ;; mode |
38 | 1c46d713 | bellard | + test al, #0x80
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39 | 1c46d713 | bellard | + jnz cirrus_set_video_mode_extended_1
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40 | 1c46d713 | bellard | + push ax
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41 | 1c46d713 | bellard | + mov ax, #0xffff ; set to 0xff to keep win 2K happy
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42 | 1c46d713 | bellard | + call cirrus_clear_vram
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43 | 1c46d713 | bellard | + pop ax
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44 | 1c46d713 | bellard | +cirrus_set_video_mode_extended_1:
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45 | 1c46d713 | bellard | and al, #0x7f
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46 | 1c46d713 | bellard | |
47 | 1c46d713 | bellard | push ds |
48 | 1c46d713 | bellard | @@ -1011,6 +1018,13 @@
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49 | 1c46d713 | bellard | jnz cirrus_vesa_02h_3 |
50 | 1c46d713 | bellard | call cirrus_enable_16k_granularity |
51 | 1c46d713 | bellard | cirrus_vesa_02h_3:
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52 | 1c46d713 | bellard | + test bx, #0x8000 ;; no clear
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53 | 1c46d713 | bellard | + jnz cirrus_vesa_02h_4
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54 | 1c46d713 | bellard | + push ax
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55 | 1c46d713 | bellard | + xor ax,ax
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56 | 1c46d713 | bellard | + call cirrus_clear_vram
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57 | 1c46d713 | bellard | + pop ax
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58 | 1c46d713 | bellard | +cirrus_vesa_02h_4:
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59 | 1c46d713 | bellard | pop ax |
60 | 1c46d713 | bellard | push ds |
61 | 1c46d713 | bellard | #ifdef CIRRUS_VESA3_PMINFO
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62 | 1c46d713 | bellard | @@ -1479,6 +1493,38 @@
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63 | 1c46d713 | bellard | pop bx |
64 | 26f69dc0 | bellard | ret |
65 | 26f69dc0 | bellard | |
66 | 1c46d713 | bellard | +cirrus_clear_vram:
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67 | 1c46d713 | bellard | + pusha
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68 | 1c46d713 | bellard | + push es
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69 | 1c46d713 | bellard | + mov si, ax
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70 | 26f69dc0 | bellard | +
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71 | 1c46d713 | bellard | + call cirrus_enable_16k_granularity
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72 | 1c46d713 | bellard | + call cirrus_extbios_85h
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73 | 1c46d713 | bellard | + shl al, #2
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74 | 1c46d713 | bellard | + mov bl, al
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75 | 1c46d713 | bellard | + xor ah,ah
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76 | 1c46d713 | bellard | +cirrus_clear_vram_1:
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77 | 1c46d713 | bellard | + mov al, #0x09
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78 | 1c46d713 | bellard | + mov dx, #0x3ce
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79 | 1c46d713 | bellard | + out dx, ax
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80 | 1c46d713 | bellard | + push ax
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81 | 1c46d713 | bellard | + mov cx, #0xa000
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82 | 1c46d713 | bellard | + mov es, cx
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83 | 1c46d713 | bellard | + xor di, di
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84 | 1c46d713 | bellard | + mov ax, si
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85 | 1c46d713 | bellard | + mov cx, #8192
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86 | 1c46d713 | bellard | + cld
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87 | 1c46d713 | bellard | + rep
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88 | 1c46d713 | bellard | + stosw
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89 | 1c46d713 | bellard | + pop ax
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90 | 1c46d713 | bellard | + inc ah
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91 | 1c46d713 | bellard | + cmp ah, bl
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92 | 1c46d713 | bellard | + jne cirrus_clear_vram_1
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93 | 26f69dc0 | bellard | +
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94 | 1c46d713 | bellard | + pop es
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95 | 1c46d713 | bellard | + popa
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96 | 1c46d713 | bellard | + ret
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97 | 26f69dc0 | bellard | +
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98 | 1c46d713 | bellard | cirrus_extbios_handlers:
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99 | 1c46d713 | bellard | ;; 80h
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100 | 1c46d713 | bellard | dw cirrus_extbios_80h |
101 | 9d0869b6 | bellard | Index: vbe.c
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102 | 9d0869b6 | bellard | ===================================================================
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103 | 9d0869b6 | bellard | RCS file: /sources/vgabios/vgabios/vbe.c,v
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104 | 9d0869b6 | bellard | retrieving revision 1.48
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105 | 9d0869b6 | bellard | diff -u -w -r1.48 vbe.c
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106 | 9d0869b6 | bellard | --- vbe.c 26 Dec 2005 19:50:26 -0000 1.48
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107 | 9d0869b6 | bellard | +++ vbe.c 14 Jun 2006 00:51:07 -0000
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108 | 9d0869b6 | bellard | @@ -118,21 +118,114 @@
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109 | 9d0869b6 | bellard | .word VBE_VESA_MODE_END_OF_LIST |
110 | 9d0869b6 | bellard | #endif
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111 | 9d0869b6 | bellard | |
112 | 9d0869b6 | bellard | + .align 2
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113 | 9d0869b6 | bellard | vesa_pm_start:
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114 | 9d0869b6 | bellard | dw vesa_pm_set_window - vesa_pm_start |
115 | 9d0869b6 | bellard | - dw vesa_pm_set_display_strt - vesa_pm_start
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116 | 9d0869b6 | bellard | + dw vesa_pm_set_display_start - vesa_pm_start
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117 | 9d0869b6 | bellard | dw vesa_pm_unimplemented - vesa_pm_start |
118 | 9d0869b6 | bellard | - dw 0
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119 | 9d0869b6 | bellard | + dw vesa_pm_io_ports_table - vesa_pm_start
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120 | 9d0869b6 | bellard | +vesa_pm_io_ports_table:
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121 | 9d0869b6 | bellard | + dw VBE_DISPI_IOPORT_INDEX
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122 | 9d0869b6 | bellard | + dw VBE_DISPI_IOPORT_INDEX + 1
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123 | 9d0869b6 | bellard | + dw VBE_DISPI_IOPORT_DATA
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124 | 9d0869b6 | bellard | + dw VBE_DISPI_IOPORT_DATA + 1
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125 | 9d0869b6 | bellard | + dw 0xffff
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126 | 9d0869b6 | bellard | + dw 0xffff
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127 | 9d0869b6 | bellard | |
128 | 9d0869b6 | bellard | USE32 |
129 | 9d0869b6 | bellard | vesa_pm_set_window:
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130 | 9d0869b6 | bellard | - mov ax, #0x4f05
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131 | 9d0869b6 | bellard | - int #0x10
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132 | 9d0869b6 | bellard | + cmp bx, #0x00
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133 | 9d0869b6 | bellard | + je vesa_pm_set_display_window1
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134 | 9d0869b6 | bellard | + mov ax, #0x0100
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135 | 9d0869b6 | bellard | + ret
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136 | 9d0869b6 | bellard | +vesa_pm_set_display_window1:
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137 | 9d0869b6 | bellard | + mov ax, dx
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138 | 9d0869b6 | bellard | + push dx
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139 | 9d0869b6 | bellard | + push ax
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140 | 9d0869b6 | bellard | + mov dx, # VBE_DISPI_IOPORT_INDEX
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141 | 9d0869b6 | bellard | + mov ax, # VBE_DISPI_INDEX_BANK
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142 | 9d0869b6 | bellard | + out dx, ax
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143 | 9d0869b6 | bellard | + pop ax
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144 | 9d0869b6 | bellard | + mov dx, # VBE_DISPI_IOPORT_DATA
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145 | 9d0869b6 | bellard | + out dx, ax
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146 | 9d0869b6 | bellard | + pop dx
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147 | 9d0869b6 | bellard | + mov ax, #0x004f
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148 | 9d0869b6 | bellard | ret |
149 | 9d0869b6 | bellard | |
150 | 9d0869b6 | bellard | vesa_pm_set_display_start:
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151 | 9d0869b6 | bellard | - mov ax, #0x4f07
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152 | 9d0869b6 | bellard | - int #0x10
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153 | 9d0869b6 | bellard | + cmp bl, #0x80
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154 | 9d0869b6 | bellard | + je vesa_pm_set_display_start1
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155 | 9d0869b6 | bellard | + cmp bl, #0x00
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156 | 9d0869b6 | bellard | + je vesa_pm_set_display_start1
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157 | 9d0869b6 | bellard | + mov ax, #0x0100
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158 | 9d0869b6 | bellard | + ret
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159 | 9d0869b6 | bellard | +vesa_pm_set_display_start1:
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160 | 9d0869b6 | bellard | +; convert offset to (X, Y) coordinate
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161 | 9d0869b6 | bellard | +; (would be simpler to change Bochs VBE API...)
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162 | 9d0869b6 | bellard | + push eax
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163 | 9d0869b6 | bellard | + push ecx
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164 | 9d0869b6 | bellard | + push edx
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165 | 9d0869b6 | bellard | + push esi
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166 | 9d0869b6 | bellard | + push edi
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167 | 9d0869b6 | bellard | + shl edx, #16
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168 | 9d0869b6 | bellard | + and ecx, #0xffff
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169 | 9d0869b6 | bellard | + or ecx, edx
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170 | 9d0869b6 | bellard | + shl ecx, #2
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171 | 9d0869b6 | bellard | + mov eax, ecx
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172 | 9d0869b6 | bellard | +
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173 | 9d0869b6 | bellard | + push eax
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174 | 9d0869b6 | bellard | + mov dx, # VBE_DISPI_IOPORT_INDEX
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175 | 9d0869b6 | bellard | + mov ax, # VBE_DISPI_INDEX_VIRT_WIDTH
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176 | 9d0869b6 | bellard | + out dx, ax
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177 | 9d0869b6 | bellard | + mov dx, # VBE_DISPI_IOPORT_DATA
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178 | 9d0869b6 | bellard | + in ax, dx
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179 | 9d0869b6 | bellard | + movzx ecx, ax
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180 | 9d0869b6 | bellard | +
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181 | 9d0869b6 | bellard | + mov dx, # VBE_DISPI_IOPORT_INDEX
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182 | 9d0869b6 | bellard | + mov ax, # VBE_DISPI_INDEX_BPP
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183 | 9d0869b6 | bellard | + out dx, ax
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184 | 9d0869b6 | bellard | + mov dx, # VBE_DISPI_IOPORT_DATA
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185 | 9d0869b6 | bellard | + in ax, dx
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186 | 9d0869b6 | bellard | + movzx esi, ax
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187 | 9d0869b6 | bellard | + pop eax
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188 | 9d0869b6 | bellard | +
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189 | 9d0869b6 | bellard | + add esi, #7
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190 | 9d0869b6 | bellard | + shr esi, #3
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191 | 9d0869b6 | bellard | + imul ecx, esi
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192 | 9d0869b6 | bellard | + xor edx, edx
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193 | 9d0869b6 | bellard | + div ecx
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194 | 9d0869b6 | bellard | + mov edi, eax
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195 | 9d0869b6 | bellard | + mov eax, edx
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196 | 9d0869b6 | bellard | + xor edx, edx
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197 | 9d0869b6 | bellard | + div esi
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198 | 9d0869b6 | bellard | +
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199 | 9d0869b6 | bellard | + push dx
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200 | 9d0869b6 | bellard | + push ax
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201 | 9d0869b6 | bellard | + mov dx, # VBE_DISPI_IOPORT_INDEX
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202 | 9d0869b6 | bellard | + mov ax, # VBE_DISPI_INDEX_X_OFFSET
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203 | 9d0869b6 | bellard | + out dx, ax
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204 | 9d0869b6 | bellard | + pop ax
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205 | 9d0869b6 | bellard | + mov dx, # VBE_DISPI_IOPORT_DATA
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206 | 9d0869b6 | bellard | + out dx, ax
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207 | 9d0869b6 | bellard | + pop dx
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208 | 9d0869b6 | bellard | +
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209 | 9d0869b6 | bellard | + mov ax, di
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210 | 9d0869b6 | bellard | + push dx
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211 | 9d0869b6 | bellard | + push ax
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212 | 9d0869b6 | bellard | + mov dx, # VBE_DISPI_IOPORT_INDEX
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213 | 9d0869b6 | bellard | + mov ax, # VBE_DISPI_INDEX_Y_OFFSET
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214 | 9d0869b6 | bellard | + out dx, ax
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215 | 9d0869b6 | bellard | + pop ax
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216 | 9d0869b6 | bellard | + mov dx, # VBE_DISPI_IOPORT_DATA
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217 | 9d0869b6 | bellard | + out dx, ax
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218 | 9d0869b6 | bellard | + pop dx
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219 | 9d0869b6 | bellard | +
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220 | 9d0869b6 | bellard | + pop edi
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221 | 9d0869b6 | bellard | + pop esi
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222 | 9d0869b6 | bellard | + pop edx
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223 | 9d0869b6 | bellard | + pop ecx
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224 | 9d0869b6 | bellard | + pop eax
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225 | 9d0869b6 | bellard | + mov ax, #0x004f
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226 | 9d0869b6 | bellard | ret |
227 | 9d0869b6 | bellard | |
228 | 9d0869b6 | bellard | vesa_pm_unimplemented:
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229 | 9d0869b6 | bellard | @@ -835,6 +928,64 @@
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230 | 9d0869b6 | bellard | ASM_END |
231 | 9d0869b6 | bellard | |
232 | 9d0869b6 | bellard | |
233 | 9d0869b6 | bellard | +Bit16u vbe_biosfn_read_video_state_size()
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234 | 9d0869b6 | bellard | +{
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235 | 9d0869b6 | bellard | + return 9 * 2;
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236 | 9d0869b6 | bellard | +}
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237 | 9d0869b6 | bellard | +
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238 | 9d0869b6 | bellard | +void vbe_biosfn_save_video_state(ES, BX)
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239 | 9d0869b6 | bellard | + Bit16u ES; Bit16u BX;
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240 | 9d0869b6 | bellard | +{
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241 | 9d0869b6 | bellard | + Bit16u enable, i;
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242 | 9d0869b6 | bellard | +
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243 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_INDEX,VBE_DISPI_INDEX_ENABLE);
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244 | 9d0869b6 | bellard | + enable = inw(VBE_DISPI_IOPORT_DATA);
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245 | 9d0869b6 | bellard | + write_word(ES, BX, enable);
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246 | 9d0869b6 | bellard | + BX += 2;
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247 | 9d0869b6 | bellard | + if (!(enable & VBE_DISPI_ENABLED))
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248 | 9d0869b6 | bellard | + return;
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249 | 9d0869b6 | bellard | + for(i = VBE_DISPI_INDEX_XRES; i <= VBE_DISPI_INDEX_Y_OFFSET; i++) {
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250 | 9d0869b6 | bellard | + if (i != VBE_DISPI_INDEX_ENABLE) {
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251 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_INDEX, i);
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252 | 9d0869b6 | bellard | + write_word(ES, BX, inw(VBE_DISPI_IOPORT_DATA));
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253 | 9d0869b6 | bellard | + BX += 2;
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254 | 9d0869b6 | bellard | + }
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255 | 9d0869b6 | bellard | + }
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256 | 9d0869b6 | bellard | +}
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257 | 9d0869b6 | bellard | +
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258 | 9d0869b6 | bellard | +
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259 | 9d0869b6 | bellard | +void vbe_biosfn_restore_video_state(ES, BX)
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260 | 9d0869b6 | bellard | + Bit16u ES; Bit16u BX;
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261 | 9d0869b6 | bellard | +{
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262 | 9d0869b6 | bellard | + Bit16u enable, i;
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263 | 9d0869b6 | bellard | +
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264 | 9d0869b6 | bellard | + enable = read_word(ES, BX);
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265 | 9d0869b6 | bellard | + BX += 2;
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266 | 9d0869b6 | bellard | +
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267 | 9d0869b6 | bellard | + if (!(enable & VBE_DISPI_ENABLED)) {
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268 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_INDEX,VBE_DISPI_INDEX_ENABLE);
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269 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_DATA, enable);
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270 | 9d0869b6 | bellard | + } else {
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271 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_INDEX, VBE_DISPI_INDEX_XRES);
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272 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_DATA, read_word(ES, BX));
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273 | 9d0869b6 | bellard | + BX += 2;
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274 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_INDEX, VBE_DISPI_INDEX_YRES);
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275 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_DATA, read_word(ES, BX));
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276 | 9d0869b6 | bellard | + BX += 2;
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277 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_INDEX, VBE_DISPI_INDEX_BPP);
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278 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_DATA, read_word(ES, BX));
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279 | 9d0869b6 | bellard | + BX += 2;
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280 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_INDEX,VBE_DISPI_INDEX_ENABLE);
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281 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_DATA, enable);
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282 | 9d0869b6 | bellard | +
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283 | 9d0869b6 | bellard | + for(i = VBE_DISPI_INDEX_BANK; i <= VBE_DISPI_INDEX_Y_OFFSET; i++) {
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284 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_INDEX, i);
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285 | 9d0869b6 | bellard | + outw(VBE_DISPI_IOPORT_DATA, read_word(ES, BX));
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286 | 9d0869b6 | bellard | + BX += 2;
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287 | 9d0869b6 | bellard | + }
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288 | 9d0869b6 | bellard | + }
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289 | 9d0869b6 | bellard | +}
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290 | 9d0869b6 | bellard | +
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291 | 9d0869b6 | bellard | /** Function 04h - Save/Restore State
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292 | 9d0869b6 | bellard | * |
293 | 9d0869b6 | bellard | * Input: |
294 | 9d0869b6 | bellard | @@ -849,10 +1000,48 @@
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295 | 9d0869b6 | bellard | * BX = Number of 64-byte blocks to hold the state buffer (if DL=00h) |
296 | 9d0869b6 | bellard | * |
297 | 9d0869b6 | bellard | */ |
298 | 9d0869b6 | bellard | -void vbe_biosfn_save_restore_state(AX, DL, CX, ES, BX)
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299 | 9d0869b6 | bellard | +void vbe_biosfn_save_restore_state(AX, CX, DX, ES, BX)
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300 | 9d0869b6 | bellard | +Bit16u *AX; Bit16u CX; Bit16u DX; Bit16u ES; Bit16u *BX;
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301 | 9d0869b6 | bellard | { |
302 | 9d0869b6 | bellard | -}
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303 | 9d0869b6 | bellard | + Bit16u ss=get_SS();
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304 | 9d0869b6 | bellard | + Bit16u result, val;
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305 | 9d0869b6 | bellard | |
306 | 9d0869b6 | bellard | + result = 0x4f;
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307 | 9d0869b6 | bellard | + switch(GET_DL()) {
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308 | 9d0869b6 | bellard | + case 0x00:
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309 | 9d0869b6 | bellard | + val = biosfn_read_video_state_size2(CX);
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310 | 9d0869b6 | bellard | +#ifdef DEBUG
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311 | 9d0869b6 | bellard | + printf("VGA state size=%x\n", val);
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312 | 9d0869b6 | bellard | +#endif
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313 | 9d0869b6 | bellard | + if (CX & 8)
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314 | 9d0869b6 | bellard | + val += vbe_biosfn_read_video_state_size();
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315 | 9d0869b6 | bellard | + write_word(ss, BX, val);
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316 | 9d0869b6 | bellard | + break;
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317 | 9d0869b6 | bellard | + case 0x01:
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318 | 9d0869b6 | bellard | + val = read_word(ss, BX);
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319 | 9d0869b6 | bellard | + val = biosfn_save_video_state(CX, ES, val);
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320 | 9d0869b6 | bellard | +#ifdef DEBUG
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321 | 9d0869b6 | bellard | + printf("VGA save_state offset=%x\n", val);
|
322 | 9d0869b6 | bellard | +#endif
|
323 | 9d0869b6 | bellard | + if (CX & 8)
|
324 | 9d0869b6 | bellard | + vbe_biosfn_save_video_state(ES, val);
|
325 | 9d0869b6 | bellard | + break;
|
326 | 9d0869b6 | bellard | + case 0x02:
|
327 | 9d0869b6 | bellard | + val = read_word(ss, BX);
|
328 | 9d0869b6 | bellard | + val = biosfn_restore_video_state(CX, ES, val);
|
329 | 9d0869b6 | bellard | +#ifdef DEBUG
|
330 | 9d0869b6 | bellard | + printf("VGA restore_state offset=%x\n", val);
|
331 | 9d0869b6 | bellard | +#endif
|
332 | 9d0869b6 | bellard | + if (CX & 8)
|
333 | 9d0869b6 | bellard | + vbe_biosfn_restore_video_state(ES, val);
|
334 | 9d0869b6 | bellard | + break;
|
335 | 9d0869b6 | bellard | + default:
|
336 | 9d0869b6 | bellard | + // function failed
|
337 | 9d0869b6 | bellard | + result = 0x100;
|
338 | 9d0869b6 | bellard | + break;
|
339 | 9d0869b6 | bellard | + }
|
340 | 9d0869b6 | bellard | + write_word(ss, AX, result);
|
341 | 9d0869b6 | bellard | +}
|
342 | 9d0869b6 | bellard | |
343 | 9d0869b6 | bellard | /** Function 05h - Display Window Control
|
344 | 9d0869b6 | bellard | * |
345 | 9d0869b6 | bellard | @@ -1090,7 +1279,7 @@
|
346 | 9d0869b6 | bellard | */ |
347 | 9d0869b6 | bellard | ASM_START |
348 | 9d0869b6 | bellard | vbe_biosfn_return_protected_mode_interface:
|
349 | 9d0869b6 | bellard | - test bx, bx
|
350 | 9d0869b6 | bellard | + test bl, bl
|
351 | 9d0869b6 | bellard | jnz _fail |
352 | 9d0869b6 | bellard | mov di, #0xc000
|
353 | 9d0869b6 | bellard | mov es, di |
354 | 8fa00e0f | bellard | Index: vbe.h
|
355 | 8fa00e0f | bellard | ===================================================================
|
356 | 8fa00e0f | bellard | RCS file: /sources/vgabios/vgabios/vbe.h,v
|
357 | 8fa00e0f | bellard | retrieving revision 1.24
|
358 | 8fa00e0f | bellard | diff -u -w -r1.24 vbe.h
|
359 | 8fa00e0f | bellard | --- vbe.h 9 May 2004 20:31:31 -0000 1.24
|
360 | 9d0869b6 | bellard | +++ vbe.h 14 Jun 2006 00:51:07 -0000
|
361 | 9d0869b6 | bellard | @@ -14,7 +14,7 @@
|
362 | 9d0869b6 | bellard | void vbe_biosfn_return_controller_information(AX, ES, DI);
|
363 | 9d0869b6 | bellard | void vbe_biosfn_return_mode_information(AX, CX, ES, DI);
|
364 | 9d0869b6 | bellard | void vbe_biosfn_set_mode(AX, BX, ES, DI);
|
365 | 9d0869b6 | bellard | -void vbe_biosfn_save_restore_state(AX, DL, CX, ES, BX);
|
366 | 9d0869b6 | bellard | +void vbe_biosfn_save_restore_state(AX, CX, DX, ES, BX);
|
367 | 9d0869b6 | bellard | void vbe_biosfn_set_get_palette_data(AX);
|
368 | 9d0869b6 | bellard | void vbe_biosfn_return_protected_mode_interface(AX);
|
369 | 9d0869b6 | bellard | |
370 | 9d0869b6 | bellard | @@ -151,6 +151,12 @@
|
371 | 9d0869b6 | bellard | Bit8u Reserved[189];
|
372 | 9d0869b6 | bellard | } ModeInfoBlock; |
373 | 9d0869b6 | bellard | |
374 | 9d0869b6 | bellard | +typedef struct ModeInfoListItem
|
375 | 9d0869b6 | bellard | +{
|
376 | 9d0869b6 | bellard | + Bit16u mode;
|
377 | 9d0869b6 | bellard | + ModeInfoBlockCompact info;
|
378 | 9d0869b6 | bellard | +} ModeInfoListItem;
|
379 | 9d0869b6 | bellard | +
|
380 | 9d0869b6 | bellard | // VBE Return Status Info
|
381 | 9d0869b6 | bellard | // AL
|
382 | 9d0869b6 | bellard | #define VBE_RETURN_STATUS_SUPPORTED 0x4F |
383 | 9d0869b6 | bellard | @@ -193,6 +199,10 @@
|
384 | 8fa00e0f | bellard | #define VBE_VESA_MODE_1280X1024X1555 0x119 |
385 | 8fa00e0f | bellard | #define VBE_VESA_MODE_1280X1024X565 0x11A |
386 | 8fa00e0f | bellard | #define VBE_VESA_MODE_1280X1024X888 0x11B |
387 | 8fa00e0f | bellard | +#define VBE_VESA_MODE_1600X1200X8 0x11C
|
388 | 8fa00e0f | bellard | +#define VBE_VESA_MODE_1600X1200X1555 0x11D
|
389 | 8fa00e0f | bellard | +#define VBE_VESA_MODE_1600X1200X565 0x11E
|
390 | 8fa00e0f | bellard | +#define VBE_VESA_MODE_1600X1200X888 0x11F
|
391 | 8fa00e0f | bellard | |
392 | 8fa00e0f | bellard | // BOCHS/PLEX86 'own' mode numbers
|
393 | 8fa00e0f | bellard | #define VBE_OWN_MODE_320X200X8888 0x140 |
394 | 9d0869b6 | bellard | @@ -202,6 +212,12 @@
|
395 | 8fa00e0f | bellard | #define VBE_OWN_MODE_1024X768X8888 0x144 |
396 | 8fa00e0f | bellard | #define VBE_OWN_MODE_1280X1024X8888 0x145 |
397 | 8fa00e0f | bellard | #define VBE_OWN_MODE_320X200X8 0x146 |
398 | 8fa00e0f | bellard | +#define VBE_OWN_MODE_1600X1200X8888 0x147
|
399 | 8fa00e0f | bellard | +#define VBE_OWN_MODE_1152X864X8 0x148
|
400 | 8fa00e0f | bellard | +#define VBE_OWN_MODE_1152X864X1555 0x149
|
401 | 8fa00e0f | bellard | +#define VBE_OWN_MODE_1152X864X565 0x14a
|
402 | 8fa00e0f | bellard | +#define VBE_OWN_MODE_1152X864X888 0x14b
|
403 | 8fa00e0f | bellard | +#define VBE_OWN_MODE_1152X864X8888 0x14c
|
404 | 8fa00e0f | bellard | |
405 | 8fa00e0f | bellard | #define VBE_VESA_MODE_END_OF_LIST 0xFFFF |
406 | 8fa00e0f | bellard | |
407 | 9d0869b6 | bellard | @@ -259,7 +275,7 @@
|
408 | 8fa00e0f | bellard | // like 0xE0000000
|
409 | 8fa00e0f | bellard | |
410 | 8fa00e0f | bellard | |
411 | 8fa00e0f | bellard | - #define VBE_DISPI_TOTAL_VIDEO_MEMORY_MB 4
|
412 | 8fa00e0f | bellard | + #define VBE_DISPI_TOTAL_VIDEO_MEMORY_MB 8
|
413 | 8fa00e0f | bellard | |
414 | 8fa00e0f | bellard | #define VBE_DISPI_BANK_ADDRESS 0xA0000 |
415 | 8fa00e0f | bellard | #define VBE_DISPI_BANK_SIZE_KB 64 |
416 | 9d0869b6 | bellard | Index: vgabios.c
|
417 | 8fa00e0f | bellard | ===================================================================
|
418 | 9d0869b6 | bellard | RCS file: /sources/vgabios/vgabios/vgabios.c,v
|
419 | 9d0869b6 | bellard | retrieving revision 1.64
|
420 | 9d0869b6 | bellard | diff -u -w -r1.64 vgabios.c
|
421 | 9d0869b6 | bellard | --- vgabios.c 25 Mar 2006 10:19:16 -0000 1.64
|
422 | 9d0869b6 | bellard | +++ vgabios.c 14 Jun 2006 00:51:07 -0000
|
423 | 9d0869b6 | bellard | @@ -109,8 +109,8 @@
|
424 | 9d0869b6 | bellard | static void biosfn_write_string(); |
425 | 9d0869b6 | bellard | static void biosfn_read_state_info(); |
426 | 9d0869b6 | bellard | static void biosfn_read_video_state_size(); |
427 | 9d0869b6 | bellard | -static void biosfn_save_video_state();
|
428 | 9d0869b6 | bellard | -static void biosfn_restore_video_state();
|
429 | 9d0869b6 | bellard | +static Bit16u biosfn_save_video_state();
|
430 | 9d0869b6 | bellard | +static Bit16u biosfn_restore_video_state();
|
431 | 9d0869b6 | bellard | extern Bit8u video_save_pointer_table[];
|
432 | 9d0869b6 | bellard | |
433 | 9d0869b6 | bellard | // This is for compiling with gcc2 and gcc3
|
434 | 9d0869b6 | bellard | @@ -748,12 +748,7 @@
|
435 | 9d0869b6 | bellard | vbe_biosfn_set_mode(&AX,BX,ES,DI); |
436 | 9d0869b6 | bellard | break;
|
437 | 9d0869b6 | bellard | case 0x04: |
438 | 9d0869b6 | bellard | - //FIXME
|
439 | 9d0869b6 | bellard | -#ifdef DEBUG
|
440 | 9d0869b6 | bellard | - unimplemented();
|
441 | 9d0869b6 | bellard | -#endif
|
442 | 9d0869b6 | bellard | - // function failed
|
443 | 9d0869b6 | bellard | - AX=0x100;
|
444 | 9d0869b6 | bellard | + vbe_biosfn_save_restore_state(&AX, CX, DX, ES, &BX);
|
445 | 9d0869b6 | bellard | break;
|
446 | 9d0869b6 | bellard | case 0x09: |
447 | 9d0869b6 | bellard | //FIXME
|
448 | 9d0869b6 | bellard | @@ -3138,23 +3133,215 @@
|
449 | 9d0869b6 | bellard | } |
450 | 8fa00e0f | bellard | |
451 | 9d0869b6 | bellard | // --------------------------------------------------------------------------------------------
|
452 | 9d0869b6 | bellard | -static void biosfn_read_video_state_size (CX,ES,BX) Bit16u CX;Bit16u ES;Bit16u BX;
|
453 | 9d0869b6 | bellard | +// --------------------------------------------------------------------------------------------
|
454 | 9d0869b6 | bellard | +static Bit16u biosfn_read_video_state_size2 (CX)
|
455 | 9d0869b6 | bellard | + Bit16u CX;
|
456 | 8fa00e0f | bellard | { |
457 | 9d0869b6 | bellard | -#ifdef DEBUG
|
458 | 9d0869b6 | bellard | - unimplemented();
|
459 | 9d0869b6 | bellard | -#endif
|
460 | 9d0869b6 | bellard | + Bit16u size;
|
461 | 9d0869b6 | bellard | + size = 0;
|
462 | 9d0869b6 | bellard | + if (CX & 1) {
|
463 | 9d0869b6 | bellard | + size += 0x46;
|
464 | 9d0869b6 | bellard | + }
|
465 | 9d0869b6 | bellard | + if (CX & 2) {
|
466 | 9d0869b6 | bellard | + size += (5 + 8 + 5) * 2 + 6;
|
467 | 9d0869b6 | bellard | + }
|
468 | 9d0869b6 | bellard | + if (CX & 4) {
|
469 | 9d0869b6 | bellard | + size += 3 + 256 * 3 + 1;
|
470 | 9d0869b6 | bellard | } |
471 | 9d0869b6 | bellard | -static void biosfn_save_video_state (CX,ES,BX) Bit16u CX;Bit16u ES;Bit16u BX;
|
472 | 9d0869b6 | bellard | + return size;
|
473 | 9d0869b6 | bellard | +}
|
474 | 9d0869b6 | bellard | +
|
475 | 9d0869b6 | bellard | +static void biosfn_read_video_state_size (CX, BX)
|
476 | 9d0869b6 | bellard | + Bit16u CX; Bit16u *BX;
|
477 | 9d0869b6 | bellard | { |
478 | 9d0869b6 | bellard | -#ifdef DEBUG
|
479 | 9d0869b6 | bellard | - unimplemented();
|
480 | 8fa00e0f | bellard | -#endif
|
481 | 9d0869b6 | bellard | + Bit16u ss=get_SS();
|
482 | 9d0869b6 | bellard | + write_word(ss, BX, biosfn_read_video_state_size2(CX));
|
483 | 9d0869b6 | bellard | } |
484 | 9d0869b6 | bellard | -static void biosfn_restore_video_state (CX,ES,BX) Bit16u CX;Bit16u ES;Bit16u BX;
|
485 | 9d0869b6 | bellard | +
|
486 | 9d0869b6 | bellard | +static Bit16u biosfn_save_video_state (CX,ES,BX)
|
487 | 9d0869b6 | bellard | + Bit16u CX;Bit16u ES;Bit16u BX;
|
488 | 9d0869b6 | bellard | { |
489 | 9d0869b6 | bellard | -#ifdef DEBUG
|
490 | 9d0869b6 | bellard | - unimplemented();
|
491 | 8fa00e0f | bellard | -#endif
|
492 | 9d0869b6 | bellard | + Bit16u i, v, crtc_addr, ar_index;
|
493 | 9d0869b6 | bellard | +
|
494 | 9d0869b6 | bellard | + crtc_addr = read_word(BIOSMEM_SEG, BIOSMEM_CRTC_ADDRESS);
|
495 | 9d0869b6 | bellard | + if (CX & 1) {
|
496 | 9d0869b6 | bellard | + write_byte(ES, BX, inb(VGAREG_SEQU_ADDRESS)); BX++;
|
497 | 9d0869b6 | bellard | + write_byte(ES, BX, inb(crtc_addr)); BX++;
|
498 | 9d0869b6 | bellard | + write_byte(ES, BX, inb(VGAREG_GRDC_ADDRESS)); BX++;
|
499 | 9d0869b6 | bellard | + inb(VGAREG_ACTL_RESET);
|
500 | 9d0869b6 | bellard | + ar_index = inb(VGAREG_ACTL_ADDRESS);
|
501 | 9d0869b6 | bellard | + write_byte(ES, BX, ar_index); BX++;
|
502 | 9d0869b6 | bellard | + write_byte(ES, BX, inb(VGAREG_READ_FEATURE_CTL)); BX++;
|
503 | 9d0869b6 | bellard | +
|
504 | 9d0869b6 | bellard | + for(i=1;i<=4;i++){
|
505 | 9d0869b6 | bellard | + outb(VGAREG_SEQU_ADDRESS, i);
|
506 | 9d0869b6 | bellard | + write_byte(ES, BX, inb(VGAREG_SEQU_DATA)); BX++;
|
507 | 9d0869b6 | bellard | + }
|
508 | 9d0869b6 | bellard | + outb(VGAREG_SEQU_ADDRESS, 0);
|
509 | 9d0869b6 | bellard | + write_byte(ES, BX, inb(VGAREG_SEQU_DATA)); BX++;
|
510 | 9d0869b6 | bellard | +
|
511 | 9d0869b6 | bellard | + for(i=0;i<=0x18;i++) {
|
512 | 9d0869b6 | bellard | + outb(crtc_addr,i);
|
513 | 9d0869b6 | bellard | + write_byte(ES, BX, inb(crtc_addr+1)); BX++;
|
514 | 9d0869b6 | bellard | + }
|
515 | 9d0869b6 | bellard | +
|
516 | 9d0869b6 | bellard | + for(i=0;i<=0x13;i++) {
|
517 | 9d0869b6 | bellard | + inb(VGAREG_ACTL_RESET);
|
518 | 9d0869b6 | bellard | + outb(VGAREG_ACTL_ADDRESS, i | (ar_index & 0x20));
|
519 | 9d0869b6 | bellard | + write_byte(ES, BX, inb(VGAREG_ACTL_READ_DATA)); BX++;
|
520 | 9d0869b6 | bellard | + }
|
521 | 9d0869b6 | bellard | + inb(VGAREG_ACTL_RESET);
|
522 | 9d0869b6 | bellard | +
|
523 | 9d0869b6 | bellard | + for(i=0;i<=8;i++) {
|
524 | 9d0869b6 | bellard | + outb(VGAREG_GRDC_ADDRESS,i);
|
525 | 9d0869b6 | bellard | + write_byte(ES, BX, inb(VGAREG_GRDC_DATA)); BX++;
|
526 | 9d0869b6 | bellard | + }
|
527 | 9d0869b6 | bellard | +
|
528 | 9d0869b6 | bellard | + write_word(ES, BX, crtc_addr); BX+= 2;
|
529 | 9d0869b6 | bellard | +
|
530 | 9d0869b6 | bellard | + /* XXX: read plane latches */
|
531 | 9d0869b6 | bellard | + write_byte(ES, BX, 0); BX++;
|
532 | 9d0869b6 | bellard | + write_byte(ES, BX, 0); BX++;
|
533 | 9d0869b6 | bellard | + write_byte(ES, BX, 0); BX++;
|
534 | 9d0869b6 | bellard | + write_byte(ES, BX, 0); BX++;
|
535 | 9d0869b6 | bellard | + }
|
536 | 9d0869b6 | bellard | + if (CX & 2) {
|
537 | 9d0869b6 | bellard | + write_byte(ES, BX, read_byte(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE)); BX++;
|
538 | 9d0869b6 | bellard | + write_word(ES, BX, read_word(BIOSMEM_SEG,BIOSMEM_NB_COLS)); BX += 2;
|
539 | 9d0869b6 | bellard | + write_word(ES, BX, read_word(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE)); BX += 2;
|
540 | 9d0869b6 | bellard | + write_word(ES, BX, read_word(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS)); BX += 2;
|
541 | 9d0869b6 | bellard | + write_byte(ES, BX, read_byte(BIOSMEM_SEG,BIOSMEM_NB_ROWS)); BX++;
|
542 | 9d0869b6 | bellard | + write_word(ES, BX, read_word(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT)); BX += 2;
|
543 | 9d0869b6 | bellard | + write_byte(ES, BX, read_byte(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL)); BX++;
|
544 | 9d0869b6 | bellard | + write_byte(ES, BX, read_byte(BIOSMEM_SEG,BIOSMEM_SWITCHES)); BX++;
|
545 | 9d0869b6 | bellard | + write_byte(ES, BX, read_byte(BIOSMEM_SEG,BIOSMEM_MODESET_CTL)); BX++;
|
546 | 9d0869b6 | bellard | + write_word(ES, BX, read_word(BIOSMEM_SEG,BIOSMEM_CURSOR_TYPE)); BX += 2;
|
547 | 9d0869b6 | bellard | + for(i=0;i<8;i++) {
|
548 | 9d0869b6 | bellard | + write_word(ES, BX, read_word(BIOSMEM_SEG, BIOSMEM_CURSOR_POS+2*i));
|
549 | 9d0869b6 | bellard | + BX += 2;
|
550 | 9d0869b6 | bellard | + }
|
551 | 9d0869b6 | bellard | + write_word(ES, BX, read_word(BIOSMEM_SEG,BIOSMEM_CURRENT_START)); BX += 2;
|
552 | 9d0869b6 | bellard | + write_byte(ES, BX, read_byte(BIOSMEM_SEG,BIOSMEM_CURRENT_PAGE)); BX++;
|
553 | 9d0869b6 | bellard | + /* current font */
|
554 | 9d0869b6 | bellard | + write_word(ES, BX, read_word(0, 0x1f * 4)); BX += 2;
|
555 | 9d0869b6 | bellard | + write_word(ES, BX, read_word(0, 0x1f * 4 + 2)); BX += 2;
|
556 | 9d0869b6 | bellard | + write_word(ES, BX, read_word(0, 0x43 * 4)); BX += 2;
|
557 | 9d0869b6 | bellard | + write_word(ES, BX, read_word(0, 0x43 * 4 + 2)); BX += 2;
|
558 | 9d0869b6 | bellard | + }
|
559 | 9d0869b6 | bellard | + if (CX & 4) {
|
560 | 9d0869b6 | bellard | + /* XXX: check this */
|
561 | 9d0869b6 | bellard | + write_byte(ES, BX, inb(VGAREG_DAC_STATE)); BX++; /* read/write mode dac */
|
562 | 9d0869b6 | bellard | + write_byte(ES, BX, inb(VGAREG_DAC_WRITE_ADDRESS)); BX++; /* pix address */
|
563 | 9d0869b6 | bellard | + write_byte(ES, BX, inb(VGAREG_PEL_MASK)); BX++;
|
564 | 9d0869b6 | bellard | + // Set the whole dac always, from 0
|
565 | 9d0869b6 | bellard | + outb(VGAREG_DAC_WRITE_ADDRESS,0x00);
|
566 | 9d0869b6 | bellard | + for(i=0;i<256*3;i++) {
|
567 | 9d0869b6 | bellard | + write_byte(ES, BX, inb(VGAREG_DAC_DATA)); BX++;
|
568 | 9d0869b6 | bellard | + }
|
569 | 9d0869b6 | bellard | + write_byte(ES, BX, 0); BX++; /* color select register */
|
570 | 9d0869b6 | bellard | + }
|
571 | 9d0869b6 | bellard | + return BX;
|
572 | 9d0869b6 | bellard | +}
|
573 | 9d0869b6 | bellard | +
|
574 | 9d0869b6 | bellard | +static Bit16u biosfn_restore_video_state (CX,ES,BX)
|
575 | 9d0869b6 | bellard | + Bit16u CX;Bit16u ES;Bit16u BX;
|
576 | 9d0869b6 | bellard | +{
|
577 | 9d0869b6 | bellard | + Bit16u i, crtc_addr, v, addr1, ar_index;
|
578 | 9d0869b6 | bellard | +
|
579 | 9d0869b6 | bellard | + if (CX & 1) {
|
580 | 9d0869b6 | bellard | + // Reset Attribute Ctl flip-flop
|
581 | 9d0869b6 | bellard | + inb(VGAREG_ACTL_RESET);
|
582 | 9d0869b6 | bellard | +
|
583 | 9d0869b6 | bellard | + crtc_addr = read_word(ES, BX + 0x40);
|
584 | 9d0869b6 | bellard | + addr1 = BX;
|
585 | 9d0869b6 | bellard | + BX += 5;
|
586 | 9d0869b6 | bellard | +
|
587 | 9d0869b6 | bellard | + for(i=1;i<=4;i++){
|
588 | 9d0869b6 | bellard | + outb(VGAREG_SEQU_ADDRESS, i);
|
589 | 9d0869b6 | bellard | + outb(VGAREG_SEQU_DATA, read_byte(ES, BX)); BX++;
|
590 | 9d0869b6 | bellard | + }
|
591 | 9d0869b6 | bellard | + outb(VGAREG_SEQU_ADDRESS, 0);
|
592 | 9d0869b6 | bellard | + outb(VGAREG_SEQU_DATA, read_byte(ES, BX)); BX++;
|
593 | 9d0869b6 | bellard | +
|
594 | 9d0869b6 | bellard | + // Disable CRTC write protection
|
595 | 9d0869b6 | bellard | + outw(crtc_addr,0x0011);
|
596 | 9d0869b6 | bellard | + // Set CRTC regs
|
597 | 9d0869b6 | bellard | + for(i=0;i<=0x18;i++) {
|
598 | 9d0869b6 | bellard | + if (i != 0x11) {
|
599 | 9d0869b6 | bellard | + outb(crtc_addr,i);
|
600 | 9d0869b6 | bellard | + outb(crtc_addr+1, read_byte(ES, BX));
|
601 | 9d0869b6 | bellard | + }
|
602 | 9d0869b6 | bellard | + BX++;
|
603 | 9d0869b6 | bellard | + }
|
604 | 9d0869b6 | bellard | + // select crtc base address
|
605 | 9d0869b6 | bellard | + v = inb(VGAREG_READ_MISC_OUTPUT) & ~0x01;
|
606 | 9d0869b6 | bellard | + if (crtc_addr = 0x3d4)
|
607 | 9d0869b6 | bellard | + v |= 0x01;
|
608 | 9d0869b6 | bellard | + outb(VGAREG_WRITE_MISC_OUTPUT, v);
|
609 | 9d0869b6 | bellard | +
|
610 | 9d0869b6 | bellard | + // enable write protection if needed
|
611 | 9d0869b6 | bellard | + outb(crtc_addr, 0x11);
|
612 | 9d0869b6 | bellard | + outb(crtc_addr+1, read_byte(ES, BX - 0x18 + 0x11));
|
613 | 9d0869b6 | bellard | +
|
614 | 9d0869b6 | bellard | + // Set Attribute Ctl
|
615 | 9d0869b6 | bellard | + ar_index = read_byte(ES, addr1 + 0x03);
|
616 | 9d0869b6 | bellard | + inb(VGAREG_ACTL_RESET);
|
617 | 9d0869b6 | bellard | + for(i=0;i<=0x13;i++) {
|
618 | 9d0869b6 | bellard | + outb(VGAREG_ACTL_ADDRESS, i | (ar_index & 0x20));
|
619 | 9d0869b6 | bellard | + outb(VGAREG_ACTL_WRITE_DATA, read_byte(ES, BX)); BX++;
|
620 | 9d0869b6 | bellard | + }
|
621 | 9d0869b6 | bellard | + outb(VGAREG_ACTL_ADDRESS, ar_index);
|
622 | 9d0869b6 | bellard | + inb(VGAREG_ACTL_RESET);
|
623 | 9d0869b6 | bellard | +
|
624 | 9d0869b6 | bellard | + for(i=0;i<=8;i++) {
|
625 | 9d0869b6 | bellard | + outb(VGAREG_GRDC_ADDRESS,i);
|
626 | 9d0869b6 | bellard | + outb(VGAREG_GRDC_DATA, read_byte(ES, BX)); BX++;
|
627 | 9d0869b6 | bellard | + }
|
628 | 9d0869b6 | bellard | + BX += 2; /* crtc_addr */
|
629 | 9d0869b6 | bellard | + BX += 4; /* plane latches */
|
630 | 9d0869b6 | bellard | +
|
631 | 9d0869b6 | bellard | + outb(VGAREG_SEQU_ADDRESS, read_byte(ES, addr1)); addr1++;
|
632 | 9d0869b6 | bellard | + outb(crtc_addr, read_byte(ES, addr1)); addr1++;
|
633 | 9d0869b6 | bellard | + outb(VGAREG_GRDC_ADDRESS, read_byte(ES, addr1)); addr1++;
|
634 | 9d0869b6 | bellard | + addr1++;
|
635 | 9d0869b6 | bellard | + outb(crtc_addr - 0x4 + 0xa, read_byte(ES, addr1)); addr1++;
|
636 | 9d0869b6 | bellard | + }
|
637 | 9d0869b6 | bellard | + if (CX & 2) {
|
638 | 9d0869b6 | bellard | + write_byte(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE, read_byte(ES, BX)); BX++;
|
639 | 9d0869b6 | bellard | + write_word(BIOSMEM_SEG,BIOSMEM_NB_COLS, read_word(ES, BX)); BX += 2;
|
640 | 9d0869b6 | bellard | + write_word(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE, read_word(ES, BX)); BX += 2;
|
641 | 9d0869b6 | bellard | + write_word(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS, read_word(ES, BX)); BX += 2;
|
642 | 9d0869b6 | bellard | + write_byte(BIOSMEM_SEG,BIOSMEM_NB_ROWS, read_byte(ES, BX)); BX++;
|
643 | 9d0869b6 | bellard | + write_word(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT, read_word(ES, BX)); BX += 2;
|
644 | 9d0869b6 | bellard | + write_byte(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL, read_byte(ES, BX)); BX++;
|
645 | 9d0869b6 | bellard | + write_byte(BIOSMEM_SEG,BIOSMEM_SWITCHES, read_byte(ES, BX)); BX++;
|
646 | 9d0869b6 | bellard | + write_byte(BIOSMEM_SEG,BIOSMEM_MODESET_CTL, read_byte(ES, BX)); BX++;
|
647 | 9d0869b6 | bellard | + write_word(BIOSMEM_SEG,BIOSMEM_CURSOR_TYPE, read_word(ES, BX)); BX += 2;
|
648 | 9d0869b6 | bellard | + for(i=0;i<8;i++) {
|
649 | 9d0869b6 | bellard | + write_word(BIOSMEM_SEG, BIOSMEM_CURSOR_POS+2*i, read_word(ES, BX));
|
650 | 9d0869b6 | bellard | + BX += 2;
|
651 | 9d0869b6 | bellard | + }
|
652 | 9d0869b6 | bellard | + write_word(BIOSMEM_SEG,BIOSMEM_CURRENT_START, read_word(ES, BX)); BX += 2;
|
653 | 9d0869b6 | bellard | + write_byte(BIOSMEM_SEG,BIOSMEM_CURRENT_PAGE, read_byte(ES, BX)); BX++;
|
654 | 9d0869b6 | bellard | + /* current font */
|
655 | 9d0869b6 | bellard | + write_word(0, 0x1f * 4, read_word(ES, BX)); BX += 2;
|
656 | 9d0869b6 | bellard | + write_word(0, 0x1f * 4 + 2, read_word(ES, BX)); BX += 2;
|
657 | 9d0869b6 | bellard | + write_word(0, 0x43 * 4, read_word(ES, BX)); BX += 2;
|
658 | 9d0869b6 | bellard | + write_word(0, 0x43 * 4 + 2, read_word(ES, BX)); BX += 2;
|
659 | 9d0869b6 | bellard | + }
|
660 | 9d0869b6 | bellard | + if (CX & 4) {
|
661 | 9d0869b6 | bellard | + BX++;
|
662 | 9d0869b6 | bellard | + v = read_byte(ES, BX); BX++;
|
663 | 9d0869b6 | bellard | + outb(VGAREG_PEL_MASK, read_byte(ES, BX)); BX++;
|
664 | 9d0869b6 | bellard | + // Set the whole dac always, from 0
|
665 | 9d0869b6 | bellard | + outb(VGAREG_DAC_WRITE_ADDRESS,0x00);
|
666 | 9d0869b6 | bellard | + for(i=0;i<256*3;i++) {
|
667 | 9d0869b6 | bellard | + outb(VGAREG_DAC_DATA, read_byte(ES, BX)); BX++;
|
668 | 9d0869b6 | bellard | + }
|
669 | 9d0869b6 | bellard | + BX++;
|
670 | 9d0869b6 | bellard | + outb(VGAREG_DAC_WRITE_ADDRESS, v);
|
671 | 9d0869b6 | bellard | + }
|
672 | 9d0869b6 | bellard | + return BX;
|
673 | 9d0869b6 | bellard | } |
674 | 8fa00e0f | bellard | |
675 | 9d0869b6 | bellard | // ============================================================================================
|
676 | 9d0869b6 | bellard | diff -u -w vbetables-gen.c
|
677 | 9d0869b6 | bellard | --- vbetables-gen.c 1970-01-01 01:00:00.000000000 +0100
|
678 | 9d0869b6 | bellard | +++ vbetables-gen.c 2006-06-14 00:52:18.000000000 +0200
|
679 | 9d0869b6 | bellard | @@ -0,0 +1,217 @@
|
680 | 9d0869b6 | bellard | +/* Generate the VGABIOS VBE Tables */
|
681 | 9d0869b6 | bellard | +#include <stdlib.h>
|
682 | 9d0869b6 | bellard | +#include <stdio.h>
|
683 | 9d0869b6 | bellard | +
|
684 | 9d0869b6 | bellard | +typedef struct {
|
685 | 9d0869b6 | bellard | + int width;
|
686 | 9d0869b6 | bellard | + int height;
|
687 | 9d0869b6 | bellard | + int depth;
|
688 | 9d0869b6 | bellard | + int mode;
|
689 | 9d0869b6 | bellard | +} ModeInfo;
|
690 | 9d0869b6 | bellard | +
|
691 | 9d0869b6 | bellard | +ModeInfo modes[] = {
|
692 | 9d0869b6 | bellard | + /* standard VESA modes */
|
693 | 9d0869b6 | bellard | +{ 640, 400, 8 , 0x100},
|
694 | 9d0869b6 | bellard | +{ 640, 480, 8 , 0x101},
|
695 | 9d0869b6 | bellard | +{ 800, 600, 4 , 0x102},
|
696 | 9d0869b6 | bellard | +{ 800, 600, 8 , 0x103},
|
697 | 9d0869b6 | bellard | + //{ 1024, 768, 4 , 0x104},
|
698 | 9d0869b6 | bellard | +{ 1024, 768, 8 , 0x105},
|
699 | 9d0869b6 | bellard | + //{ 1280, 1024, 4 , 0x106},
|
700 | 9d0869b6 | bellard | +{ 1280, 1024, 8 , 0x107},
|
701 | 9d0869b6 | bellard | +{ 320, 200, 15 , 0x10D},
|
702 | 9d0869b6 | bellard | +{ 320, 200, 16 , 0x10E},
|
703 | 9d0869b6 | bellard | +{ 320, 200, 24 , 0x10F},
|
704 | 9d0869b6 | bellard | +{ 640, 480, 15 , 0x110},
|
705 | 9d0869b6 | bellard | +{ 640, 480, 16 , 0x111},
|
706 | 9d0869b6 | bellard | +{ 640, 480, 24 , 0x112},
|
707 | 9d0869b6 | bellard | +{ 800, 600, 15 , 0x113},
|
708 | 9d0869b6 | bellard | +{ 800, 600, 16 , 0x114},
|
709 | 9d0869b6 | bellard | +{ 800, 600, 24 , 0x115},
|
710 | 9d0869b6 | bellard | +{ 1024, 768, 15 , 0x116},
|
711 | 9d0869b6 | bellard | +{ 1024, 768, 16 , 0x117},
|
712 | 9d0869b6 | bellard | +{ 1024, 768, 24 , 0x118},
|
713 | 9d0869b6 | bellard | +{ 1280, 1024, 15 , 0x119},
|
714 | 9d0869b6 | bellard | +{ 1280, 1024, 16 , 0x11A},
|
715 | 9d0869b6 | bellard | +{ 1280, 1024, 24 , 0x11B},
|
716 | 9d0869b6 | bellard | +{ 1600, 1200, 8 , 0x11C},
|
717 | 9d0869b6 | bellard | +{ 1600, 1200, 15 , 0x11D},
|
718 | 9d0869b6 | bellard | +{ 1600, 1200, 16 , 0x11E},
|
719 | 9d0869b6 | bellard | +{ 1600, 1200, 24 , 0x11F},
|
720 | 9d0869b6 | bellard | +
|
721 | 9d0869b6 | bellard | + /* BOCHS/PLE, 86 'own' mode numbers */
|
722 | 9d0869b6 | bellard | +{ 320, 200, 32 , 0x140},
|
723 | 9d0869b6 | bellard | +{ 640, 400, 32 , 0x141},
|
724 | 9d0869b6 | bellard | +{ 640, 480, 32 , 0x142},
|
725 | 9d0869b6 | bellard | +{ 800, 600, 32 , 0x143},
|
726 | 9d0869b6 | bellard | +{ 1024, 768, 32 , 0x144},
|
727 | 9d0869b6 | bellard | +{ 1280, 1024, 32 , 0x145},
|
728 | 9d0869b6 | bellard | +{ 320, 200, 8 , 0x146},
|
729 | 9d0869b6 | bellard | +{ 1600, 1200, 32 , 0x147},
|
730 | 9d0869b6 | bellard | +{ 1152, 864, 8 , 0x148},
|
731 | 9d0869b6 | bellard | +{ 1152, 864, 15 , 0x149},
|
732 | 9d0869b6 | bellard | +{ 1152, 864, 16 , 0x14a},
|
733 | 9d0869b6 | bellard | +{ 1152, 864, 24 , 0x14b},
|
734 | 9d0869b6 | bellard | +{ 1152, 864, 32 , 0x14c},
|
735 | 9d0869b6 | bellard | +{ 0, },
|
736 | 9d0869b6 | bellard | +};
|
737 | 9d0869b6 | bellard | +
|
738 | 9d0869b6 | bellard | +int main(int argc, char **argv)
|
739 | 9d0869b6 | bellard | +{
|
740 | 9d0869b6 | bellard | + const ModeInfo *pm;
|
741 | 9d0869b6 | bellard | + int pitch, r_size, r_pos, g_size, g_pos, b_size, b_pos, a_size, a_pos;
|
742 | 9d0869b6 | bellard | + const char *str;
|
743 | 9d0869b6 | bellard | +
|
744 | 9d0869b6 | bellard | + printf("/* THIS FILE IS AUTOMATICALLY GENERATED - DO NOT EDIT */\n");
|
745 | 9d0869b6 | bellard | + printf("static ModeInfoListItem mode_info_list[]=\n");
|
746 | 9d0869b6 | bellard | + printf("{\n");
|
747 | 9d0869b6 | bellard | + for(pm = modes; pm->mode != 0; pm++) {
|
748 | 9d0869b6 | bellard | + printf("{ 0x%04x, /* %dx%dx%d */\n",
|
749 | 9d0869b6 | bellard | + pm->mode, pm->width, pm->height, pm->depth);
|
750 | 9d0869b6 | bellard | + printf("{ /*Bit16u ModeAttributes*/ %s,\n",
|
751 | 9d0869b6 | bellard | + "VBE_MODE_ATTRIBUTE_SUPPORTED | "
|
752 | 9d0869b6 | bellard | + "VBE_MODE_ATTRIBUTE_EXTENDED_INFORMATION_AVAILABLE | "
|
753 | 9d0869b6 | bellard | + "VBE_MODE_ATTRIBUTE_COLOR_MODE | "
|
754 | 9d0869b6 | bellard | + "VBE_MODE_ATTRIBUTE_LINEAR_FRAME_BUFFER_MODE | "
|
755 | 9d0869b6 | bellard | + "VBE_MODE_ATTRIBUTE_GRAPHICS_MODE");
|
756 | 9d0869b6 | bellard | +
|
757 | 9d0869b6 | bellard | + printf("/*Bit8u WinAAttributes*/ %s,\n",
|
758 | 9d0869b6 | bellard | + "VBE_WINDOW_ATTRIBUTE_RELOCATABLE | "
|
759 | 9d0869b6 | bellard | + "VBE_WINDOW_ATTRIBUTE_READABLE | "
|
760 | 9d0869b6 | bellard | + "VBE_WINDOW_ATTRIBUTE_WRITEABLE");
|
761 | 9d0869b6 | bellard | +
|
762 | 9d0869b6 | bellard | + printf("/*Bit8u WinBAttributes*/ %d,\n", 0);
|
763 | 9d0869b6 | bellard | +
|
764 | 9d0869b6 | bellard | + printf("/*Bit16u WinGranularity*/ %s,\n", "VBE_DISPI_BANK_SIZE_KB");
|
765 | 9d0869b6 | bellard | +
|
766 | 9d0869b6 | bellard | + printf("/*Bit16u WinSize*/ %s,\n", "VBE_DISPI_BANK_SIZE_KB");
|
767 | 9d0869b6 | bellard | +
|
768 | 9d0869b6 | bellard | + printf("/*Bit16u WinASegment*/ %s,\n", "VGAMEM_GRAPH");
|
769 | 9d0869b6 | bellard | +
|
770 | 9d0869b6 | bellard | + printf("/*Bit16u WinBSegment*/ 0x%04x,\n", 0);
|
771 | 9d0869b6 | bellard | +
|
772 | 9d0869b6 | bellard | + printf("/*Bit32u WinFuncPtr*/ %d,\n", 0);
|
773 | 9d0869b6 | bellard | +
|
774 | 9d0869b6 | bellard | + if (pm->depth == 4)
|
775 | 9d0869b6 | bellard | + pitch = (pm->width + 7) / 8;
|
776 | 9d0869b6 | bellard | + else
|
777 | 9d0869b6 | bellard | + pitch = pm->width * ((pm->depth + 7) / 8);
|
778 | 9d0869b6 | bellard | + printf("/*Bit16u BytesPerScanLine*/ %d,\n", pitch);
|
779 | 9d0869b6 | bellard | +
|
780 | 9d0869b6 | bellard | + // Mandatory information for VBE 1.2 and above
|
781 | 9d0869b6 | bellard | + printf("/*Bit16u XResolution*/ %d,\n", pm->width);
|
782 | 9d0869b6 | bellard | + printf("/*Bit16u YResolution*/ %d,\n", pm->height);
|
783 | 9d0869b6 | bellard | + printf("/*Bit8u XCharSize*/ %d,\n", 8);
|
784 | 9d0869b6 | bellard | + printf("/*Bit8u YCharSize*/ %d,\n", 16);
|
785 | 9d0869b6 | bellard | + if (pm->depth == 4) {
|
786 | 9d0869b6 | bellard | + printf("/*Bit8u NumberOfPlanes*/ %d,\n", 4);
|
787 | 9d0869b6 | bellard | + printf("/*Bit8u BitsPerPixel*/ %d,\n", pm->depth);
|
788 | 9d0869b6 | bellard | + } else {
|
789 | 9d0869b6 | bellard | + printf("/*Bit8u NumberOfPlanes*/ %d,\n", 1);
|
790 | 9d0869b6 | bellard | + printf("/*Bit8u BitsPerPixel*/ %d,\n", pm->depth);
|
791 | 9d0869b6 | bellard | + }
|
792 | 9d0869b6 | bellard | + printf("/*Bit8u NumberOfBanks*/ %d,\n",
|
793 | 9d0869b6 | bellard | + (pm->height * pitch + 65535) / 65536);
|
794 | 9d0869b6 | bellard | +
|
795 | 9d0869b6 | bellard | + if (pm->depth == 4)
|
796 | 9d0869b6 | bellard | + str = "VBE_MEMORYMODEL_PLANAR";
|
797 | 9d0869b6 | bellard | + else if (pm->depth == 8)
|
798 | 9d0869b6 | bellard | + str = "VBE_MEMORYMODEL_PACKED_PIXEL";
|
799 | 9d0869b6 | bellard | + else
|
800 | 9d0869b6 | bellard | + str = "VBE_MEMORYMODEL_DIRECT_COLOR";
|
801 | 9d0869b6 | bellard | + printf("/*Bit8u MemoryModel*/ %s,\n", str);
|
802 | 9d0869b6 | bellard | + printf("/*Bit8u BankSize*/ %d,\n", 0);
|
803 | 9d0869b6 | bellard | + /* XXX: check */
|
804 | 9d0869b6 | bellard | + printf("/*Bit8u NumberOfImagePages*/ %d,\n", 0);
|
805 | 9d0869b6 | bellard | + printf("/*Bit8u Reserved_page*/ %d,\n", 0);
|
806 | 9d0869b6 | bellard | +
|
807 | 9d0869b6 | bellard | + // Direct Color fields (required for direct/6 and YUV/7 memory models)
|
808 | 9d0869b6 | bellard | + switch(pm->depth) {
|
809 | 9d0869b6 | bellard | + case 15:
|
810 | 9d0869b6 | bellard | + r_size = 5;
|
811 | 9d0869b6 | bellard | + r_pos = 10;
|
812 | 9d0869b6 | bellard | + g_size = 5;
|
813 | 9d0869b6 | bellard | + g_pos = 5;
|
814 | 9d0869b6 | bellard | + b_size = 5;
|
815 | 9d0869b6 | bellard | + b_pos = 0;
|
816 | 9d0869b6 | bellard | + a_size = 1;
|
817 | 9d0869b6 | bellard | + a_pos = 15;
|
818 | 9d0869b6 | bellard | + break;
|
819 | 9d0869b6 | bellard | + case 16:
|
820 | 9d0869b6 | bellard | + r_size = 5;
|
821 | 9d0869b6 | bellard | + r_pos = 11;
|
822 | 9d0869b6 | bellard | + g_size = 6;
|
823 | 9d0869b6 | bellard | + g_pos = 5;
|
824 | 9d0869b6 | bellard | + b_size = 5;
|
825 | 9d0869b6 | bellard | + b_pos = 0;
|
826 | 9d0869b6 | bellard | + a_size = 0;
|
827 | 9d0869b6 | bellard | + a_pos = 0;
|
828 | 9d0869b6 | bellard | + break;
|
829 | 9d0869b6 | bellard | + case 24:
|
830 | 9d0869b6 | bellard | + r_size = 8;
|
831 | 9d0869b6 | bellard | + r_pos = 16;
|
832 | 9d0869b6 | bellard | + g_size = 8;
|
833 | 9d0869b6 | bellard | + g_pos = 8;
|
834 | 9d0869b6 | bellard | + b_size = 8;
|
835 | 9d0869b6 | bellard | + b_pos = 0;
|
836 | 9d0869b6 | bellard | + a_size = 0;
|
837 | 9d0869b6 | bellard | + a_pos = 0;
|
838 | 9d0869b6 | bellard | + break;
|
839 | 9d0869b6 | bellard | + case 32:
|
840 | 9d0869b6 | bellard | + r_size = 8;
|
841 | 9d0869b6 | bellard | + r_pos = 16;
|
842 | 9d0869b6 | bellard | + g_size = 8;
|
843 | 9d0869b6 | bellard | + g_pos = 8;
|
844 | 9d0869b6 | bellard | + b_size = 8;
|
845 | 9d0869b6 | bellard | + b_pos = 0;
|
846 | 9d0869b6 | bellard | + a_size = 8;
|
847 | 9d0869b6 | bellard | + a_pos = 24;
|
848 | 9d0869b6 | bellard | + break;
|
849 | 9d0869b6 | bellard | + default:
|
850 | 9d0869b6 | bellard | + r_size = 0;
|
851 | 9d0869b6 | bellard | + r_pos = 0;
|
852 | 9d0869b6 | bellard | + g_size = 0;
|
853 | 9d0869b6 | bellard | + g_pos = 0;
|
854 | 9d0869b6 | bellard | + b_size = 0;
|
855 | 9d0869b6 | bellard | + b_pos = 0;
|
856 | 9d0869b6 | bellard | + a_size = 0;
|
857 | 9d0869b6 | bellard | + a_pos = 0;
|
858 | 9d0869b6 | bellard | + break;
|
859 | 9d0869b6 | bellard | + }
|
860 | 9d0869b6 | bellard | +
|
861 | 9d0869b6 | bellard | + printf("/*Bit8u RedMaskSize*/ %d,\n", r_size);
|
862 | 9d0869b6 | bellard | + printf("/*Bit8u RedFieldPosition*/ %d,\n", r_pos);
|
863 | 9d0869b6 | bellard | + printf("/*Bit8u GreenMaskSize*/ %d,\n", g_size);
|
864 | 9d0869b6 | bellard | + printf("/*Bit8u GreenFieldPosition*/ %d,\n", g_pos);
|
865 | 9d0869b6 | bellard | + printf("/*Bit8u BlueMaskSize*/ %d,\n", b_size);
|
866 | 9d0869b6 | bellard | + printf("/*Bit8u BlueFieldPosition*/ %d,\n", b_pos);
|
867 | 9d0869b6 | bellard | + printf("/*Bit8u RsvdMaskSize*/ %d,\n", a_size);
|
868 | 9d0869b6 | bellard | + printf("/*Bit8u RsvdFieldPosition*/ %d,\n", a_pos);
|
869 | 9d0869b6 | bellard | + printf("/*Bit8u DirectColorModeInfo*/ %d,\n", 0);
|
870 | 9d0869b6 | bellard | +
|
871 | 9d0869b6 | bellard | +// Mandatory information for VBE 2.0 and above
|
872 | 9d0869b6 | bellard | + printf("/*Bit32u PhysBasePtr*/ %s,\n",
|
873 | 9d0869b6 | bellard | + "VBE_DISPI_LFB_PHYSICAL_ADDRESS");
|
874 | 9d0869b6 | bellard | + printf("/*Bit32u OffScreenMemOffset*/ %d,\n", 0);
|
875 | 9d0869b6 | bellard | + printf("/*Bit16u OffScreenMemSize*/ %d,\n", 0);
|
876 | 9d0869b6 | bellard | + // Mandatory information for VBE 3.0 and above
|
877 | 9d0869b6 | bellard | + printf("/*Bit16u LinBytesPerScanLine*/ %d,\n", pitch);
|
878 | 9d0869b6 | bellard | + printf("/*Bit8u BnkNumberOfPages*/ %d,\n", 0);
|
879 | 9d0869b6 | bellard | + printf("/*Bit8u LinNumberOfPages*/ %d,\n", 0);
|
880 | 9d0869b6 | bellard | + printf("/*Bit8u LinRedMaskSize*/ %d,\n", r_size);
|
881 | 9d0869b6 | bellard | + printf("/*Bit8u LinRedFieldPosition*/ %d,\n", r_pos);
|
882 | 9d0869b6 | bellard | + printf("/*Bit8u LinGreenMaskSize*/ %d,\n", g_size);
|
883 | 9d0869b6 | bellard | + printf("/*Bit8u LinGreenFieldPosition*/ %d,\n", g_pos);
|
884 | 9d0869b6 | bellard | + printf("/*Bit8u LinBlueMaskSize*/ %d,\n", b_size);
|
885 | 9d0869b6 | bellard | + printf("/*Bit8u LinBlueFieldPosition*/ %d,\n", b_pos);
|
886 | 9d0869b6 | bellard | + printf("/*Bit8u LinRsvdMaskSize*/ %d,\n", a_size);
|
887 | 9d0869b6 | bellard | + printf("/*Bit8u LinRsvdFieldPosition*/ %d,\n", a_pos);
|
888 | 9d0869b6 | bellard | + printf("/*Bit32u MaxPixelClock*/ %d,\n", 0);
|
889 | 9d0869b6 | bellard | + printf("} },\n");
|
890 | 9d0869b6 | bellard | + }
|
891 | 9d0869b6 | bellard | + printf("{ VBE_VESA_MODE_END_OF_LIST,\n");
|
892 | 9d0869b6 | bellard | + printf("{ 0,\n");
|
893 | 9d0869b6 | bellard | + printf("} },\n");
|
894 | 9d0869b6 | bellard | + printf("};\n");
|
895 | 9d0869b6 | bellard | + return 0;
|
896 | 9d0869b6 | bellard | +} |