root / target-mips / op_helper_mem.c @ 86cc1ce0
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1 | 3a3f24fc | ths | #undef DEBUG_OP
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2 | 3a3f24fc | ths | |
3 | 9f25f11f | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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4 | 9f25f11f | bellard | #define GET_LMASK(v) ((v) & 3) |
5 | 9f25f11f | bellard | #else
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6 | 9f25f11f | bellard | #define GET_LMASK(v) (((v) & 3) ^ 3) |
7 | 9f25f11f | bellard | #endif
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8 | 9f25f11f | bellard | |
9 | 4ad40f36 | bellard | void glue(do_lwl, MEMSUFFIX) (uint32_t tmp)
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10 | 6af0bf9c | bellard | { |
11 | 6af0bf9c | bellard | #if defined (DEBUG_OP)
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12 | 6af0bf9c | bellard | target_ulong sav = T0; |
13 | 6af0bf9c | bellard | #endif
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14 | 6af0bf9c | bellard | |
15 | 9f25f11f | bellard | switch (GET_LMASK(T0)) {
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16 | 6af0bf9c | bellard | case 0: |
17 | 3a3f24fc | ths | T0 = (int32_t)tmp; |
18 | 6af0bf9c | bellard | break;
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19 | 6af0bf9c | bellard | case 1: |
20 | 3a3f24fc | ths | T0 = (int32_t)((tmp << 8) | (T1 & 0x000000FF)); |
21 | 6af0bf9c | bellard | break;
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22 | 6af0bf9c | bellard | case 2: |
23 | 3a3f24fc | ths | T0 = (int32_t)((tmp << 16) | (T1 & 0x0000FFFF)); |
24 | 6af0bf9c | bellard | break;
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25 | 6af0bf9c | bellard | case 3: |
26 | 3a3f24fc | ths | T0 = (int32_t)((tmp << 24) | (T1 & 0x00FFFFFF)); |
27 | 6af0bf9c | bellard | break;
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28 | 6af0bf9c | bellard | } |
29 | 6af0bf9c | bellard | #if defined (DEBUG_OP)
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30 | 6af0bf9c | bellard | if (logfile) {
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31 | 3594c774 | ths | fprintf(logfile, "%s: " TARGET_FMT_lx " - %08x " TARGET_FMT_lx " => " TARGET_FMT_lx "\n", |
32 | 6af0bf9c | bellard | __func__, sav, tmp, T1, T0); |
33 | 6af0bf9c | bellard | } |
34 | 6af0bf9c | bellard | #endif
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35 | 6af0bf9c | bellard | RETURN(); |
36 | 6af0bf9c | bellard | } |
37 | 6af0bf9c | bellard | |
38 | 4ad40f36 | bellard | void glue(do_lwr, MEMSUFFIX) (uint32_t tmp)
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39 | 6af0bf9c | bellard | { |
40 | 6af0bf9c | bellard | #if defined (DEBUG_OP)
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41 | 6af0bf9c | bellard | target_ulong sav = T0; |
42 | 6af0bf9c | bellard | #endif
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43 | 6af0bf9c | bellard | |
44 | 9f25f11f | bellard | switch (GET_LMASK(T0)) {
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45 | 6af0bf9c | bellard | case 0: |
46 | 3a3f24fc | ths | T0 = (int32_t)((tmp >> 24) | (T1 & 0xFFFFFF00)); |
47 | 6af0bf9c | bellard | break;
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48 | 6af0bf9c | bellard | case 1: |
49 | 3a3f24fc | ths | T0 = (int32_t)((tmp >> 16) | (T1 & 0xFFFF0000)); |
50 | 6af0bf9c | bellard | break;
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51 | 6af0bf9c | bellard | case 2: |
52 | 3a3f24fc | ths | T0 = (int32_t)((tmp >> 8) | (T1 & 0xFF000000)); |
53 | 6af0bf9c | bellard | break;
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54 | 6af0bf9c | bellard | case 3: |
55 | 3a3f24fc | ths | T0 = (int32_t)tmp; |
56 | 6af0bf9c | bellard | break;
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57 | 6af0bf9c | bellard | } |
58 | 6af0bf9c | bellard | #if defined (DEBUG_OP)
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59 | 6af0bf9c | bellard | if (logfile) {
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60 | 3594c774 | ths | fprintf(logfile, "%s: " TARGET_FMT_lx " - %08x " TARGET_FMT_lx " => " TARGET_FMT_lx "\n", |
61 | 6af0bf9c | bellard | __func__, sav, tmp, T1, T0); |
62 | 6af0bf9c | bellard | } |
63 | 6af0bf9c | bellard | #endif
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64 | 6af0bf9c | bellard | RETURN(); |
65 | 6af0bf9c | bellard | } |
66 | 6af0bf9c | bellard | |
67 | 4ad40f36 | bellard | uint32_t glue(do_swl, MEMSUFFIX) (uint32_t tmp) |
68 | 6af0bf9c | bellard | { |
69 | 6af0bf9c | bellard | #if defined (DEBUG_OP)
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70 | c570fd16 | ths | target_ulong sav = tmp; |
71 | 6af0bf9c | bellard | #endif
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72 | 6af0bf9c | bellard | |
73 | 9f25f11f | bellard | switch (GET_LMASK(T0)) {
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74 | 6af0bf9c | bellard | case 0: |
75 | 3a3f24fc | ths | tmp = (int32_t)T1; |
76 | 6af0bf9c | bellard | break;
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77 | 6af0bf9c | bellard | case 1: |
78 | 3a3f24fc | ths | tmp = (int32_t)((tmp & 0xFF000000) | ((uint32_t)T1 >> 8)); |
79 | 6af0bf9c | bellard | break;
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80 | 6af0bf9c | bellard | case 2: |
81 | 3a3f24fc | ths | tmp = (int32_t)((tmp & 0xFFFF0000) | ((uint32_t)T1 >> 16)); |
82 | 6af0bf9c | bellard | break;
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83 | 6af0bf9c | bellard | case 3: |
84 | 3a3f24fc | ths | tmp = (int32_t)((tmp & 0xFFFFFF00) | ((uint32_t)T1 >> 24)); |
85 | 6af0bf9c | bellard | break;
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86 | 6af0bf9c | bellard | } |
87 | 6af0bf9c | bellard | #if defined (DEBUG_OP)
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88 | 6af0bf9c | bellard | if (logfile) {
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89 | 3594c774 | ths | fprintf(logfile, "%s: " TARGET_FMT_lx " - " TARGET_FMT_lx " " TARGET_FMT_lx " => %08x\n", |
90 | 6af0bf9c | bellard | __func__, T0, sav, T1, tmp); |
91 | 6af0bf9c | bellard | } |
92 | 6af0bf9c | bellard | #endif
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93 | 6af0bf9c | bellard | RETURN(); |
94 | 4ad40f36 | bellard | return tmp;
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95 | 6af0bf9c | bellard | } |
96 | 6af0bf9c | bellard | |
97 | 4ad40f36 | bellard | uint32_t glue(do_swr, MEMSUFFIX) (uint32_t tmp) |
98 | 6af0bf9c | bellard | { |
99 | 6af0bf9c | bellard | #if defined (DEBUG_OP)
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100 | c570fd16 | ths | target_ulong sav = tmp; |
101 | 6af0bf9c | bellard | #endif
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102 | 6af0bf9c | bellard | |
103 | 9f25f11f | bellard | switch (GET_LMASK(T0)) {
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104 | 6af0bf9c | bellard | case 0: |
105 | 3a3f24fc | ths | tmp = (int32_t)((tmp & 0x00FFFFFF) | (T1 << 24)); |
106 | 6af0bf9c | bellard | break;
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107 | 6af0bf9c | bellard | case 1: |
108 | 3a3f24fc | ths | tmp = (int32_t)((tmp & 0x0000FFFF) | (T1 << 16)); |
109 | 6af0bf9c | bellard | break;
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110 | 6af0bf9c | bellard | case 2: |
111 | 3a3f24fc | ths | tmp = (int32_t)((tmp & 0x000000FF) | (T1 << 8)); |
112 | 6af0bf9c | bellard | break;
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113 | 6af0bf9c | bellard | case 3: |
114 | 3a3f24fc | ths | tmp = (int32_t)T1; |
115 | 6af0bf9c | bellard | break;
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116 | 6af0bf9c | bellard | } |
117 | 6af0bf9c | bellard | #if defined (DEBUG_OP)
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118 | 6af0bf9c | bellard | if (logfile) {
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119 | 3594c774 | ths | fprintf(logfile, "%s: " TARGET_FMT_lx " - " TARGET_FMT_lx " " TARGET_FMT_lx " => %08x\n", |
120 | 6af0bf9c | bellard | __func__, T0, sav, T1, tmp); |
121 | 6af0bf9c | bellard | } |
122 | 6af0bf9c | bellard | #endif
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123 | 6af0bf9c | bellard | RETURN(); |
124 | 4ad40f36 | bellard | return tmp;
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125 | 6af0bf9c | bellard | } |
126 | c570fd16 | ths | |
127 | 60aa19ab | ths | #ifdef TARGET_MIPS64
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128 | c570fd16 | ths | |
129 | c570fd16 | ths | # ifdef TARGET_WORDS_BIGENDIAN
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130 | c570fd16 | ths | #define GET_LMASK64(v) ((v) & 4) |
131 | c570fd16 | ths | #else
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132 | c570fd16 | ths | #define GET_LMASK64(v) (((v) & 4) ^ 4) |
133 | c570fd16 | ths | #endif
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134 | c570fd16 | ths | |
135 | c570fd16 | ths | void glue(do_ldl, MEMSUFFIX) (uint64_t tmp)
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136 | c570fd16 | ths | { |
137 | c570fd16 | ths | #if defined (DEBUG_OP)
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138 | c570fd16 | ths | target_ulong sav = T0; |
139 | c570fd16 | ths | #endif
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140 | c570fd16 | ths | |
141 | c570fd16 | ths | switch (GET_LMASK64(T0)) {
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142 | c570fd16 | ths | case 0: |
143 | c570fd16 | ths | T0 = tmp; |
144 | c570fd16 | ths | break;
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145 | c570fd16 | ths | case 1: |
146 | c570fd16 | ths | T0 = (tmp << 8) | (T1 & 0x00000000000000FFULL); |
147 | c570fd16 | ths | break;
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148 | c570fd16 | ths | case 2: |
149 | c570fd16 | ths | T0 = (tmp << 16) | (T1 & 0x000000000000FFFFULL); |
150 | c570fd16 | ths | break;
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151 | c570fd16 | ths | case 3: |
152 | c570fd16 | ths | T0 = (tmp << 24) | (T1 & 0x0000000000FFFFFFULL); |
153 | c570fd16 | ths | break;
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154 | c570fd16 | ths | case 4: |
155 | c570fd16 | ths | T0 = (tmp << 32) | (T1 & 0x00000000FFFFFFFFULL); |
156 | c570fd16 | ths | break;
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157 | c570fd16 | ths | case 5: |
158 | c570fd16 | ths | T0 = (tmp << 40) | (T1 & 0x000000FFFFFFFFFFULL); |
159 | c570fd16 | ths | break;
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160 | c570fd16 | ths | case 6: |
161 | c570fd16 | ths | T0 = (tmp << 48) | (T1 & 0x0000FFFFFFFFFFFFULL); |
162 | c570fd16 | ths | break;
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163 | c570fd16 | ths | case 7: |
164 | c570fd16 | ths | T0 = (tmp << 56) | (T1 & 0x00FFFFFFFFFFFFFFULL); |
165 | c570fd16 | ths | break;
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166 | c570fd16 | ths | } |
167 | c570fd16 | ths | #if defined (DEBUG_OP)
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168 | c570fd16 | ths | if (logfile) {
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169 | 3594c774 | ths | fprintf(logfile, "%s: " TARGET_FMT_lx " - " TARGET_FMT_lx " " TARGET_FMT_lx " => " TARGET_FMT_lx "\n", |
170 | c570fd16 | ths | __func__, sav, tmp, T1, T0); |
171 | c570fd16 | ths | } |
172 | c570fd16 | ths | #endif
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173 | c570fd16 | ths | RETURN(); |
174 | c570fd16 | ths | } |
175 | c570fd16 | ths | |
176 | c570fd16 | ths | void glue(do_ldr, MEMSUFFIX) (uint64_t tmp)
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177 | c570fd16 | ths | { |
178 | c570fd16 | ths | #if defined (DEBUG_OP)
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179 | c570fd16 | ths | target_ulong sav = T0; |
180 | c570fd16 | ths | #endif
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181 | c570fd16 | ths | |
182 | c570fd16 | ths | switch (GET_LMASK64(T0)) {
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183 | c570fd16 | ths | case 0: |
184 | c570fd16 | ths | T0 = (tmp >> 56) | (T1 & 0xFFFFFFFFFFFFFF00ULL); |
185 | c570fd16 | ths | break;
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186 | c570fd16 | ths | case 1: |
187 | c570fd16 | ths | T0 = (tmp >> 48) | (T1 & 0xFFFFFFFFFFFF0000ULL); |
188 | c570fd16 | ths | break;
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189 | c570fd16 | ths | case 2: |
190 | c570fd16 | ths | T0 = (tmp >> 40) | (T1 & 0xFFFFFFFFFF000000ULL); |
191 | c570fd16 | ths | break;
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192 | c570fd16 | ths | case 3: |
193 | c570fd16 | ths | T0 = (tmp >> 32) | (T1 & 0xFFFFFFFF00000000ULL); |
194 | c570fd16 | ths | break;
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195 | c570fd16 | ths | case 4: |
196 | c570fd16 | ths | T0 = (tmp >> 24) | (T1 & 0xFFFFFF0000000000ULL); |
197 | c570fd16 | ths | break;
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198 | c570fd16 | ths | case 5: |
199 | c570fd16 | ths | T0 = (tmp >> 16) | (T1 & 0xFFFF000000000000ULL); |
200 | c570fd16 | ths | break;
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201 | c570fd16 | ths | case 6: |
202 | c570fd16 | ths | T0 = (tmp >> 8) | (T1 & 0xFF00000000000000ULL); |
203 | c570fd16 | ths | break;
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204 | c570fd16 | ths | case 7: |
205 | c570fd16 | ths | T0 = tmp; |
206 | c570fd16 | ths | break;
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207 | c570fd16 | ths | } |
208 | c570fd16 | ths | #if defined (DEBUG_OP)
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209 | c570fd16 | ths | if (logfile) {
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210 | 3594c774 | ths | fprintf(logfile, "%s: " TARGET_FMT_lx " - " TARGET_FMT_lx " " TARGET_FMT_lx " => " TARGET_FMT_lx "\n", |
211 | c570fd16 | ths | __func__, sav, tmp, T1, T0); |
212 | c570fd16 | ths | } |
213 | c570fd16 | ths | #endif
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214 | c570fd16 | ths | RETURN(); |
215 | c570fd16 | ths | } |
216 | c570fd16 | ths | |
217 | c570fd16 | ths | uint64_t glue(do_sdl, MEMSUFFIX) (uint64_t tmp) |
218 | c570fd16 | ths | { |
219 | c570fd16 | ths | #if defined (DEBUG_OP)
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220 | c570fd16 | ths | target_ulong sav = tmp; |
221 | c570fd16 | ths | #endif
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222 | c570fd16 | ths | |
223 | c570fd16 | ths | switch (GET_LMASK64(T0)) {
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224 | c570fd16 | ths | case 0: |
225 | c570fd16 | ths | tmp = T1; |
226 | c570fd16 | ths | break;
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227 | c570fd16 | ths | case 1: |
228 | c570fd16 | ths | tmp = (tmp & 0xFF00000000000000ULL) | (T1 >> 8); |
229 | c570fd16 | ths | break;
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230 | c570fd16 | ths | case 2: |
231 | c570fd16 | ths | tmp = (tmp & 0xFFFF000000000000ULL) | (T1 >> 16); |
232 | c570fd16 | ths | break;
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233 | c570fd16 | ths | case 3: |
234 | c570fd16 | ths | tmp = (tmp & 0xFFFFFF0000000000ULL) | (T1 >> 24); |
235 | c570fd16 | ths | break;
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236 | c570fd16 | ths | case 4: |
237 | c570fd16 | ths | tmp = (tmp & 0xFFFFFFFF00000000ULL) | (T1 >> 32); |
238 | c570fd16 | ths | break;
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239 | c570fd16 | ths | case 5: |
240 | c570fd16 | ths | tmp = (tmp & 0xFFFFFFFFFF000000ULL) | (T1 >> 40); |
241 | c570fd16 | ths | break;
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242 | c570fd16 | ths | case 6: |
243 | c570fd16 | ths | tmp = (tmp & 0xFFFFFFFFFFFF0000ULL) | (T1 >> 48); |
244 | c570fd16 | ths | break;
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245 | c570fd16 | ths | case 7: |
246 | c570fd16 | ths | tmp = (tmp & 0xFFFFFFFFFFFFFF00ULL) | (T1 >> 56); |
247 | c570fd16 | ths | break;
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248 | c570fd16 | ths | } |
249 | c570fd16 | ths | #if defined (DEBUG_OP)
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250 | c570fd16 | ths | if (logfile) {
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251 | 3594c774 | ths | fprintf(logfile, "%s: " TARGET_FMT_lx " - " TARGET_FMT_lx " " TARGET_FMT_lx " => " TARGET_FMT_lx "\n", |
252 | c570fd16 | ths | __func__, T0, sav, T1, tmp); |
253 | c570fd16 | ths | } |
254 | c570fd16 | ths | #endif
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255 | c570fd16 | ths | RETURN(); |
256 | c570fd16 | ths | return tmp;
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257 | c570fd16 | ths | } |
258 | c570fd16 | ths | |
259 | c570fd16 | ths | uint64_t glue(do_sdr, MEMSUFFIX) (uint64_t tmp) |
260 | c570fd16 | ths | { |
261 | c570fd16 | ths | #if defined (DEBUG_OP)
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262 | c570fd16 | ths | target_ulong sav = tmp; |
263 | c570fd16 | ths | #endif
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264 | c570fd16 | ths | |
265 | c570fd16 | ths | switch (GET_LMASK64(T0)) {
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266 | c570fd16 | ths | case 0: |
267 | c570fd16 | ths | tmp = (tmp & 0x00FFFFFFFFFFFFFFULL) | (T1 << 56); |
268 | c570fd16 | ths | break;
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269 | c570fd16 | ths | case 1: |
270 | c570fd16 | ths | tmp = (tmp & 0x0000FFFFFFFFFFFFULL) | (T1 << 48); |
271 | c570fd16 | ths | break;
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272 | c570fd16 | ths | case 2: |
273 | c570fd16 | ths | tmp = (tmp & 0x000000FFFFFFFFFFULL) | (T1 << 40); |
274 | c570fd16 | ths | break;
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275 | c570fd16 | ths | case 3: |
276 | c570fd16 | ths | tmp = (tmp & 0x00000000FFFFFFFFULL) | (T1 << 32); |
277 | c570fd16 | ths | break;
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278 | c570fd16 | ths | case 4: |
279 | c570fd16 | ths | tmp = (tmp & 0x0000000000FFFFFFULL) | (T1 << 24); |
280 | c570fd16 | ths | break;
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281 | c570fd16 | ths | case 5: |
282 | c570fd16 | ths | tmp = (tmp & 0x000000000000FFFFULL) | (T1 << 16); |
283 | c570fd16 | ths | break;
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284 | c570fd16 | ths | case 6: |
285 | c570fd16 | ths | tmp = (tmp & 0x00000000000000FFULL) | (T1 << 8); |
286 | c570fd16 | ths | break;
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287 | c570fd16 | ths | case 7: |
288 | c570fd16 | ths | tmp = T1; |
289 | c570fd16 | ths | break;
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290 | c570fd16 | ths | } |
291 | c570fd16 | ths | #if defined (DEBUG_OP)
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292 | c570fd16 | ths | if (logfile) {
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293 | 3594c774 | ths | fprintf(logfile, "%s: " TARGET_FMT_lx " - " TARGET_FMT_lx " " TARGET_FMT_lx " => " TARGET_FMT_lx "\n", |
294 | c570fd16 | ths | __func__, T0, sav, T1, tmp); |
295 | c570fd16 | ths | } |
296 | c570fd16 | ths | #endif
|
297 | c570fd16 | ths | RETURN(); |
298 | c570fd16 | ths | return tmp;
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299 | c570fd16 | ths | } |
300 | c570fd16 | ths | |
301 | 60aa19ab | ths | #endif /* TARGET_MIPS64 */ |