root / target-ppc / exec.h @ 86cc1ce0
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1 | 79aceca5 | bellard | /*
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2 | 3fc6c082 | bellard | * PowerPC emulation definitions for qemu.
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3 | 79aceca5 | bellard | *
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4 | 76a66253 | j_mayer | * Copyright (c) 2003-2007 Jocelyn Mayer
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5 | 79aceca5 | bellard | *
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6 | 79aceca5 | bellard | * This library is free software; you can redistribute it and/or
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7 | 79aceca5 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 79aceca5 | bellard | * License as published by the Free Software Foundation; either
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9 | 79aceca5 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 79aceca5 | bellard | *
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11 | 79aceca5 | bellard | * This library is distributed in the hope that it will be useful,
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12 | 79aceca5 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 79aceca5 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 79aceca5 | bellard | * Lesser General Public License for more details.
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15 | 79aceca5 | bellard | *
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16 | 79aceca5 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 79aceca5 | bellard | * License along with this library; if not, write to the Free Software
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18 | 79aceca5 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | 79aceca5 | bellard | */
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20 | 79aceca5 | bellard | #if !defined (__PPC_H__)
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21 | 79aceca5 | bellard | #define __PPC_H__
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22 | 79aceca5 | bellard | |
23 | fdabc366 | bellard | #include "config.h" |
24 | fdabc366 | bellard | |
25 | 79aceca5 | bellard | #include "dyngen-exec.h" |
26 | 79aceca5 | bellard | |
27 | 76a66253 | j_mayer | #include "cpu.h" |
28 | 76a66253 | j_mayer | #include "exec-all.h" |
29 | fdabc366 | bellard | |
30 | e864cabd | j_mayer | /* For normal operations, precise emulation should not be needed */
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31 | e864cabd | j_mayer | //#define USE_PRECISE_EMULATION 1
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32 | e864cabd | j_mayer | #define USE_PRECISE_EMULATION 0 |
33 | e864cabd | j_mayer | |
34 | 79aceca5 | bellard | register struct CPUPPCState *env asm(AREG0); |
35 | 76a66253 | j_mayer | #if TARGET_LONG_BITS > HOST_LONG_BITS
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36 | 76a66253 | j_mayer | /* no registers can be used */
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37 | 76a66253 | j_mayer | #define T0 (env->t0)
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38 | 76a66253 | j_mayer | #define T1 (env->t1)
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39 | 76a66253 | j_mayer | #define T2 (env->t2)
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40 | 76a66253 | j_mayer | #else
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41 | 76a66253 | j_mayer | register unsigned long T0 asm(AREG1); |
42 | 76a66253 | j_mayer | register unsigned long T1 asm(AREG2); |
43 | 76a66253 | j_mayer | register unsigned long T2 asm(AREG3); |
44 | 76a66253 | j_mayer | #endif
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45 | d9bce9d9 | j_mayer | /* We may, sometime, need 64 bits registers on 32 bits target */
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46 | 0487d6a8 | j_mayer | #if defined(TARGET_PPC64) || defined(TARGET_PPCSPE) || (HOST_LONG_BITS == 64) |
47 | d9bce9d9 | j_mayer | #define T0_64 T0
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48 | 0487d6a8 | j_mayer | #define T1_64 T1
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49 | 0487d6a8 | j_mayer | #define T2_64 T2
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50 | d9bce9d9 | j_mayer | #else
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51 | d9bce9d9 | j_mayer | /* no registers can be used */
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52 | d9bce9d9 | j_mayer | #define T0_64 (env->t0)
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53 | d9bce9d9 | j_mayer | #define T1_64 (env->t1)
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54 | d9bce9d9 | j_mayer | #define T2_64 (env->t2)
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55 | 76a66253 | j_mayer | #endif
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56 | d9bce9d9 | j_mayer | /* Provision for Altivec */
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57 | d9bce9d9 | j_mayer | #define T0_avr (env->t0_avr)
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58 | d9bce9d9 | j_mayer | #define T1_avr (env->t1_avr)
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59 | d9bce9d9 | j_mayer | #define T2_avr (env->t2_avr)
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60 | 79aceca5 | bellard | |
61 | 76a66253 | j_mayer | /* XXX: to clean: remove this mess */
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62 | 79aceca5 | bellard | #define PARAM(n) ((uint32_t)PARAM##n) |
63 | 79aceca5 | bellard | #define SPARAM(n) ((int32_t)PARAM##n) |
64 | 76a66253 | j_mayer | |
65 | fb0eaffc | bellard | #define FT0 (env->ft0)
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66 | fb0eaffc | bellard | #define FT1 (env->ft1)
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67 | fb0eaffc | bellard | #define FT2 (env->ft2)
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68 | 79aceca5 | bellard | |
69 | a541f297 | bellard | #if defined (DEBUG_OP)
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70 | 70ead434 | ths | # define RETURN() __asm__ __volatile__("nop" : : : "memory"); |
71 | a541f297 | bellard | #else
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72 | 70ead434 | ths | # define RETURN() __asm__ __volatile__("" : : : "memory"); |
73 | a541f297 | bellard | #endif
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74 | 79aceca5 | bellard | |
75 | 76a66253 | j_mayer | static inline target_ulong rotl8 (target_ulong i, int n) |
76 | 76a66253 | j_mayer | { |
77 | 76a66253 | j_mayer | return (((uint8_t)i << n) | ((uint8_t)i >> (8 - n))); |
78 | 76a66253 | j_mayer | } |
79 | 76a66253 | j_mayer | |
80 | 76a66253 | j_mayer | static inline target_ulong rotl16 (target_ulong i, int n) |
81 | 76a66253 | j_mayer | { |
82 | 76a66253 | j_mayer | return (((uint16_t)i << n) | ((uint16_t)i >> (16 - n))); |
83 | 76a66253 | j_mayer | } |
84 | 79aceca5 | bellard | |
85 | 76a66253 | j_mayer | static inline target_ulong rotl32 (target_ulong i, int n) |
86 | 79aceca5 | bellard | { |
87 | 76a66253 | j_mayer | return (((uint32_t)i << n) | ((uint32_t)i >> (32 - n))); |
88 | 79aceca5 | bellard | } |
89 | 79aceca5 | bellard | |
90 | 76a66253 | j_mayer | #if defined(TARGET_PPC64)
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91 | 76a66253 | j_mayer | static inline target_ulong rotl64 (target_ulong i, int n) |
92 | 76a66253 | j_mayer | { |
93 | 76a66253 | j_mayer | return (((uint64_t)i << n) | ((uint64_t)i >> (64 - n))); |
94 | 76a66253 | j_mayer | } |
95 | 76a66253 | j_mayer | #endif
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96 | 76a66253 | j_mayer | |
97 | 9a64fbe4 | bellard | #if !defined(CONFIG_USER_ONLY)
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98 | a9049a07 | bellard | #include "softmmu_exec.h" |
99 | 9a64fbe4 | bellard | #endif /* !defined(CONFIG_USER_ONLY) */ |
100 | 79aceca5 | bellard | |
101 | 9fddaa0c | bellard | void do_raise_exception_err (uint32_t exception, int error_code); |
102 | 9fddaa0c | bellard | void do_raise_exception (uint32_t exception);
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103 | 79aceca5 | bellard | |
104 | 76a66253 | j_mayer | int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong vaddr,
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105 | 76a66253 | j_mayer | int rw, int access_type, int check_BATs); |
106 | 79aceca5 | bellard | |
107 | 76a66253 | j_mayer | void ppc6xx_tlb_invalidate_all (CPUState *env);
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108 | 76a66253 | j_mayer | void ppc6xx_tlb_invalidate_virt (CPUState *env, target_ulong eaddr,
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109 | 76a66253 | j_mayer | int is_code);
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110 | 76a66253 | j_mayer | void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code, |
111 | 76a66253 | j_mayer | target_ulong pte0, target_ulong pte1); |
112 | 9a64fbe4 | bellard | |
113 | 0d1a29f9 | bellard | static inline void env_to_regs(void) |
114 | 0d1a29f9 | bellard | { |
115 | 0d1a29f9 | bellard | } |
116 | 0d1a29f9 | bellard | |
117 | 0d1a29f9 | bellard | static inline void regs_to_env(void) |
118 | 0d1a29f9 | bellard | { |
119 | 0d1a29f9 | bellard | } |
120 | 0d1a29f9 | bellard | |
121 | 76a66253 | j_mayer | int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw, |
122 | 0fa85d43 | bellard | int is_user, int is_softmmu); |
123 | 0fa85d43 | bellard | |
124 | 79aceca5 | bellard | #endif /* !defined (__PPC_H__) */ |