root / target-ppc / op_helper.c @ 86cc1ce0
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/*
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* PowerPC emulation helpers for qemu.
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*
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* Copyright (c) 2003-2007 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h" |
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#include "op_helper.h" |
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#define MEMSUFFIX _raw
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#include "op_helper.h" |
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#include "op_helper_mem.h" |
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#if !defined(CONFIG_USER_ONLY)
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#define MEMSUFFIX _user
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#include "op_helper.h" |
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#include "op_helper_mem.h" |
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#define MEMSUFFIX _kernel
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#include "op_helper.h" |
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#include "op_helper_mem.h" |
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#endif
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//#define DEBUG_OP
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//#define DEBUG_EXCEPTIONS
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//#define DEBUG_SOFTWARE_TLB
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//#define FLUSH_ALL_TLBS
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/*****************************************************************************/
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/* Exceptions processing helpers */
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void cpu_loop_exit (void) |
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{ |
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longjmp(env->jmp_env, 1);
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} |
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void do_raise_exception_err (uint32_t exception, int error_code) |
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{ |
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#if 0
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printf("Raise exception %3x code : %d\n", exception, error_code);
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#endif
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switch (exception) {
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case EXCP_PROGRAM:
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if (error_code == EXCP_FP && msr_fe0 == 0 && msr_fe1 == 0) |
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return;
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break;
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default:
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break;
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} |
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env->exception_index = exception; |
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env->error_code = error_code; |
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cpu_loop_exit(); |
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} |
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void do_raise_exception (uint32_t exception)
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{ |
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do_raise_exception_err(exception, 0);
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} |
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/*****************************************************************************/
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/* Registers load and stores */
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void do_load_cr (void) |
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{ |
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T0 = (env->crf[0] << 28) | |
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(env->crf[1] << 24) | |
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(env->crf[2] << 20) | |
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(env->crf[3] << 16) | |
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(env->crf[4] << 12) | |
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(env->crf[5] << 8) | |
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(env->crf[6] << 4) | |
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(env->crf[7] << 0); |
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} |
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void do_store_cr (uint32_t mask)
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{ |
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int i, sh;
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for (i = 0, sh = 7; i < 8; i++, sh --) { |
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if (mask & (1 << sh)) |
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env->crf[i] = (T0 >> (sh * 4)) & 0xFUL; |
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} |
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} |
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void do_load_xer (void) |
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{ |
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T0 = (xer_so << XER_SO) | |
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(xer_ov << XER_OV) | |
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(xer_ca << XER_CA) | |
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(xer_bc << XER_BC) | |
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(xer_cmp << XER_CMP); |
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} |
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void do_store_xer (void) |
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{ |
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xer_so = (T0 >> XER_SO) & 0x01;
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xer_ov = (T0 >> XER_OV) & 0x01;
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xer_ca = (T0 >> XER_CA) & 0x01;
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xer_cmp = (T0 >> XER_CMP) & 0xFF;
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xer_bc = (T0 >> XER_BC) & 0x7F;
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} |
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void do_load_fpscr (void) |
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{ |
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/* The 32 MSB of the target fpr are undefined.
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* They'll be zero...
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*/
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union {
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float64 d; |
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struct {
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uint32_t u[2];
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} s; |
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} u; |
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int i;
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#if defined(WORDS_BIGENDIAN)
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#define WORD0 0 |
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#define WORD1 1 |
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#else
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#define WORD0 1 |
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#define WORD1 0 |
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#endif
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u.s.u[WORD0] = 0;
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u.s.u[WORD1] = 0;
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for (i = 0; i < 8; i++) |
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u.s.u[WORD1] |= env->fpscr[i] << (4 * i);
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FT0 = u.d; |
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} |
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void do_store_fpscr (uint32_t mask)
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{ |
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/*
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* We use only the 32 LSB of the incoming fpr
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*/
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union {
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double d;
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struct {
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uint32_t u[2];
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} s; |
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} u; |
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int i, rnd_type;
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u.d = FT0; |
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if (mask & 0x80) |
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env->fpscr[0] = (env->fpscr[0] & 0x9) | ((u.s.u[WORD1] >> 28) & ~0x9); |
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for (i = 1; i < 7; i++) { |
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if (mask & (1 << (7 - i))) |
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env->fpscr[i] = (u.s.u[WORD1] >> (4 * (7 - i))) & 0xF; |
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} |
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/* TODO: update FEX & VX */
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/* Set rounding mode */
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switch (env->fpscr[0] & 0x3) { |
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case 0: |
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/* Best approximation (round to nearest) */
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rnd_type = float_round_nearest_even; |
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break;
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case 1: |
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/* Smaller magnitude (round toward zero) */
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rnd_type = float_round_to_zero; |
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break;
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case 2: |
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/* Round toward +infinite */
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rnd_type = float_round_up; |
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break;
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default:
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case 3: |
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/* Round toward -infinite */
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rnd_type = float_round_down; |
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break;
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} |
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set_float_rounding_mode(rnd_type, &env->fp_status); |
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} |
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/*****************************************************************************/
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/* Fixed point operations helpers */
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#if defined(TARGET_PPC64)
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static void add128 (uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b) |
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{ |
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*plow += a; |
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/* carry test */
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if (*plow < a)
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(*phigh)++; |
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*phigh += b; |
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} |
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static void neg128 (uint64_t *plow, uint64_t *phigh) |
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{ |
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*plow = ~ *plow; |
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*phigh = ~ *phigh; |
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add128(plow, phigh, 1, 0); |
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} |
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static void mul64 (uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b) |
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{ |
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uint32_t a0, a1, b0, b1; |
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uint64_t v; |
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a0 = a; |
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a1 = a >> 32;
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b0 = b; |
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b1 = b >> 32;
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v = (uint64_t)a0 * (uint64_t)b0; |
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*plow = v; |
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*phigh = 0;
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v = (uint64_t)a0 * (uint64_t)b1; |
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add128(plow, phigh, v << 32, v >> 32); |
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v = (uint64_t)a1 * (uint64_t)b0; |
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add128(plow, phigh, v << 32, v >> 32); |
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v = (uint64_t)a1 * (uint64_t)b1; |
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*phigh += v; |
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#if defined(DEBUG_MULDIV)
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printf("mul: 0x%016llx * 0x%016llx = 0x%016llx%016llx\n",
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a, b, *phigh, *plow); |
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#endif
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} |
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void do_mul64 (uint64_t *plow, uint64_t *phigh)
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{ |
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mul64(plow, phigh, T0, T1); |
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} |
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static void imul64 (uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b) |
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{ |
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int sa, sb;
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sa = (a < 0);
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if (sa)
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a = -a; |
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sb = (b < 0);
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if (sb)
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b = -b; |
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mul64(plow, phigh, a, b); |
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if (sa ^ sb) {
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neg128(plow, phigh); |
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} |
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} |
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void do_imul64 (uint64_t *plow, uint64_t *phigh)
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{ |
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imul64(plow, phigh, T0, T1); |
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} |
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#endif
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void do_adde (void) |
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{ |
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T2 = T0; |
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T0 += T1 + xer_ca; |
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if (likely(!((uint32_t)T0 < (uint32_t)T2 ||
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(xer_ca == 1 && (uint32_t)T0 == (uint32_t)T2)))) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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#if defined(TARGET_PPC64)
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void do_adde_64 (void) |
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{ |
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T2 = T0; |
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T0 += T1 + xer_ca; |
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if (likely(!((uint64_t)T0 < (uint64_t)T2 ||
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(xer_ca == 1 && (uint64_t)T0 == (uint64_t)T2)))) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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#endif
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void do_addmeo (void) |
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{ |
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T1 = T0; |
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T0 += xer_ca + (-1);
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if (likely(!((uint32_t)T1 &
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((uint32_t)T1 ^ (uint32_t)T0) & (1UL << 31)))) { |
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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} |
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if (likely(T1 != 0)) |
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xer_ca = 1;
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} |
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#if defined(TARGET_PPC64)
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void do_addmeo_64 (void) |
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{ |
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T1 = T0; |
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T0 += xer_ca + (-1);
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if (likely(!((uint64_t)T1 &
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((uint64_t)T1 ^ (uint64_t)T0) & (1ULL << 63)))) { |
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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} |
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if (likely(T1 != 0)) |
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xer_ca = 1;
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} |
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#endif
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void do_divwo (void) |
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{ |
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if (likely(!(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || |
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(int32_t)T1 == 0))) {
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xer_ov = 0;
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T0 = (int32_t)T0 / (int32_t)T1; |
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} else {
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xer_so = 1;
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xer_ov = 1;
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T0 = (-1) * ((uint32_t)T0 >> 31); |
326 |
} |
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} |
328 |
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#if defined(TARGET_PPC64)
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void do_divdo (void) |
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{ |
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if (likely(!(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1ULL) || |
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(int64_t)T1 == 0))) {
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xer_ov = 0;
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T0 = (int64_t)T0 / (int64_t)T1; |
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} else {
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xer_so = 1;
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xer_ov = 1;
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T0 = (-1ULL) * ((uint64_t)T0 >> 63); |
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} |
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} |
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#endif
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void do_divwuo (void) |
345 |
{ |
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if (likely((uint32_t)T1 != 0)) { |
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xer_ov = 0;
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T0 = (uint32_t)T0 / (uint32_t)T1; |
349 |
} else {
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xer_so = 1;
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xer_ov = 1;
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T0 = 0;
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} |
354 |
} |
355 |
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#if defined(TARGET_PPC64)
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357 |
void do_divduo (void) |
358 |
{ |
359 |
if (likely((uint64_t)T1 != 0)) { |
360 |
xer_ov = 0;
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T0 = (uint64_t)T0 / (uint64_t)T1; |
362 |
} else {
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xer_so = 1;
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xer_ov = 1;
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T0 = 0;
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} |
367 |
} |
368 |
#endif
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369 |
|
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void do_mullwo (void) |
371 |
{ |
372 |
int64_t res = (int64_t)T0 * (int64_t)T1; |
373 |
|
374 |
if (likely((int32_t)res == res)) {
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375 |
xer_ov = 0;
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376 |
} else {
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377 |
xer_ov = 1;
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378 |
xer_so = 1;
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379 |
} |
380 |
T0 = (int32_t)res; |
381 |
} |
382 |
|
383 |
#if defined(TARGET_PPC64)
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384 |
void do_mulldo (void) |
385 |
{ |
386 |
int64_t th; |
387 |
uint64_t tl; |
388 |
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389 |
do_imul64(&tl, &th); |
390 |
if (likely(th == 0)) { |
391 |
xer_ov = 0;
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392 |
} else {
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393 |
xer_ov = 1;
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394 |
xer_so = 1;
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395 |
} |
396 |
T0 = (int64_t)tl; |
397 |
} |
398 |
#endif
|
399 |
|
400 |
void do_nego (void) |
401 |
{ |
402 |
if (likely((int32_t)T0 != INT32_MIN)) {
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403 |
xer_ov = 0;
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404 |
T0 = -(int32_t)T0; |
405 |
} else {
|
406 |
xer_ov = 1;
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407 |
xer_so = 1;
|
408 |
} |
409 |
} |
410 |
|
411 |
#if defined(TARGET_PPC64)
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412 |
void do_nego_64 (void) |
413 |
{ |
414 |
if (likely((int64_t)T0 != INT64_MIN)) {
|
415 |
xer_ov = 0;
|
416 |
T0 = -(int64_t)T0; |
417 |
} else {
|
418 |
xer_ov = 1;
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419 |
xer_so = 1;
|
420 |
} |
421 |
} |
422 |
#endif
|
423 |
|
424 |
void do_subfe (void) |
425 |
{ |
426 |
T0 = T1 + ~T0 + xer_ca; |
427 |
if (likely((uint32_t)T0 >= (uint32_t)T1 &&
|
428 |
(xer_ca == 0 || (uint32_t)T0 != (uint32_t)T1))) {
|
429 |
xer_ca = 0;
|
430 |
} else {
|
431 |
xer_ca = 1;
|
432 |
} |
433 |
} |
434 |
|
435 |
#if defined(TARGET_PPC64)
|
436 |
void do_subfe_64 (void) |
437 |
{ |
438 |
T0 = T1 + ~T0 + xer_ca; |
439 |
if (likely((uint64_t)T0 >= (uint64_t)T1 &&
|
440 |
(xer_ca == 0 || (uint64_t)T0 != (uint64_t)T1))) {
|
441 |
xer_ca = 0;
|
442 |
} else {
|
443 |
xer_ca = 1;
|
444 |
} |
445 |
} |
446 |
#endif
|
447 |
|
448 |
void do_subfmeo (void) |
449 |
{ |
450 |
T1 = T0; |
451 |
T0 = ~T0 + xer_ca - 1;
|
452 |
if (likely(!((uint32_t)~T1 & ((uint32_t)~T1 ^ (uint32_t)T0) &
|
453 |
(1UL << 31)))) { |
454 |
xer_ov = 0;
|
455 |
} else {
|
456 |
xer_so = 1;
|
457 |
xer_ov = 1;
|
458 |
} |
459 |
if (likely((uint32_t)T1 != UINT32_MAX))
|
460 |
xer_ca = 1;
|
461 |
} |
462 |
|
463 |
#if defined(TARGET_PPC64)
|
464 |
void do_subfmeo_64 (void) |
465 |
{ |
466 |
T1 = T0; |
467 |
T0 = ~T0 + xer_ca - 1;
|
468 |
if (likely(!((uint64_t)~T1 & ((uint64_t)~T1 ^ (uint64_t)T0) &
|
469 |
(1ULL << 63)))) { |
470 |
xer_ov = 0;
|
471 |
} else {
|
472 |
xer_so = 1;
|
473 |
xer_ov = 1;
|
474 |
} |
475 |
if (likely((uint64_t)T1 != UINT64_MAX))
|
476 |
xer_ca = 1;
|
477 |
} |
478 |
#endif
|
479 |
|
480 |
void do_subfzeo (void) |
481 |
{ |
482 |
T1 = T0; |
483 |
T0 = ~T0 + xer_ca; |
484 |
if (likely(!(((uint32_t)~T1 ^ UINT32_MAX) &
|
485 |
((uint32_t)(~T1) ^ (uint32_t)T0) & (1UL << 31)))) { |
486 |
xer_ov = 0;
|
487 |
} else {
|
488 |
xer_ov = 1;
|
489 |
xer_so = 1;
|
490 |
} |
491 |
if (likely((uint32_t)T0 >= (uint32_t)~T1)) {
|
492 |
xer_ca = 0;
|
493 |
} else {
|
494 |
xer_ca = 1;
|
495 |
} |
496 |
} |
497 |
|
498 |
#if defined(TARGET_PPC64)
|
499 |
void do_subfzeo_64 (void) |
500 |
{ |
501 |
T1 = T0; |
502 |
T0 = ~T0 + xer_ca; |
503 |
if (likely(!(((uint64_t)~T1 ^ UINT64_MAX) &
|
504 |
((uint64_t)(~T1) ^ (uint64_t)T0) & (1ULL << 63)))) { |
505 |
xer_ov = 0;
|
506 |
} else {
|
507 |
xer_ov = 1;
|
508 |
xer_so = 1;
|
509 |
} |
510 |
if (likely((uint64_t)T0 >= (uint64_t)~T1)) {
|
511 |
xer_ca = 0;
|
512 |
} else {
|
513 |
xer_ca = 1;
|
514 |
} |
515 |
} |
516 |
#endif
|
517 |
|
518 |
/* shift right arithmetic helper */
|
519 |
void do_sraw (void) |
520 |
{ |
521 |
int32_t ret; |
522 |
|
523 |
if (likely(!(T1 & 0x20UL))) { |
524 |
if (likely((uint32_t)T1 != 0)) { |
525 |
ret = (int32_t)T0 >> (T1 & 0x1fUL);
|
526 |
if (likely(ret >= 0 || ((int32_t)T0 & ((1 << T1) - 1)) == 0)) { |
527 |
xer_ca = 0;
|
528 |
} else {
|
529 |
xer_ca = 1;
|
530 |
} |
531 |
} else {
|
532 |
ret = T0; |
533 |
xer_ca = 0;
|
534 |
} |
535 |
} else {
|
536 |
ret = (-1) * ((uint32_t)T0 >> 31); |
537 |
if (likely(ret >= 0 || ((uint32_t)T0 & ~0x80000000UL) == 0)) { |
538 |
xer_ca = 0;
|
539 |
} else {
|
540 |
xer_ca = 1;
|
541 |
} |
542 |
} |
543 |
T0 = ret; |
544 |
} |
545 |
|
546 |
#if defined(TARGET_PPC64)
|
547 |
void do_srad (void) |
548 |
{ |
549 |
int64_t ret; |
550 |
|
551 |
if (likely(!(T1 & 0x40UL))) { |
552 |
if (likely((uint64_t)T1 != 0)) { |
553 |
ret = (int64_t)T0 >> (T1 & 0x3FUL);
|
554 |
if (likely(ret >= 0 || ((int64_t)T0 & ((1 << T1) - 1)) == 0)) { |
555 |
xer_ca = 0;
|
556 |
} else {
|
557 |
xer_ca = 1;
|
558 |
} |
559 |
} else {
|
560 |
ret = T0; |
561 |
xer_ca = 0;
|
562 |
} |
563 |
} else {
|
564 |
ret = (-1) * ((uint64_t)T0 >> 63); |
565 |
if (likely(ret >= 0 || ((uint64_t)T0 & ~0x8000000000000000ULL) == 0)) { |
566 |
xer_ca = 0;
|
567 |
} else {
|
568 |
xer_ca = 1;
|
569 |
} |
570 |
} |
571 |
T0 = ret; |
572 |
} |
573 |
#endif
|
574 |
|
575 |
static inline int popcnt (uint32_t val) |
576 |
{ |
577 |
int i;
|
578 |
|
579 |
for (i = 0; val != 0;) |
580 |
val = val ^ (val - 1);
|
581 |
|
582 |
return i;
|
583 |
} |
584 |
|
585 |
void do_popcntb (void) |
586 |
{ |
587 |
uint32_t ret; |
588 |
int i;
|
589 |
|
590 |
ret = 0;
|
591 |
for (i = 0; i < 32; i += 8) |
592 |
ret |= popcnt((T0 >> i) & 0xFF) << i;
|
593 |
T0 = ret; |
594 |
} |
595 |
|
596 |
#if defined(TARGET_PPC64)
|
597 |
void do_popcntb_64 (void) |
598 |
{ |
599 |
uint64_t ret; |
600 |
int i;
|
601 |
|
602 |
ret = 0;
|
603 |
for (i = 0; i < 64; i += 8) |
604 |
ret |= popcnt((T0 >> i) & 0xFF) << i;
|
605 |
T0 = ret; |
606 |
} |
607 |
#endif
|
608 |
|
609 |
/*****************************************************************************/
|
610 |
/* Floating point operations helpers */
|
611 |
void do_fctiw (void) |
612 |
{ |
613 |
union {
|
614 |
double d;
|
615 |
uint64_t i; |
616 |
} p; |
617 |
|
618 |
p.i = float64_to_int32(FT0, &env->fp_status); |
619 |
#if USE_PRECISE_EMULATION
|
620 |
/* XXX: higher bits are not supposed to be significant.
|
621 |
* to make tests easier, return the same as a real PowerPC 750 (aka G3)
|
622 |
*/
|
623 |
p.i |= 0xFFF80000ULL << 32; |
624 |
#endif
|
625 |
FT0 = p.d; |
626 |
} |
627 |
|
628 |
void do_fctiwz (void) |
629 |
{ |
630 |
union {
|
631 |
double d;
|
632 |
uint64_t i; |
633 |
} p; |
634 |
|
635 |
p.i = float64_to_int32_round_to_zero(FT0, &env->fp_status); |
636 |
#if USE_PRECISE_EMULATION
|
637 |
/* XXX: higher bits are not supposed to be significant.
|
638 |
* to make tests easier, return the same as a real PowerPC 750 (aka G3)
|
639 |
*/
|
640 |
p.i |= 0xFFF80000ULL << 32; |
641 |
#endif
|
642 |
FT0 = p.d; |
643 |
} |
644 |
|
645 |
#if defined(TARGET_PPC64)
|
646 |
void do_fcfid (void) |
647 |
{ |
648 |
union {
|
649 |
double d;
|
650 |
uint64_t i; |
651 |
} p; |
652 |
|
653 |
p.d = FT0; |
654 |
FT0 = int64_to_float64(p.i, &env->fp_status); |
655 |
} |
656 |
|
657 |
void do_fctid (void) |
658 |
{ |
659 |
union {
|
660 |
double d;
|
661 |
uint64_t i; |
662 |
} p; |
663 |
|
664 |
p.i = float64_to_int64(FT0, &env->fp_status); |
665 |
FT0 = p.d; |
666 |
} |
667 |
|
668 |
void do_fctidz (void) |
669 |
{ |
670 |
union {
|
671 |
double d;
|
672 |
uint64_t i; |
673 |
} p; |
674 |
|
675 |
p.i = float64_to_int64_round_to_zero(FT0, &env->fp_status); |
676 |
FT0 = p.d; |
677 |
} |
678 |
|
679 |
#endif
|
680 |
|
681 |
#if USE_PRECISE_EMULATION
|
682 |
void do_fmadd (void) |
683 |
{ |
684 |
#ifdef FLOAT128
|
685 |
float128 ft0_128, ft1_128; |
686 |
|
687 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
688 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
689 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
690 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
691 |
ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); |
692 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
693 |
#else
|
694 |
/* This is OK on x86 hosts */
|
695 |
FT0 = (FT0 * FT1) + FT2; |
696 |
#endif
|
697 |
} |
698 |
|
699 |
void do_fmsub (void) |
700 |
{ |
701 |
#ifdef FLOAT128
|
702 |
float128 ft0_128, ft1_128; |
703 |
|
704 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
705 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
706 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
707 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
708 |
ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); |
709 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
710 |
#else
|
711 |
/* This is OK on x86 hosts */
|
712 |
FT0 = (FT0 * FT1) - FT2; |
713 |
#endif
|
714 |
} |
715 |
#endif /* USE_PRECISE_EMULATION */ |
716 |
|
717 |
void do_fnmadd (void) |
718 |
{ |
719 |
#if USE_PRECISE_EMULATION
|
720 |
#ifdef FLOAT128
|
721 |
float128 ft0_128, ft1_128; |
722 |
|
723 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
724 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
725 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
726 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
727 |
ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); |
728 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
729 |
#else
|
730 |
/* This is OK on x86 hosts */
|
731 |
FT0 = (FT0 * FT1) + FT2; |
732 |
#endif
|
733 |
#else
|
734 |
FT0 = float64_mul(FT0, FT1, &env->fp_status); |
735 |
FT0 = float64_add(FT0, FT2, &env->fp_status); |
736 |
#endif
|
737 |
if (likely(!isnan(FT0)))
|
738 |
FT0 = float64_chs(FT0); |
739 |
} |
740 |
|
741 |
void do_fnmsub (void) |
742 |
{ |
743 |
#if USE_PRECISE_EMULATION
|
744 |
#ifdef FLOAT128
|
745 |
float128 ft0_128, ft1_128; |
746 |
|
747 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
748 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
749 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
750 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
751 |
ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); |
752 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
753 |
#else
|
754 |
/* This is OK on x86 hosts */
|
755 |
FT0 = (FT0 * FT1) - FT2; |
756 |
#endif
|
757 |
#else
|
758 |
FT0 = float64_mul(FT0, FT1, &env->fp_status); |
759 |
FT0 = float64_sub(FT0, FT2, &env->fp_status); |
760 |
#endif
|
761 |
if (likely(!isnan(FT0)))
|
762 |
FT0 = float64_chs(FT0); |
763 |
} |
764 |
|
765 |
void do_fsqrt (void) |
766 |
{ |
767 |
FT0 = float64_sqrt(FT0, &env->fp_status); |
768 |
} |
769 |
|
770 |
void do_fres (void) |
771 |
{ |
772 |
union {
|
773 |
double d;
|
774 |
uint64_t i; |
775 |
} p; |
776 |
|
777 |
if (likely(isnormal(FT0))) {
|
778 |
#if USE_PRECISE_EMULATION
|
779 |
FT0 = float64_div(1.0, FT0, &env->fp_status); |
780 |
FT0 = float64_to_float32(FT0, &env->fp_status); |
781 |
#else
|
782 |
FT0 = float32_div(1.0, FT0, &env->fp_status); |
783 |
#endif
|
784 |
} else {
|
785 |
p.d = FT0; |
786 |
if (p.i == 0x8000000000000000ULL) { |
787 |
p.i = 0xFFF0000000000000ULL;
|
788 |
} else if (p.i == 0x0000000000000000ULL) { |
789 |
p.i = 0x7FF0000000000000ULL;
|
790 |
} else if (isnan(FT0)) { |
791 |
p.i = 0x7FF8000000000000ULL;
|
792 |
} else if (FT0 < 0.0) { |
793 |
p.i = 0x8000000000000000ULL;
|
794 |
} else {
|
795 |
p.i = 0x0000000000000000ULL;
|
796 |
} |
797 |
FT0 = p.d; |
798 |
} |
799 |
} |
800 |
|
801 |
void do_frsqrte (void) |
802 |
{ |
803 |
union {
|
804 |
double d;
|
805 |
uint64_t i; |
806 |
} p; |
807 |
|
808 |
if (likely(isnormal(FT0) && FT0 > 0.0)) { |
809 |
FT0 = float64_sqrt(FT0, &env->fp_status); |
810 |
FT0 = float32_div(1.0, FT0, &env->fp_status); |
811 |
} else {
|
812 |
p.d = FT0; |
813 |
if (p.i == 0x8000000000000000ULL) { |
814 |
p.i = 0xFFF0000000000000ULL;
|
815 |
} else if (p.i == 0x0000000000000000ULL) { |
816 |
p.i = 0x7FF0000000000000ULL;
|
817 |
} else if (isnan(FT0)) { |
818 |
if (!(p.i & 0x0008000000000000ULL)) |
819 |
p.i |= 0x000FFFFFFFFFFFFFULL;
|
820 |
} else if (FT0 < 0) { |
821 |
p.i = 0x7FF8000000000000ULL;
|
822 |
} else {
|
823 |
p.i = 0x0000000000000000ULL;
|
824 |
} |
825 |
FT0 = p.d; |
826 |
} |
827 |
} |
828 |
|
829 |
void do_fsel (void) |
830 |
{ |
831 |
if (FT0 >= 0) |
832 |
FT0 = FT1; |
833 |
else
|
834 |
FT0 = FT2; |
835 |
} |
836 |
|
837 |
void do_fcmpu (void) |
838 |
{ |
839 |
if (likely(!isnan(FT0) && !isnan(FT1))) {
|
840 |
if (float64_lt(FT0, FT1, &env->fp_status)) {
|
841 |
T0 = 0x08UL;
|
842 |
} else if (!float64_le(FT0, FT1, &env->fp_status)) { |
843 |
T0 = 0x04UL;
|
844 |
} else {
|
845 |
T0 = 0x02UL;
|
846 |
} |
847 |
} else {
|
848 |
T0 = 0x01UL;
|
849 |
env->fpscr[4] |= 0x1; |
850 |
env->fpscr[6] |= 0x1; |
851 |
} |
852 |
env->fpscr[3] = T0;
|
853 |
} |
854 |
|
855 |
void do_fcmpo (void) |
856 |
{ |
857 |
env->fpscr[4] &= ~0x1; |
858 |
if (likely(!isnan(FT0) && !isnan(FT1))) {
|
859 |
if (float64_lt(FT0, FT1, &env->fp_status)) {
|
860 |
T0 = 0x08UL;
|
861 |
} else if (!float64_le(FT0, FT1, &env->fp_status)) { |
862 |
T0 = 0x04UL;
|
863 |
} else {
|
864 |
T0 = 0x02UL;
|
865 |
} |
866 |
} else {
|
867 |
T0 = 0x01UL;
|
868 |
env->fpscr[4] |= 0x1; |
869 |
if (!float64_is_signaling_nan(FT0) || !float64_is_signaling_nan(FT1)) {
|
870 |
/* Quiet NaN case */
|
871 |
env->fpscr[6] |= 0x1; |
872 |
if (!(env->fpscr[1] & 0x8)) |
873 |
env->fpscr[4] |= 0x8; |
874 |
} else {
|
875 |
env->fpscr[4] |= 0x8; |
876 |
} |
877 |
} |
878 |
env->fpscr[3] = T0;
|
879 |
} |
880 |
|
881 |
#if !defined (CONFIG_USER_ONLY)
|
882 |
void do_rfi (void) |
883 |
{ |
884 |
#if defined(TARGET_PPC64)
|
885 |
if (env->spr[SPR_SRR1] & (1ULL << MSR_SF)) { |
886 |
env->nip = (uint64_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
887 |
do_store_msr(env, (uint64_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
888 |
} else {
|
889 |
env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
890 |
ppc_store_msr_32(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
891 |
} |
892 |
#else
|
893 |
env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
894 |
do_store_msr(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
895 |
#endif
|
896 |
#if defined (DEBUG_OP)
|
897 |
dump_rfi(); |
898 |
#endif
|
899 |
env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
900 |
} |
901 |
|
902 |
#if defined(TARGET_PPC64)
|
903 |
void do_rfid (void) |
904 |
{ |
905 |
if (env->spr[SPR_SRR1] & (1ULL << MSR_SF)) { |
906 |
env->nip = (uint64_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
907 |
do_store_msr(env, (uint64_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
908 |
} else {
|
909 |
env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
910 |
do_store_msr(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
911 |
} |
912 |
#if defined (DEBUG_OP)
|
913 |
dump_rfi(); |
914 |
#endif
|
915 |
env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
916 |
} |
917 |
#endif
|
918 |
#endif
|
919 |
|
920 |
void do_tw (int flags) |
921 |
{ |
922 |
if (!likely(!(((int32_t)T0 < (int32_t)T1 && (flags & 0x10)) || |
923 |
((int32_t)T0 > (int32_t)T1 && (flags & 0x08)) ||
|
924 |
((int32_t)T0 == (int32_t)T1 && (flags & 0x04)) ||
|
925 |
((uint32_t)T0 < (uint32_t)T1 && (flags & 0x02)) ||
|
926 |
((uint32_t)T0 > (uint32_t)T1 && (flags & 0x01))))) {
|
927 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP); |
928 |
} |
929 |
} |
930 |
|
931 |
#if defined(TARGET_PPC64)
|
932 |
void do_td (int flags) |
933 |
{ |
934 |
if (!likely(!(((int64_t)T0 < (int64_t)T1 && (flags & 0x10)) || |
935 |
((int64_t)T0 > (int64_t)T1 && (flags & 0x08)) ||
|
936 |
((int64_t)T0 == (int64_t)T1 && (flags & 0x04)) ||
|
937 |
((uint64_t)T0 < (uint64_t)T1 && (flags & 0x02)) ||
|
938 |
((uint64_t)T0 > (uint64_t)T1 && (flags & 0x01)))))
|
939 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP); |
940 |
} |
941 |
#endif
|
942 |
|
943 |
/*****************************************************************************/
|
944 |
/* PowerPC 601 specific instructions (POWER bridge) */
|
945 |
void do_POWER_abso (void) |
946 |
{ |
947 |
if ((uint32_t)T0 == INT32_MIN) {
|
948 |
T0 = INT32_MAX; |
949 |
xer_ov = 1;
|
950 |
xer_so = 1;
|
951 |
} else {
|
952 |
T0 = -T0; |
953 |
xer_ov = 0;
|
954 |
} |
955 |
} |
956 |
|
957 |
void do_POWER_clcs (void) |
958 |
{ |
959 |
switch (T0) {
|
960 |
case 0x0CUL: |
961 |
/* Instruction cache line size */
|
962 |
T0 = ICACHE_LINE_SIZE; |
963 |
break;
|
964 |
case 0x0DUL: |
965 |
/* Data cache line size */
|
966 |
T0 = DCACHE_LINE_SIZE; |
967 |
break;
|
968 |
case 0x0EUL: |
969 |
/* Minimum cache line size */
|
970 |
T0 = ICACHE_LINE_SIZE < DCACHE_LINE_SIZE ? |
971 |
ICACHE_LINE_SIZE : DCACHE_LINE_SIZE; |
972 |
break;
|
973 |
case 0x0FUL: |
974 |
/* Maximum cache line size */
|
975 |
T0 = ICACHE_LINE_SIZE > DCACHE_LINE_SIZE ? |
976 |
ICACHE_LINE_SIZE : DCACHE_LINE_SIZE; |
977 |
break;
|
978 |
default:
|
979 |
/* Undefined */
|
980 |
break;
|
981 |
} |
982 |
} |
983 |
|
984 |
void do_POWER_div (void) |
985 |
{ |
986 |
uint64_t tmp; |
987 |
|
988 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
989 |
T0 = (long)((-1) * (T0 >> 31)); |
990 |
env->spr[SPR_MQ] = 0;
|
991 |
} else {
|
992 |
tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
|
993 |
env->spr[SPR_MQ] = tmp % T1; |
994 |
T0 = tmp / (int32_t)T1; |
995 |
} |
996 |
} |
997 |
|
998 |
void do_POWER_divo (void) |
999 |
{ |
1000 |
int64_t tmp; |
1001 |
|
1002 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1003 |
T0 = (long)((-1) * (T0 >> 31)); |
1004 |
env->spr[SPR_MQ] = 0;
|
1005 |
xer_ov = 1;
|
1006 |
xer_so = 1;
|
1007 |
} else {
|
1008 |
tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
|
1009 |
env->spr[SPR_MQ] = tmp % T1; |
1010 |
tmp /= (int32_t)T1; |
1011 |
if (tmp > (int64_t)INT32_MAX || tmp < (int64_t)INT32_MIN) {
|
1012 |
xer_ov = 1;
|
1013 |
xer_so = 1;
|
1014 |
} else {
|
1015 |
xer_ov = 0;
|
1016 |
} |
1017 |
T0 = tmp; |
1018 |
} |
1019 |
} |
1020 |
|
1021 |
void do_POWER_divs (void) |
1022 |
{ |
1023 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1024 |
T0 = (long)((-1) * (T0 >> 31)); |
1025 |
env->spr[SPR_MQ] = 0;
|
1026 |
} else {
|
1027 |
env->spr[SPR_MQ] = T0 % T1; |
1028 |
T0 = (int32_t)T0 / (int32_t)T1; |
1029 |
} |
1030 |
} |
1031 |
|
1032 |
void do_POWER_divso (void) |
1033 |
{ |
1034 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1035 |
T0 = (long)((-1) * (T0 >> 31)); |
1036 |
env->spr[SPR_MQ] = 0;
|
1037 |
xer_ov = 1;
|
1038 |
xer_so = 1;
|
1039 |
} else {
|
1040 |
T0 = (int32_t)T0 / (int32_t)T1; |
1041 |
env->spr[SPR_MQ] = (int32_t)T0 % (int32_t)T1; |
1042 |
xer_ov = 0;
|
1043 |
} |
1044 |
} |
1045 |
|
1046 |
void do_POWER_dozo (void) |
1047 |
{ |
1048 |
if ((int32_t)T1 > (int32_t)T0) {
|
1049 |
T2 = T0; |
1050 |
T0 = T1 - T0; |
1051 |
if (((uint32_t)(~T2) ^ (uint32_t)T1 ^ UINT32_MAX) &
|
1052 |
((uint32_t)(~T2) ^ (uint32_t)T0) & (1UL << 31)) { |
1053 |
xer_so = 1;
|
1054 |
xer_ov = 1;
|
1055 |
} else {
|
1056 |
xer_ov = 0;
|
1057 |
} |
1058 |
} else {
|
1059 |
T0 = 0;
|
1060 |
xer_ov = 0;
|
1061 |
} |
1062 |
} |
1063 |
|
1064 |
void do_POWER_maskg (void) |
1065 |
{ |
1066 |
uint32_t ret; |
1067 |
|
1068 |
if ((uint32_t)T0 == (uint32_t)(T1 + 1)) { |
1069 |
ret = -1;
|
1070 |
} else {
|
1071 |
ret = (((uint32_t)(-1)) >> ((uint32_t)T0)) ^
|
1072 |
(((uint32_t)(-1) >> ((uint32_t)T1)) >> 1); |
1073 |
if ((uint32_t)T0 > (uint32_t)T1)
|
1074 |
ret = ~ret; |
1075 |
} |
1076 |
T0 = ret; |
1077 |
} |
1078 |
|
1079 |
void do_POWER_mulo (void) |
1080 |
{ |
1081 |
uint64_t tmp; |
1082 |
|
1083 |
tmp = (uint64_t)T0 * (uint64_t)T1; |
1084 |
env->spr[SPR_MQ] = tmp >> 32;
|
1085 |
T0 = tmp; |
1086 |
if (tmp >> 32 != ((uint64_t)T0 >> 16) * ((uint64_t)T1 >> 16)) { |
1087 |
xer_ov = 1;
|
1088 |
xer_so = 1;
|
1089 |
} else {
|
1090 |
xer_ov = 0;
|
1091 |
} |
1092 |
} |
1093 |
|
1094 |
#if !defined (CONFIG_USER_ONLY)
|
1095 |
void do_POWER_rac (void) |
1096 |
{ |
1097 |
#if 0
|
1098 |
mmu_ctx_t ctx;
|
1099 |
|
1100 |
/* We don't have to generate many instances of this instruction,
|
1101 |
* as rac is supervisor only.
|
1102 |
*/
|
1103 |
if (get_physical_address(env, &ctx, T0, 0, ACCESS_INT, 1) == 0)
|
1104 |
T0 = ctx.raddr;
|
1105 |
#endif
|
1106 |
} |
1107 |
|
1108 |
void do_POWER_rfsvc (void) |
1109 |
{ |
1110 |
env->nip = env->lr & ~0x00000003UL;
|
1111 |
T0 = env->ctr & 0x0000FFFFUL;
|
1112 |
do_store_msr(env, T0); |
1113 |
#if defined (DEBUG_OP)
|
1114 |
dump_rfi(); |
1115 |
#endif
|
1116 |
env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
1117 |
} |
1118 |
|
1119 |
/* PowerPC 601 BAT management helper */
|
1120 |
void do_store_601_batu (int nr) |
1121 |
{ |
1122 |
do_store_ibatu(env, nr, (uint32_t)T0); |
1123 |
env->DBAT[0][nr] = env->IBAT[0][nr]; |
1124 |
env->DBAT[1][nr] = env->IBAT[1][nr]; |
1125 |
} |
1126 |
#endif
|
1127 |
|
1128 |
/*****************************************************************************/
|
1129 |
/* 602 specific instructions */
|
1130 |
/* mfrom is the most crazy instruction ever seen, imho ! */
|
1131 |
/* Real implementation uses a ROM table. Do the same */
|
1132 |
#define USE_MFROM_ROM_TABLE
|
1133 |
void do_op_602_mfrom (void) |
1134 |
{ |
1135 |
if (likely(T0 < 602)) { |
1136 |
#if defined(USE_MFROM_ROM_TABLE)
|
1137 |
#include "mfrom_table.c" |
1138 |
T0 = mfrom_ROM_table[T0]; |
1139 |
#else
|
1140 |
double d;
|
1141 |
/* Extremly decomposed:
|
1142 |
* -T0 / 256
|
1143 |
* T0 = 256 * log10(10 + 1.0) + 0.5
|
1144 |
*/
|
1145 |
d = T0; |
1146 |
d = float64_div(d, 256, &env->fp_status);
|
1147 |
d = float64_chs(d); |
1148 |
d = exp10(d); // XXX: use float emulation function
|
1149 |
d = float64_add(d, 1.0, &env->fp_status); |
1150 |
d = log10(d); // XXX: use float emulation function
|
1151 |
d = float64_mul(d, 256, &env->fp_status);
|
1152 |
d = float64_add(d, 0.5, &env->fp_status); |
1153 |
T0 = float64_round_to_int(d, &env->fp_status); |
1154 |
#endif
|
1155 |
} else {
|
1156 |
T0 = 0;
|
1157 |
} |
1158 |
} |
1159 |
|
1160 |
/*****************************************************************************/
|
1161 |
/* Embedded PowerPC specific helpers */
|
1162 |
void do_405_check_ov (void) |
1163 |
{ |
1164 |
if (likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) || |
1165 |
!(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) {
|
1166 |
xer_ov = 0;
|
1167 |
} else {
|
1168 |
xer_ov = 1;
|
1169 |
xer_so = 1;
|
1170 |
} |
1171 |
} |
1172 |
|
1173 |
void do_405_check_sat (void) |
1174 |
{ |
1175 |
if (!likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) || |
1176 |
!(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) {
|
1177 |
/* Saturate result */
|
1178 |
if (T2 >> 31) { |
1179 |
T0 = INT32_MIN; |
1180 |
} else {
|
1181 |
T0 = INT32_MAX; |
1182 |
} |
1183 |
} |
1184 |
} |
1185 |
|
1186 |
#if !defined(CONFIG_USER_ONLY)
|
1187 |
void do_40x_rfci (void) |
1188 |
{ |
1189 |
env->nip = env->spr[SPR_40x_SRR2]; |
1190 |
do_store_msr(env, env->spr[SPR_40x_SRR3] & ~0xFFFF0000);
|
1191 |
#if defined (DEBUG_OP)
|
1192 |
dump_rfi(); |
1193 |
#endif
|
1194 |
env->interrupt_request = CPU_INTERRUPT_EXITTB; |
1195 |
} |
1196 |
|
1197 |
void do_rfci (void) |
1198 |
{ |
1199 |
#if defined(TARGET_PPC64)
|
1200 |
if (env->spr[SPR_BOOKE_CSRR1] & (1 << MSR_CM)) { |
1201 |
env->nip = (uint64_t)env->spr[SPR_BOOKE_CSRR0]; |
1202 |
} else
|
1203 |
#endif
|
1204 |
{ |
1205 |
env->nip = (uint32_t)env->spr[SPR_BOOKE_CSRR0]; |
1206 |
} |
1207 |
do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_CSRR1] & ~0x3FFF0000);
|
1208 |
#if defined (DEBUG_OP)
|
1209 |
dump_rfi(); |
1210 |
#endif
|
1211 |
env->interrupt_request = CPU_INTERRUPT_EXITTB; |
1212 |
} |
1213 |
|
1214 |
void do_rfdi (void) |
1215 |
{ |
1216 |
#if defined(TARGET_PPC64)
|
1217 |
if (env->spr[SPR_BOOKE_DSRR1] & (1 << MSR_CM)) { |
1218 |
env->nip = (uint64_t)env->spr[SPR_BOOKE_DSRR0]; |
1219 |
} else
|
1220 |
#endif
|
1221 |
{ |
1222 |
env->nip = (uint32_t)env->spr[SPR_BOOKE_DSRR0]; |
1223 |
} |
1224 |
do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_DSRR1] & ~0x3FFF0000);
|
1225 |
#if defined (DEBUG_OP)
|
1226 |
dump_rfi(); |
1227 |
#endif
|
1228 |
env->interrupt_request = CPU_INTERRUPT_EXITTB; |
1229 |
} |
1230 |
|
1231 |
void do_rfmci (void) |
1232 |
{ |
1233 |
#if defined(TARGET_PPC64)
|
1234 |
if (env->spr[SPR_BOOKE_MCSRR1] & (1 << MSR_CM)) { |
1235 |
env->nip = (uint64_t)env->spr[SPR_BOOKE_MCSRR0]; |
1236 |
} else
|
1237 |
#endif
|
1238 |
{ |
1239 |
env->nip = (uint32_t)env->spr[SPR_BOOKE_MCSRR0]; |
1240 |
} |
1241 |
do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_MCSRR1] & ~0x3FFF0000);
|
1242 |
#if defined (DEBUG_OP)
|
1243 |
dump_rfi(); |
1244 |
#endif
|
1245 |
env->interrupt_request = CPU_INTERRUPT_EXITTB; |
1246 |
} |
1247 |
|
1248 |
void do_load_dcr (void) |
1249 |
{ |
1250 |
target_ulong val; |
1251 |
|
1252 |
if (unlikely(env->dcr_read == NULL)) |
1253 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL); |
1254 |
else if (unlikely((*env->dcr_read)(env->dcr_env, T0, &val) != 0)) |
1255 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG); |
1256 |
else
|
1257 |
T0 = val; |
1258 |
} |
1259 |
|
1260 |
void do_store_dcr (void) |
1261 |
{ |
1262 |
if (unlikely(env->dcr_write == NULL)) |
1263 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL); |
1264 |
else if (unlikely((*env->dcr_write)(env->dcr_env, T0, T1) != 0)) |
1265 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG); |
1266 |
} |
1267 |
|
1268 |
void do_load_403_pb (int num) |
1269 |
{ |
1270 |
T0 = env->pb[num]; |
1271 |
} |
1272 |
|
1273 |
void do_store_403_pb (int num) |
1274 |
{ |
1275 |
if (likely(env->pb[num] != T0)) {
|
1276 |
env->pb[num] = T0; |
1277 |
/* Should be optimized */
|
1278 |
tlb_flush(env, 1);
|
1279 |
} |
1280 |
} |
1281 |
#endif
|
1282 |
|
1283 |
/* 440 specific */
|
1284 |
void do_440_dlmzb (void) |
1285 |
{ |
1286 |
target_ulong mask; |
1287 |
int i;
|
1288 |
|
1289 |
i = 1;
|
1290 |
for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { |
1291 |
if ((T0 & mask) == 0) |
1292 |
goto done;
|
1293 |
i++; |
1294 |
} |
1295 |
for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { |
1296 |
if ((T1 & mask) == 0) |
1297 |
break;
|
1298 |
i++; |
1299 |
} |
1300 |
done:
|
1301 |
T0 = i; |
1302 |
} |
1303 |
|
1304 |
#if defined(TARGET_PPCSPE)
|
1305 |
/* SPE extension helpers */
|
1306 |
/* Use a table to make this quicker */
|
1307 |
static uint8_t hbrev[16] = { |
1308 |
0x0, 0x8, 0x4, 0xC, 0x2, 0xA, 0x6, 0xE, |
1309 |
0x1, 0x9, 0x5, 0xD, 0x3, 0xB, 0x7, 0xF, |
1310 |
}; |
1311 |
|
1312 |
static inline uint8_t byte_reverse (uint8_t val) |
1313 |
{ |
1314 |
return hbrev[val >> 4] | (hbrev[val & 0xF] << 4); |
1315 |
} |
1316 |
|
1317 |
static inline uint32_t word_reverse (uint32_t val) |
1318 |
{ |
1319 |
return byte_reverse(val >> 24) | (byte_reverse(val >> 16) << 8) | |
1320 |
(byte_reverse(val >> 8) << 16) | (byte_reverse(val) << 24); |
1321 |
} |
1322 |
|
1323 |
#define MASKBITS 16 // Random value - to be fixed |
1324 |
void do_brinc (void) |
1325 |
{ |
1326 |
uint32_t a, b, d, mask; |
1327 |
|
1328 |
mask = (uint32_t)(-1UL) >> MASKBITS;
|
1329 |
b = T1_64 & mask; |
1330 |
a = T0_64 & mask; |
1331 |
d = word_reverse(1 + word_reverse(a | ~mask));
|
1332 |
T0_64 = (T0_64 & ~mask) | (d & mask); |
1333 |
} |
1334 |
|
1335 |
#define DO_SPE_OP2(name) \
|
1336 |
void do_ev##name (void) \ |
1337 |
{ \ |
1338 |
T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32, T1_64 >> 32) << 32) | \ |
1339 |
(uint64_t)_do_e##name(T0_64, T1_64); \ |
1340 |
} |
1341 |
|
1342 |
#define DO_SPE_OP1(name) \
|
1343 |
void do_ev##name (void) \ |
1344 |
{ \ |
1345 |
T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32) << 32) | \ |
1346 |
(uint64_t)_do_e##name(T0_64); \ |
1347 |
} |
1348 |
|
1349 |
/* Fixed-point vector arithmetic */
|
1350 |
static inline uint32_t _do_eabs (uint32_t val) |
1351 |
{ |
1352 |
if (val != 0x80000000) |
1353 |
val &= ~0x80000000;
|
1354 |
|
1355 |
return val;
|
1356 |
} |
1357 |
|
1358 |
static inline uint32_t _do_eaddw (uint32_t op1, uint32_t op2) |
1359 |
{ |
1360 |
return op1 + op2;
|
1361 |
} |
1362 |
|
1363 |
static inline int _do_ecntlsw (uint32_t val) |
1364 |
{ |
1365 |
if (val & 0x80000000) |
1366 |
return _do_cntlzw(~val);
|
1367 |
else
|
1368 |
return _do_cntlzw(val);
|
1369 |
} |
1370 |
|
1371 |
static inline int _do_ecntlzw (uint32_t val) |
1372 |
{ |
1373 |
return _do_cntlzw(val);
|
1374 |
} |
1375 |
|
1376 |
static inline uint32_t _do_eneg (uint32_t val) |
1377 |
{ |
1378 |
if (val != 0x80000000) |
1379 |
val ^= 0x80000000;
|
1380 |
|
1381 |
return val;
|
1382 |
} |
1383 |
|
1384 |
static inline uint32_t _do_erlw (uint32_t op1, uint32_t op2) |
1385 |
{ |
1386 |
return rotl32(op1, op2);
|
1387 |
} |
1388 |
|
1389 |
static inline uint32_t _do_erndw (uint32_t val) |
1390 |
{ |
1391 |
return (val + 0x000080000000) & 0xFFFF0000; |
1392 |
} |
1393 |
|
1394 |
static inline uint32_t _do_eslw (uint32_t op1, uint32_t op2) |
1395 |
{ |
1396 |
/* No error here: 6 bits are used */
|
1397 |
return op1 << (op2 & 0x3F); |
1398 |
} |
1399 |
|
1400 |
static inline int32_t _do_esrws (int32_t op1, uint32_t op2) |
1401 |
{ |
1402 |
/* No error here: 6 bits are used */
|
1403 |
return op1 >> (op2 & 0x3F); |
1404 |
} |
1405 |
|
1406 |
static inline uint32_t _do_esrwu (uint32_t op1, uint32_t op2) |
1407 |
{ |
1408 |
/* No error here: 6 bits are used */
|
1409 |
return op1 >> (op2 & 0x3F); |
1410 |
} |
1411 |
|
1412 |
static inline uint32_t _do_esubfw (uint32_t op1, uint32_t op2) |
1413 |
{ |
1414 |
return op2 - op1;
|
1415 |
} |
1416 |
|
1417 |
/* evabs */
|
1418 |
DO_SPE_OP1(abs); |
1419 |
/* evaddw */
|
1420 |
DO_SPE_OP2(addw); |
1421 |
/* evcntlsw */
|
1422 |
DO_SPE_OP1(cntlsw); |
1423 |
/* evcntlzw */
|
1424 |
DO_SPE_OP1(cntlzw); |
1425 |
/* evneg */
|
1426 |
DO_SPE_OP1(neg); |
1427 |
/* evrlw */
|
1428 |
DO_SPE_OP2(rlw); |
1429 |
/* evrnd */
|
1430 |
DO_SPE_OP1(rndw); |
1431 |
/* evslw */
|
1432 |
DO_SPE_OP2(slw); |
1433 |
/* evsrws */
|
1434 |
DO_SPE_OP2(srws); |
1435 |
/* evsrwu */
|
1436 |
DO_SPE_OP2(srwu); |
1437 |
/* evsubfw */
|
1438 |
DO_SPE_OP2(subfw); |
1439 |
|
1440 |
/* evsel is a little bit more complicated... */
|
1441 |
static inline uint32_t _do_esel (uint32_t op1, uint32_t op2, int n) |
1442 |
{ |
1443 |
if (n)
|
1444 |
return op1;
|
1445 |
else
|
1446 |
return op2;
|
1447 |
} |
1448 |
|
1449 |
void do_evsel (void) |
1450 |
{ |
1451 |
T0_64 = ((uint64_t)_do_esel(T0_64 >> 32, T1_64 >> 32, T0 >> 3) << 32) | |
1452 |
(uint64_t)_do_esel(T0_64, T1_64, (T0 >> 2) & 1); |
1453 |
} |
1454 |
|
1455 |
/* Fixed-point vector comparisons */
|
1456 |
#define DO_SPE_CMP(name) \
|
1457 |
void do_ev##name (void) \ |
1458 |
{ \ |
1459 |
T0 = _do_evcmp_merge((uint64_t)_do_e##name(T0_64 >> 32, \ |
1460 |
T1_64 >> 32) << 32, \ |
1461 |
_do_e##name(T0_64, T1_64)); \ |
1462 |
} |
1463 |
|
1464 |
static inline uint32_t _do_evcmp_merge (int t0, int t1) |
1465 |
{ |
1466 |
return (t0 << 3) | (t1 << 2) | ((t0 | t1) << 1) | (t0 & t1); |
1467 |
} |
1468 |
static inline int _do_ecmpeq (uint32_t op1, uint32_t op2) |
1469 |
{ |
1470 |
return op1 == op2 ? 1 : 0; |
1471 |
} |
1472 |
|
1473 |
static inline int _do_ecmpgts (int32_t op1, int32_t op2) |
1474 |
{ |
1475 |
return op1 > op2 ? 1 : 0; |
1476 |
} |
1477 |
|
1478 |
static inline int _do_ecmpgtu (uint32_t op1, uint32_t op2) |
1479 |
{ |
1480 |
return op1 > op2 ? 1 : 0; |
1481 |
} |
1482 |
|
1483 |
static inline int _do_ecmplts (int32_t op1, int32_t op2) |
1484 |
{ |
1485 |
return op1 < op2 ? 1 : 0; |
1486 |
} |
1487 |
|
1488 |
static inline int _do_ecmpltu (uint32_t op1, uint32_t op2) |
1489 |
{ |
1490 |
return op1 < op2 ? 1 : 0; |
1491 |
} |
1492 |
|
1493 |
/* evcmpeq */
|
1494 |
DO_SPE_CMP(cmpeq); |
1495 |
/* evcmpgts */
|
1496 |
DO_SPE_CMP(cmpgts); |
1497 |
/* evcmpgtu */
|
1498 |
DO_SPE_CMP(cmpgtu); |
1499 |
/* evcmplts */
|
1500 |
DO_SPE_CMP(cmplts); |
1501 |
/* evcmpltu */
|
1502 |
DO_SPE_CMP(cmpltu); |
1503 |
|
1504 |
/* Single precision floating-point conversions from/to integer */
|
1505 |
static inline uint32_t _do_efscfsi (int32_t val) |
1506 |
{ |
1507 |
union {
|
1508 |
uint32_t u; |
1509 |
float32 f; |
1510 |
} u; |
1511 |
|
1512 |
u.f = int32_to_float32(val, &env->spe_status); |
1513 |
|
1514 |
return u.u;
|
1515 |
} |
1516 |
|
1517 |
static inline uint32_t _do_efscfui (uint32_t val) |
1518 |
{ |
1519 |
union {
|
1520 |
uint32_t u; |
1521 |
float32 f; |
1522 |
} u; |
1523 |
|
1524 |
u.f = uint32_to_float32(val, &env->spe_status); |
1525 |
|
1526 |
return u.u;
|
1527 |
} |
1528 |
|
1529 |
static inline int32_t _do_efsctsi (uint32_t val) |
1530 |
{ |
1531 |
union {
|
1532 |
int32_t u; |
1533 |
float32 f; |
1534 |
} u; |
1535 |
|
1536 |
u.u = val; |
1537 |
/* NaN are not treated the same way IEEE 754 does */
|
1538 |
if (unlikely(isnan(u.f)))
|
1539 |
return 0; |
1540 |
|
1541 |
return float32_to_int32(u.f, &env->spe_status);
|
1542 |
} |
1543 |
|
1544 |
static inline uint32_t _do_efsctui (uint32_t val) |
1545 |
{ |
1546 |
union {
|
1547 |
int32_t u; |
1548 |
float32 f; |
1549 |
} u; |
1550 |
|
1551 |
u.u = val; |
1552 |
/* NaN are not treated the same way IEEE 754 does */
|
1553 |
if (unlikely(isnan(u.f)))
|
1554 |
return 0; |
1555 |
|
1556 |
return float32_to_uint32(u.f, &env->spe_status);
|
1557 |
} |
1558 |
|
1559 |
static inline int32_t _do_efsctsiz (uint32_t val) |
1560 |
{ |
1561 |
union {
|
1562 |
int32_t u; |
1563 |
float32 f; |
1564 |
} u; |
1565 |
|
1566 |
u.u = val; |
1567 |
/* NaN are not treated the same way IEEE 754 does */
|
1568 |
if (unlikely(isnan(u.f)))
|
1569 |
return 0; |
1570 |
|
1571 |
return float32_to_int32_round_to_zero(u.f, &env->spe_status);
|
1572 |
} |
1573 |
|
1574 |
static inline uint32_t _do_efsctuiz (uint32_t val) |
1575 |
{ |
1576 |
union {
|
1577 |
int32_t u; |
1578 |
float32 f; |
1579 |
} u; |
1580 |
|
1581 |
u.u = val; |
1582 |
/* NaN are not treated the same way IEEE 754 does */
|
1583 |
if (unlikely(isnan(u.f)))
|
1584 |
return 0; |
1585 |
|
1586 |
return float32_to_uint32_round_to_zero(u.f, &env->spe_status);
|
1587 |
} |
1588 |
|
1589 |
void do_efscfsi (void) |
1590 |
{ |
1591 |
T0_64 = _do_efscfsi(T0_64); |
1592 |
} |
1593 |
|
1594 |
void do_efscfui (void) |
1595 |
{ |
1596 |
T0_64 = _do_efscfui(T0_64); |
1597 |
} |
1598 |
|
1599 |
void do_efsctsi (void) |
1600 |
{ |
1601 |
T0_64 = _do_efsctsi(T0_64); |
1602 |
} |
1603 |
|
1604 |
void do_efsctui (void) |
1605 |
{ |
1606 |
T0_64 = _do_efsctui(T0_64); |
1607 |
} |
1608 |
|
1609 |
void do_efsctsiz (void) |
1610 |
{ |
1611 |
T0_64 = _do_efsctsiz(T0_64); |
1612 |
} |
1613 |
|
1614 |
void do_efsctuiz (void) |
1615 |
{ |
1616 |
T0_64 = _do_efsctuiz(T0_64); |
1617 |
} |
1618 |
|
1619 |
/* Single precision floating-point conversion to/from fractional */
|
1620 |
static inline uint32_t _do_efscfsf (uint32_t val) |
1621 |
{ |
1622 |
union {
|
1623 |
uint32_t u; |
1624 |
float32 f; |
1625 |
} u; |
1626 |
float32 tmp; |
1627 |
|
1628 |
u.f = int32_to_float32(val, &env->spe_status); |
1629 |
tmp = int64_to_float32(1ULL << 32, &env->spe_status); |
1630 |
u.f = float32_div(u.f, tmp, &env->spe_status); |
1631 |
|
1632 |
return u.u;
|
1633 |
} |
1634 |
|
1635 |
static inline uint32_t _do_efscfuf (uint32_t val) |
1636 |
{ |
1637 |
union {
|
1638 |
uint32_t u; |
1639 |
float32 f; |
1640 |
} u; |
1641 |
float32 tmp; |
1642 |
|
1643 |
u.f = uint32_to_float32(val, &env->spe_status); |
1644 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1645 |
u.f = float32_div(u.f, tmp, &env->spe_status); |
1646 |
|
1647 |
return u.u;
|
1648 |
} |
1649 |
|
1650 |
static inline int32_t _do_efsctsf (uint32_t val) |
1651 |
{ |
1652 |
union {
|
1653 |
int32_t u; |
1654 |
float32 f; |
1655 |
} u; |
1656 |
float32 tmp; |
1657 |
|
1658 |
u.u = val; |
1659 |
/* NaN are not treated the same way IEEE 754 does */
|
1660 |
if (unlikely(isnan(u.f)))
|
1661 |
return 0; |
1662 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1663 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1664 |
|
1665 |
return float32_to_int32(u.f, &env->spe_status);
|
1666 |
} |
1667 |
|
1668 |
static inline uint32_t _do_efsctuf (uint32_t val) |
1669 |
{ |
1670 |
union {
|
1671 |
int32_t u; |
1672 |
float32 f; |
1673 |
} u; |
1674 |
float32 tmp; |
1675 |
|
1676 |
u.u = val; |
1677 |
/* NaN are not treated the same way IEEE 754 does */
|
1678 |
if (unlikely(isnan(u.f)))
|
1679 |
return 0; |
1680 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1681 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1682 |
|
1683 |
return float32_to_uint32(u.f, &env->spe_status);
|
1684 |
} |
1685 |
|
1686 |
static inline int32_t _do_efsctsfz (uint32_t val) |
1687 |
{ |
1688 |
union {
|
1689 |
int32_t u; |
1690 |
float32 f; |
1691 |
} u; |
1692 |
float32 tmp; |
1693 |
|
1694 |
u.u = val; |
1695 |
/* NaN are not treated the same way IEEE 754 does */
|
1696 |
if (unlikely(isnan(u.f)))
|
1697 |
return 0; |
1698 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1699 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1700 |
|
1701 |
return float32_to_int32_round_to_zero(u.f, &env->spe_status);
|
1702 |
} |
1703 |
|
1704 |
static inline uint32_t _do_efsctufz (uint32_t val) |
1705 |
{ |
1706 |
union {
|
1707 |
int32_t u; |
1708 |
float32 f; |
1709 |
} u; |
1710 |
float32 tmp; |
1711 |
|
1712 |
u.u = val; |
1713 |
/* NaN are not treated the same way IEEE 754 does */
|
1714 |
if (unlikely(isnan(u.f)))
|
1715 |
return 0; |
1716 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1717 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1718 |
|
1719 |
return float32_to_uint32_round_to_zero(u.f, &env->spe_status);
|
1720 |
} |
1721 |
|
1722 |
void do_efscfsf (void) |
1723 |
{ |
1724 |
T0_64 = _do_efscfsf(T0_64); |
1725 |
} |
1726 |
|
1727 |
void do_efscfuf (void) |
1728 |
{ |
1729 |
T0_64 = _do_efscfuf(T0_64); |
1730 |
} |
1731 |
|
1732 |
void do_efsctsf (void) |
1733 |
{ |
1734 |
T0_64 = _do_efsctsf(T0_64); |
1735 |
} |
1736 |
|
1737 |
void do_efsctuf (void) |
1738 |
{ |
1739 |
T0_64 = _do_efsctuf(T0_64); |
1740 |
} |
1741 |
|
1742 |
void do_efsctsfz (void) |
1743 |
{ |
1744 |
T0_64 = _do_efsctsfz(T0_64); |
1745 |
} |
1746 |
|
1747 |
void do_efsctufz (void) |
1748 |
{ |
1749 |
T0_64 = _do_efsctufz(T0_64); |
1750 |
} |
1751 |
|
1752 |
/* Double precision floating point helpers */
|
1753 |
static inline int _do_efdcmplt (uint64_t op1, uint64_t op2) |
1754 |
{ |
1755 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
1756 |
return _do_efdtstlt(op1, op2);
|
1757 |
} |
1758 |
|
1759 |
static inline int _do_efdcmpgt (uint64_t op1, uint64_t op2) |
1760 |
{ |
1761 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
1762 |
return _do_efdtstgt(op1, op2);
|
1763 |
} |
1764 |
|
1765 |
static inline int _do_efdcmpeq (uint64_t op1, uint64_t op2) |
1766 |
{ |
1767 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
1768 |
return _do_efdtsteq(op1, op2);
|
1769 |
} |
1770 |
|
1771 |
void do_efdcmplt (void) |
1772 |
{ |
1773 |
T0 = _do_efdcmplt(T0_64, T1_64); |
1774 |
} |
1775 |
|
1776 |
void do_efdcmpgt (void) |
1777 |
{ |
1778 |
T0 = _do_efdcmpgt(T0_64, T1_64); |
1779 |
} |
1780 |
|
1781 |
void do_efdcmpeq (void) |
1782 |
{ |
1783 |
T0 = _do_efdcmpeq(T0_64, T1_64); |
1784 |
} |
1785 |
|
1786 |
/* Double precision floating-point conversion to/from integer */
|
1787 |
static inline uint64_t _do_efdcfsi (int64_t val) |
1788 |
{ |
1789 |
union {
|
1790 |
uint64_t u; |
1791 |
float64 f; |
1792 |
} u; |
1793 |
|
1794 |
u.f = int64_to_float64(val, &env->spe_status); |
1795 |
|
1796 |
return u.u;
|
1797 |
} |
1798 |
|
1799 |
static inline uint64_t _do_efdcfui (uint64_t val) |
1800 |
{ |
1801 |
union {
|
1802 |
uint64_t u; |
1803 |
float64 f; |
1804 |
} u; |
1805 |
|
1806 |
u.f = uint64_to_float64(val, &env->spe_status); |
1807 |
|
1808 |
return u.u;
|
1809 |
} |
1810 |
|
1811 |
static inline int64_t _do_efdctsi (uint64_t val) |
1812 |
{ |
1813 |
union {
|
1814 |
int64_t u; |
1815 |
float64 f; |
1816 |
} u; |
1817 |
|
1818 |
u.u = val; |
1819 |
/* NaN are not treated the same way IEEE 754 does */
|
1820 |
if (unlikely(isnan(u.f)))
|
1821 |
return 0; |
1822 |
|
1823 |
return float64_to_int64(u.f, &env->spe_status);
|
1824 |
} |
1825 |
|
1826 |
static inline uint64_t _do_efdctui (uint64_t val) |
1827 |
{ |
1828 |
union {
|
1829 |
int64_t u; |
1830 |
float64 f; |
1831 |
} u; |
1832 |
|
1833 |
u.u = val; |
1834 |
/* NaN are not treated the same way IEEE 754 does */
|
1835 |
if (unlikely(isnan(u.f)))
|
1836 |
return 0; |
1837 |
|
1838 |
return float64_to_uint64(u.f, &env->spe_status);
|
1839 |
} |
1840 |
|
1841 |
static inline int64_t _do_efdctsiz (uint64_t val) |
1842 |
{ |
1843 |
union {
|
1844 |
int64_t u; |
1845 |
float64 f; |
1846 |
} u; |
1847 |
|
1848 |
u.u = val; |
1849 |
/* NaN are not treated the same way IEEE 754 does */
|
1850 |
if (unlikely(isnan(u.f)))
|
1851 |
return 0; |
1852 |
|
1853 |
return float64_to_int64_round_to_zero(u.f, &env->spe_status);
|
1854 |
} |
1855 |
|
1856 |
static inline uint64_t _do_efdctuiz (uint64_t val) |
1857 |
{ |
1858 |
union {
|
1859 |
int64_t u; |
1860 |
float64 f; |
1861 |
} u; |
1862 |
|
1863 |
u.u = val; |
1864 |
/* NaN are not treated the same way IEEE 754 does */
|
1865 |
if (unlikely(isnan(u.f)))
|
1866 |
return 0; |
1867 |
|
1868 |
return float64_to_uint64_round_to_zero(u.f, &env->spe_status);
|
1869 |
} |
1870 |
|
1871 |
void do_efdcfsi (void) |
1872 |
{ |
1873 |
T0_64 = _do_efdcfsi(T0_64); |
1874 |
} |
1875 |
|
1876 |
void do_efdcfui (void) |
1877 |
{ |
1878 |
T0_64 = _do_efdcfui(T0_64); |
1879 |
} |
1880 |
|
1881 |
void do_efdctsi (void) |
1882 |
{ |
1883 |
T0_64 = _do_efdctsi(T0_64); |
1884 |
} |
1885 |
|
1886 |
void do_efdctui (void) |
1887 |
{ |
1888 |
T0_64 = _do_efdctui(T0_64); |
1889 |
} |
1890 |
|
1891 |
void do_efdctsiz (void) |
1892 |
{ |
1893 |
T0_64 = _do_efdctsiz(T0_64); |
1894 |
} |
1895 |
|
1896 |
void do_efdctuiz (void) |
1897 |
{ |
1898 |
T0_64 = _do_efdctuiz(T0_64); |
1899 |
} |
1900 |
|
1901 |
/* Double precision floating-point conversion to/from fractional */
|
1902 |
static inline uint64_t _do_efdcfsf (int64_t val) |
1903 |
{ |
1904 |
union {
|
1905 |
uint64_t u; |
1906 |
float64 f; |
1907 |
} u; |
1908 |
float64 tmp; |
1909 |
|
1910 |
u.f = int32_to_float64(val, &env->spe_status); |
1911 |
tmp = int64_to_float64(1ULL << 32, &env->spe_status); |
1912 |
u.f = float64_div(u.f, tmp, &env->spe_status); |
1913 |
|
1914 |
return u.u;
|
1915 |
} |
1916 |
|
1917 |
static inline uint64_t _do_efdcfuf (uint64_t val) |
1918 |
{ |
1919 |
union {
|
1920 |
uint64_t u; |
1921 |
float64 f; |
1922 |
} u; |
1923 |
float64 tmp; |
1924 |
|
1925 |
u.f = uint32_to_float64(val, &env->spe_status); |
1926 |
tmp = int64_to_float64(1ULL << 32, &env->spe_status); |
1927 |
u.f = float64_div(u.f, tmp, &env->spe_status); |
1928 |
|
1929 |
return u.u;
|
1930 |
} |
1931 |
|
1932 |
static inline int64_t _do_efdctsf (uint64_t val) |
1933 |
{ |
1934 |
union {
|
1935 |
int64_t u; |
1936 |
float64 f; |
1937 |
} u; |
1938 |
float64 tmp; |
1939 |
|
1940 |
u.u = val; |
1941 |
/* NaN are not treated the same way IEEE 754 does */
|
1942 |
if (unlikely(isnan(u.f)))
|
1943 |
return 0; |
1944 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
1945 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
1946 |
|
1947 |
return float64_to_int32(u.f, &env->spe_status);
|
1948 |
} |
1949 |
|
1950 |
static inline uint64_t _do_efdctuf (uint64_t val) |
1951 |
{ |
1952 |
union {
|
1953 |
int64_t u; |
1954 |
float64 f; |
1955 |
} u; |
1956 |
float64 tmp; |
1957 |
|
1958 |
u.u = val; |
1959 |
/* NaN are not treated the same way IEEE 754 does */
|
1960 |
if (unlikely(isnan(u.f)))
|
1961 |
return 0; |
1962 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
1963 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
1964 |
|
1965 |
return float64_to_uint32(u.f, &env->spe_status);
|
1966 |
} |
1967 |
|
1968 |
static inline int64_t _do_efdctsfz (uint64_t val) |
1969 |
{ |
1970 |
union {
|
1971 |
int64_t u; |
1972 |
float64 f; |
1973 |
} u; |
1974 |
float64 tmp; |
1975 |
|
1976 |
u.u = val; |
1977 |
/* NaN are not treated the same way IEEE 754 does */
|
1978 |
if (unlikely(isnan(u.f)))
|
1979 |
return 0; |
1980 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
1981 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
1982 |
|
1983 |
return float64_to_int32_round_to_zero(u.f, &env->spe_status);
|
1984 |
} |
1985 |
|
1986 |
static inline uint64_t _do_efdctufz (uint64_t val) |
1987 |
{ |
1988 |
union {
|
1989 |
int64_t u; |
1990 |
float64 f; |
1991 |
} u; |
1992 |
float64 tmp; |
1993 |
|
1994 |
u.u = val; |
1995 |
/* NaN are not treated the same way IEEE 754 does */
|
1996 |
if (unlikely(isnan(u.f)))
|
1997 |
return 0; |
1998 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
1999 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
2000 |
|
2001 |
return float64_to_uint32_round_to_zero(u.f, &env->spe_status);
|
2002 |
} |
2003 |
|
2004 |
void do_efdcfsf (void) |
2005 |
{ |
2006 |
T0_64 = _do_efdcfsf(T0_64); |
2007 |
} |
2008 |
|
2009 |
void do_efdcfuf (void) |
2010 |
{ |
2011 |
T0_64 = _do_efdcfuf(T0_64); |
2012 |
} |
2013 |
|
2014 |
void do_efdctsf (void) |
2015 |
{ |
2016 |
T0_64 = _do_efdctsf(T0_64); |
2017 |
} |
2018 |
|
2019 |
void do_efdctuf (void) |
2020 |
{ |
2021 |
T0_64 = _do_efdctuf(T0_64); |
2022 |
} |
2023 |
|
2024 |
void do_efdctsfz (void) |
2025 |
{ |
2026 |
T0_64 = _do_efdctsfz(T0_64); |
2027 |
} |
2028 |
|
2029 |
void do_efdctufz (void) |
2030 |
{ |
2031 |
T0_64 = _do_efdctufz(T0_64); |
2032 |
} |
2033 |
|
2034 |
/* Floating point conversion between single and double precision */
|
2035 |
static inline uint32_t _do_efscfd (uint64_t val) |
2036 |
{ |
2037 |
union {
|
2038 |
uint64_t u; |
2039 |
float64 f; |
2040 |
} u1; |
2041 |
union {
|
2042 |
uint32_t u; |
2043 |
float32 f; |
2044 |
} u2; |
2045 |
|
2046 |
u1.u = val; |
2047 |
u2.f = float64_to_float32(u1.f, &env->spe_status); |
2048 |
|
2049 |
return u2.u;
|
2050 |
} |
2051 |
|
2052 |
static inline uint64_t _do_efdcfs (uint32_t val) |
2053 |
{ |
2054 |
union {
|
2055 |
uint64_t u; |
2056 |
float64 f; |
2057 |
} u2; |
2058 |
union {
|
2059 |
uint32_t u; |
2060 |
float32 f; |
2061 |
} u1; |
2062 |
|
2063 |
u1.u = val; |
2064 |
u2.f = float32_to_float64(u1.f, &env->spe_status); |
2065 |
|
2066 |
return u2.u;
|
2067 |
} |
2068 |
|
2069 |
void do_efscfd (void) |
2070 |
{ |
2071 |
T0_64 = _do_efscfd(T0_64); |
2072 |
} |
2073 |
|
2074 |
void do_efdcfs (void) |
2075 |
{ |
2076 |
T0_64 = _do_efdcfs(T0_64); |
2077 |
} |
2078 |
|
2079 |
/* Single precision fixed-point vector arithmetic */
|
2080 |
/* evfsabs */
|
2081 |
DO_SPE_OP1(fsabs); |
2082 |
/* evfsnabs */
|
2083 |
DO_SPE_OP1(fsnabs); |
2084 |
/* evfsneg */
|
2085 |
DO_SPE_OP1(fsneg); |
2086 |
/* evfsadd */
|
2087 |
DO_SPE_OP2(fsadd); |
2088 |
/* evfssub */
|
2089 |
DO_SPE_OP2(fssub); |
2090 |
/* evfsmul */
|
2091 |
DO_SPE_OP2(fsmul); |
2092 |
/* evfsdiv */
|
2093 |
DO_SPE_OP2(fsdiv); |
2094 |
|
2095 |
/* Single-precision floating-point comparisons */
|
2096 |
static inline int _do_efscmplt (uint32_t op1, uint32_t op2) |
2097 |
{ |
2098 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
2099 |
return _do_efststlt(op1, op2);
|
2100 |
} |
2101 |
|
2102 |
static inline int _do_efscmpgt (uint32_t op1, uint32_t op2) |
2103 |
{ |
2104 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
2105 |
return _do_efststgt(op1, op2);
|
2106 |
} |
2107 |
|
2108 |
static inline int _do_efscmpeq (uint32_t op1, uint32_t op2) |
2109 |
{ |
2110 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
2111 |
return _do_efststeq(op1, op2);
|
2112 |
} |
2113 |
|
2114 |
void do_efscmplt (void) |
2115 |
{ |
2116 |
T0 = _do_efscmplt(T0_64, T1_64); |
2117 |
} |
2118 |
|
2119 |
void do_efscmpgt (void) |
2120 |
{ |
2121 |
T0 = _do_efscmpgt(T0_64, T1_64); |
2122 |
} |
2123 |
|
2124 |
void do_efscmpeq (void) |
2125 |
{ |
2126 |
T0 = _do_efscmpeq(T0_64, T1_64); |
2127 |
} |
2128 |
|
2129 |
/* Single-precision floating-point vector comparisons */
|
2130 |
/* evfscmplt */
|
2131 |
DO_SPE_CMP(fscmplt); |
2132 |
/* evfscmpgt */
|
2133 |
DO_SPE_CMP(fscmpgt); |
2134 |
/* evfscmpeq */
|
2135 |
DO_SPE_CMP(fscmpeq); |
2136 |
/* evfststlt */
|
2137 |
DO_SPE_CMP(fststlt); |
2138 |
/* evfststgt */
|
2139 |
DO_SPE_CMP(fststgt); |
2140 |
/* evfststeq */
|
2141 |
DO_SPE_CMP(fststeq); |
2142 |
|
2143 |
/* Single-precision floating-point vector conversions */
|
2144 |
/* evfscfsi */
|
2145 |
DO_SPE_OP1(fscfsi); |
2146 |
/* evfscfui */
|
2147 |
DO_SPE_OP1(fscfui); |
2148 |
/* evfscfuf */
|
2149 |
DO_SPE_OP1(fscfuf); |
2150 |
/* evfscfsf */
|
2151 |
DO_SPE_OP1(fscfsf); |
2152 |
/* evfsctsi */
|
2153 |
DO_SPE_OP1(fsctsi); |
2154 |
/* evfsctui */
|
2155 |
DO_SPE_OP1(fsctui); |
2156 |
/* evfsctsiz */
|
2157 |
DO_SPE_OP1(fsctsiz); |
2158 |
/* evfsctuiz */
|
2159 |
DO_SPE_OP1(fsctuiz); |
2160 |
/* evfsctsf */
|
2161 |
DO_SPE_OP1(fsctsf); |
2162 |
/* evfsctuf */
|
2163 |
DO_SPE_OP1(fsctuf); |
2164 |
#endif /* defined(TARGET_PPCSPE) */ |
2165 |
|
2166 |
/*****************************************************************************/
|
2167 |
/* Softmmu support */
|
2168 |
#if !defined (CONFIG_USER_ONLY)
|
2169 |
|
2170 |
#define MMUSUFFIX _mmu
|
2171 |
#define GETPC() (__builtin_return_address(0)) |
2172 |
|
2173 |
#define SHIFT 0 |
2174 |
#include "softmmu_template.h" |
2175 |
|
2176 |
#define SHIFT 1 |
2177 |
#include "softmmu_template.h" |
2178 |
|
2179 |
#define SHIFT 2 |
2180 |
#include "softmmu_template.h" |
2181 |
|
2182 |
#define SHIFT 3 |
2183 |
#include "softmmu_template.h" |
2184 |
|
2185 |
/* try to fill the TLB and return an exception if error. If retaddr is
|
2186 |
NULL, it means that the function was called in C code (i.e. not
|
2187 |
from generated code or from helper.c) */
|
2188 |
/* XXX: fix it to restore all registers */
|
2189 |
void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr) |
2190 |
{ |
2191 |
TranslationBlock *tb; |
2192 |
CPUState *saved_env; |
2193 |
target_phys_addr_t pc; |
2194 |
int ret;
|
2195 |
|
2196 |
/* XXX: hack to restore env in all cases, even if not called from
|
2197 |
generated code */
|
2198 |
saved_env = env; |
2199 |
env = cpu_single_env; |
2200 |
ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, is_user, 1);
|
2201 |
if (unlikely(ret != 0)) { |
2202 |
if (likely(retaddr)) {
|
2203 |
/* now we have a real cpu fault */
|
2204 |
pc = (target_phys_addr_t)retaddr; |
2205 |
tb = tb_find_pc(pc); |
2206 |
if (likely(tb)) {
|
2207 |
/* the PC is inside the translated code. It means that we have
|
2208 |
a virtual CPU fault */
|
2209 |
cpu_restore_state(tb, env, pc, NULL);
|
2210 |
} |
2211 |
} |
2212 |
do_raise_exception_err(env->exception_index, env->error_code); |
2213 |
} |
2214 |
env = saved_env; |
2215 |
} |
2216 |
|
2217 |
/* TLB invalidation helpers */
|
2218 |
void do_tlbia (void) |
2219 |
{ |
2220 |
if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_6xx)) {
|
2221 |
ppc6xx_tlb_invalidate_all(env); |
2222 |
} else if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_4xx)) { |
2223 |
/* XXX: TODO */
|
2224 |
#if 0
|
2225 |
ppcbooke_tlb_invalidate_all(env);
|
2226 |
#endif
|
2227 |
} else {
|
2228 |
tlb_flush(env, 1);
|
2229 |
} |
2230 |
} |
2231 |
|
2232 |
void do_tlbie (void) |
2233 |
{ |
2234 |
T0 = (uint32_t)T0; |
2235 |
#if !defined(FLUSH_ALL_TLBS)
|
2236 |
if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_6xx)) {
|
2237 |
ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 0);
|
2238 |
if (env->id_tlbs == 1) |
2239 |
ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 1);
|
2240 |
} else if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_4xx)) { |
2241 |
/* XXX: TODO */
|
2242 |
#if 0
|
2243 |
ppcbooke_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK,
|
2244 |
env->spr[SPR_BOOKE_PID]);
|
2245 |
#endif
|
2246 |
} else {
|
2247 |
/* tlbie invalidate TLBs for all segments */
|
2248 |
T0 &= TARGET_PAGE_MASK; |
2249 |
T0 &= ~((target_ulong)-1 << 28); |
2250 |
/* XXX: this case should be optimized,
|
2251 |
* giving a mask to tlb_flush_page
|
2252 |
*/
|
2253 |
tlb_flush_page(env, T0 | (0x0 << 28)); |
2254 |
tlb_flush_page(env, T0 | (0x1 << 28)); |
2255 |
tlb_flush_page(env, T0 | (0x2 << 28)); |
2256 |
tlb_flush_page(env, T0 | (0x3 << 28)); |
2257 |
tlb_flush_page(env, T0 | (0x4 << 28)); |
2258 |
tlb_flush_page(env, T0 | (0x5 << 28)); |
2259 |
tlb_flush_page(env, T0 | (0x6 << 28)); |
2260 |
tlb_flush_page(env, T0 | (0x7 << 28)); |
2261 |
tlb_flush_page(env, T0 | (0x8 << 28)); |
2262 |
tlb_flush_page(env, T0 | (0x9 << 28)); |
2263 |
tlb_flush_page(env, T0 | (0xA << 28)); |
2264 |
tlb_flush_page(env, T0 | (0xB << 28)); |
2265 |
tlb_flush_page(env, T0 | (0xC << 28)); |
2266 |
tlb_flush_page(env, T0 | (0xD << 28)); |
2267 |
tlb_flush_page(env, T0 | (0xE << 28)); |
2268 |
tlb_flush_page(env, T0 | (0xF << 28)); |
2269 |
} |
2270 |
#else
|
2271 |
do_tlbia(); |
2272 |
#endif
|
2273 |
} |
2274 |
|
2275 |
#if defined(TARGET_PPC64)
|
2276 |
void do_tlbie_64 (void) |
2277 |
{ |
2278 |
T0 = (uint64_t)T0; |
2279 |
#if !defined(FLUSH_ALL_TLBS)
|
2280 |
if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_6xx)) {
|
2281 |
ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 0);
|
2282 |
if (env->id_tlbs == 1) |
2283 |
ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 1);
|
2284 |
} else if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_4xx)) { |
2285 |
/* XXX: TODO */
|
2286 |
#if 0
|
2287 |
ppcbooke_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK,
|
2288 |
env->spr[SPR_BOOKE_PID]);
|
2289 |
#endif
|
2290 |
} else {
|
2291 |
/* tlbie invalidate TLBs for all segments
|
2292 |
* As we have 2^36 segments, invalidate all qemu TLBs
|
2293 |
*/
|
2294 |
#if 0
|
2295 |
T0 &= TARGET_PAGE_MASK;
|
2296 |
T0 &= ~((target_ulong)-1 << 28);
|
2297 |
/* XXX: this case should be optimized,
|
2298 |
* giving a mask to tlb_flush_page
|
2299 |
*/
|
2300 |
tlb_flush_page(env, T0 | (0x0 << 28));
|
2301 |
tlb_flush_page(env, T0 | (0x1 << 28));
|
2302 |
tlb_flush_page(env, T0 | (0x2 << 28));
|
2303 |
tlb_flush_page(env, T0 | (0x3 << 28));
|
2304 |
tlb_flush_page(env, T0 | (0x4 << 28));
|
2305 |
tlb_flush_page(env, T0 | (0x5 << 28));
|
2306 |
tlb_flush_page(env, T0 | (0x6 << 28));
|
2307 |
tlb_flush_page(env, T0 | (0x7 << 28));
|
2308 |
tlb_flush_page(env, T0 | (0x8 << 28));
|
2309 |
tlb_flush_page(env, T0 | (0x9 << 28));
|
2310 |
tlb_flush_page(env, T0 | (0xA << 28));
|
2311 |
tlb_flush_page(env, T0 | (0xB << 28));
|
2312 |
tlb_flush_page(env, T0 | (0xC << 28));
|
2313 |
tlb_flush_page(env, T0 | (0xD << 28));
|
2314 |
tlb_flush_page(env, T0 | (0xE << 28));
|
2315 |
tlb_flush_page(env, T0 | (0xF << 28));
|
2316 |
#else
|
2317 |
tlb_flush(env, 1);
|
2318 |
#endif
|
2319 |
} |
2320 |
#else
|
2321 |
do_tlbia(); |
2322 |
#endif
|
2323 |
} |
2324 |
#endif
|
2325 |
|
2326 |
#if defined(TARGET_PPC64)
|
2327 |
void do_slbia (void) |
2328 |
{ |
2329 |
/* XXX: TODO */
|
2330 |
tlb_flush(env, 1);
|
2331 |
} |
2332 |
|
2333 |
void do_slbie (void) |
2334 |
{ |
2335 |
/* XXX: TODO */
|
2336 |
tlb_flush(env, 1);
|
2337 |
} |
2338 |
#endif
|
2339 |
|
2340 |
/* Software driven TLBs management */
|
2341 |
/* PowerPC 602/603 software TLB load instructions helpers */
|
2342 |
void do_load_6xx_tlb (int is_code) |
2343 |
{ |
2344 |
target_ulong RPN, CMP, EPN; |
2345 |
int way;
|
2346 |
|
2347 |
RPN = env->spr[SPR_RPA]; |
2348 |
if (is_code) {
|
2349 |
CMP = env->spr[SPR_ICMP]; |
2350 |
EPN = env->spr[SPR_IMISS]; |
2351 |
} else {
|
2352 |
CMP = env->spr[SPR_DCMP]; |
2353 |
EPN = env->spr[SPR_DMISS]; |
2354 |
} |
2355 |
way = (env->spr[SPR_SRR1] >> 17) & 1; |
2356 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2357 |
if (loglevel != 0) { |
2358 |
fprintf(logfile, "%s: EPN %08lx %08lx PTE0 %08lx PTE1 %08lx way %d\n",
|
2359 |
__func__, (unsigned long)T0, (unsigned long)EPN, |
2360 |
(unsigned long)CMP, (unsigned long)RPN, way); |
2361 |
} |
2362 |
#endif
|
2363 |
/* Store this TLB */
|
2364 |
ppc6xx_tlb_store(env, (uint32_t)(T0 & TARGET_PAGE_MASK), |
2365 |
way, is_code, CMP, RPN); |
2366 |
} |
2367 |
|
2368 |
static target_ulong booke_tlb_to_page_size (int size) |
2369 |
{ |
2370 |
return 1024 << (2 * size); |
2371 |
} |
2372 |
|
2373 |
static int booke_page_size_to_tlb (target_ulong page_size) |
2374 |
{ |
2375 |
int size;
|
2376 |
|
2377 |
switch (page_size) {
|
2378 |
case 0x00000400UL: |
2379 |
size = 0x0;
|
2380 |
break;
|
2381 |
case 0x00001000UL: |
2382 |
size = 0x1;
|
2383 |
break;
|
2384 |
case 0x00004000UL: |
2385 |
size = 0x2;
|
2386 |
break;
|
2387 |
case 0x00010000UL: |
2388 |
size = 0x3;
|
2389 |
break;
|
2390 |
case 0x00040000UL: |
2391 |
size = 0x4;
|
2392 |
break;
|
2393 |
case 0x00100000UL: |
2394 |
size = 0x5;
|
2395 |
break;
|
2396 |
case 0x00400000UL: |
2397 |
size = 0x6;
|
2398 |
break;
|
2399 |
case 0x01000000UL: |
2400 |
size = 0x7;
|
2401 |
break;
|
2402 |
case 0x04000000UL: |
2403 |
size = 0x8;
|
2404 |
break;
|
2405 |
case 0x10000000UL: |
2406 |
size = 0x9;
|
2407 |
break;
|
2408 |
case 0x40000000UL: |
2409 |
size = 0xA;
|
2410 |
break;
|
2411 |
#if defined (TARGET_PPC64)
|
2412 |
case 0x000100000000ULL: |
2413 |
size = 0xB;
|
2414 |
break;
|
2415 |
case 0x000400000000ULL: |
2416 |
size = 0xC;
|
2417 |
break;
|
2418 |
case 0x001000000000ULL: |
2419 |
size = 0xD;
|
2420 |
break;
|
2421 |
case 0x004000000000ULL: |
2422 |
size = 0xE;
|
2423 |
break;
|
2424 |
case 0x010000000000ULL: |
2425 |
size = 0xF;
|
2426 |
break;
|
2427 |
#endif
|
2428 |
default:
|
2429 |
size = -1;
|
2430 |
break;
|
2431 |
} |
2432 |
|
2433 |
return size;
|
2434 |
} |
2435 |
|
2436 |
/* Helpers for 4xx TLB management */
|
2437 |
void do_4xx_tlbia (void) |
2438 |
{ |
2439 |
ppcemb_tlb_t *tlb; |
2440 |
int i;
|
2441 |
|
2442 |
for (i = 0; i < 64; i++) { |
2443 |
tlb = &env->tlb[i].tlbe; |
2444 |
if (tlb->prot & PAGE_VALID) {
|
2445 |
#if 0
|
2446 |
end = tlb->EPN + tlb->size;
|
2447 |
for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
|
2448 |
tlb_flush_page(env, page);
|
2449 |
#endif
|
2450 |
tlb->prot &= ~PAGE_VALID; |
2451 |
} |
2452 |
} |
2453 |
tlb_flush(env, 1);
|
2454 |
} |
2455 |
|
2456 |
void do_4xx_tlbre_lo (void) |
2457 |
{ |
2458 |
ppcemb_tlb_t *tlb; |
2459 |
int size;
|
2460 |
|
2461 |
T0 &= 0x3F;
|
2462 |
tlb = &env->tlb[T0].tlbe; |
2463 |
T0 = tlb->EPN; |
2464 |
if (tlb->prot & PAGE_VALID)
|
2465 |
T0 |= 0x400;
|
2466 |
size = booke_page_size_to_tlb(tlb->size); |
2467 |
if (size < 0 || size > 0x7) |
2468 |
size = 1;
|
2469 |
T0 |= size << 7;
|
2470 |
env->spr[SPR_40x_PID] = tlb->PID; |
2471 |
} |
2472 |
|
2473 |
void do_4xx_tlbre_hi (void) |
2474 |
{ |
2475 |
ppcemb_tlb_t *tlb; |
2476 |
|
2477 |
T0 &= 0x3F;
|
2478 |
tlb = &env->tlb[T0].tlbe; |
2479 |
T0 = tlb->RPN; |
2480 |
if (tlb->prot & PAGE_EXEC)
|
2481 |
T0 |= 0x200;
|
2482 |
if (tlb->prot & PAGE_WRITE)
|
2483 |
T0 |= 0x100;
|
2484 |
} |
2485 |
|
2486 |
static int tlb_4xx_search (target_ulong virtual) |
2487 |
{ |
2488 |
ppcemb_tlb_t *tlb; |
2489 |
target_ulong base, mask; |
2490 |
int i, ret;
|
2491 |
|
2492 |
/* Default return value is no match */
|
2493 |
ret = -1;
|
2494 |
for (i = 0; i < 64; i++) { |
2495 |
tlb = &env->tlb[i].tlbe; |
2496 |
/* Check TLB validity */
|
2497 |
if (!(tlb->prot & PAGE_VALID))
|
2498 |
continue;
|
2499 |
/* Check TLB PID vs current PID */
|
2500 |
if (tlb->PID != 0 && tlb->PID != env->spr[SPR_40x_PID]) |
2501 |
continue;
|
2502 |
/* Check TLB address vs virtual address */
|
2503 |
base = tlb->EPN; |
2504 |
mask = ~(tlb->size - 1);
|
2505 |
if ((base & mask) != (virtual & mask))
|
2506 |
continue;
|
2507 |
ret = i; |
2508 |
break;
|
2509 |
} |
2510 |
|
2511 |
return ret;
|
2512 |
} |
2513 |
|
2514 |
void do_4xx_tlbsx (void) |
2515 |
{ |
2516 |
T0 = tlb_4xx_search(T0); |
2517 |
} |
2518 |
|
2519 |
void do_4xx_tlbsx_ (void) |
2520 |
{ |
2521 |
int tmp = xer_ov;
|
2522 |
|
2523 |
T0 = tlb_4xx_search(T0); |
2524 |
if (T0 != -1) |
2525 |
tmp |= 0x02;
|
2526 |
env->crf[0] = tmp;
|
2527 |
} |
2528 |
|
2529 |
void do_4xx_tlbwe_lo (void) |
2530 |
{ |
2531 |
ppcemb_tlb_t *tlb; |
2532 |
target_ulong page, end; |
2533 |
|
2534 |
T0 &= 0x3F;
|
2535 |
tlb = &env->tlb[T0].tlbe; |
2536 |
/* Invalidate previous TLB (if it's valid) */
|
2537 |
if (tlb->prot & PAGE_VALID) {
|
2538 |
end = tlb->EPN + tlb->size; |
2539 |
for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
|
2540 |
tlb_flush_page(env, page); |
2541 |
} |
2542 |
tlb->size = booke_tlb_to_page_size((T1 >> 7) & 0x7); |
2543 |
tlb->EPN = (T1 & 0xFFFFFC00) & ~(tlb->size - 1); |
2544 |
if (T1 & 0x400) |
2545 |
tlb->prot |= PAGE_VALID; |
2546 |
else
|
2547 |
tlb->prot &= ~PAGE_VALID; |
2548 |
tlb->PID = env->spr[SPR_BOOKE_PID]; /* PID */
|
2549 |
tlb->attr = T1 & 0xFF;
|
2550 |
/* Invalidate new TLB (if valid) */
|
2551 |
if (tlb->prot & PAGE_VALID) {
|
2552 |
end = tlb->EPN + tlb->size; |
2553 |
for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
|
2554 |
tlb_flush_page(env, page); |
2555 |
} |
2556 |
} |
2557 |
|
2558 |
void do_4xx_tlbwe_hi (void) |
2559 |
{ |
2560 |
ppcemb_tlb_t *tlb; |
2561 |
|
2562 |
T0 &= 0x3F;
|
2563 |
tlb = &env->tlb[T0].tlbe; |
2564 |
tlb->RPN = T1 & 0xFFFFFC00;
|
2565 |
tlb->prot = PAGE_READ; |
2566 |
if (T1 & 0x200) |
2567 |
tlb->prot |= PAGE_EXEC; |
2568 |
if (T1 & 0x100) |
2569 |
tlb->prot |= PAGE_WRITE; |
2570 |
} |
2571 |
#endif /* !CONFIG_USER_ONLY */ |