root / hw / arm_sysctl.c @ 86d86414
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1 | 5fafdf24 | ths | /*
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2 | e69954b9 | pbrook | * Status and system control registers for ARM RealView/Versatile boards.
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3 | e69954b9 | pbrook | *
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4 | 9ee6e8bb | pbrook | * Copyright (c) 2006-2007 CodeSourcery.
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5 | e69954b9 | pbrook | * Written by Paul Brook
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6 | e69954b9 | pbrook | *
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7 | e69954b9 | pbrook | * This code is licenced under the GPL.
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8 | e69954b9 | pbrook | */
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9 | e69954b9 | pbrook | |
10 | 042eb37a | Daniel Jacobowitz | #include "hw.h" |
11 | 042eb37a | Daniel Jacobowitz | #include "qemu-timer.h" |
12 | 82634c2d | Paul Brook | #include "sysbus.h" |
13 | 9596ebb7 | pbrook | #include "primecell.h" |
14 | 87ecb68b | pbrook | #include "sysemu.h" |
15 | e69954b9 | pbrook | |
16 | e69954b9 | pbrook | #define LOCK_VALUE 0xa05f |
17 | e69954b9 | pbrook | |
18 | e69954b9 | pbrook | typedef struct { |
19 | 82634c2d | Paul Brook | SysBusDevice busdev; |
20 | e69954b9 | pbrook | uint32_t sys_id; |
21 | e69954b9 | pbrook | uint32_t leds; |
22 | e69954b9 | pbrook | uint16_t lockval; |
23 | e69954b9 | pbrook | uint32_t cfgdata1; |
24 | e69954b9 | pbrook | uint32_t cfgdata2; |
25 | e69954b9 | pbrook | uint32_t flags; |
26 | e69954b9 | pbrook | uint32_t nvflags; |
27 | e69954b9 | pbrook | uint32_t resetlevel; |
28 | 26e92f65 | Paul Brook | uint32_t proc_id; |
29 | e69954b9 | pbrook | } arm_sysctl_state; |
30 | e69954b9 | pbrook | |
31 | b5ad0ae7 | Peter Maydell | static const VMStateDescription vmstate_arm_sysctl = { |
32 | b5ad0ae7 | Peter Maydell | .name = "realview_sysctl",
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33 | b5ad0ae7 | Peter Maydell | .version_id = 1,
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34 | b5ad0ae7 | Peter Maydell | .minimum_version_id = 1,
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35 | b5ad0ae7 | Peter Maydell | .fields = (VMStateField[]) { |
36 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT32(leds, arm_sysctl_state), |
37 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT16(lockval, arm_sysctl_state), |
38 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT32(cfgdata1, arm_sysctl_state), |
39 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT32(cfgdata2, arm_sysctl_state), |
40 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT32(flags, arm_sysctl_state), |
41 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT32(nvflags, arm_sysctl_state), |
42 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT32(resetlevel, arm_sysctl_state), |
43 | b5ad0ae7 | Peter Maydell | VMSTATE_END_OF_LIST() |
44 | b5ad0ae7 | Peter Maydell | } |
45 | b5ad0ae7 | Peter Maydell | }; |
46 | b5ad0ae7 | Peter Maydell | |
47 | be0f204a | Paul Brook | static void arm_sysctl_reset(DeviceState *d) |
48 | be0f204a | Paul Brook | { |
49 | be0f204a | Paul Brook | arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, sysbus_from_qdev(d)); |
50 | be0f204a | Paul Brook | |
51 | be0f204a | Paul Brook | s->leds = 0;
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52 | be0f204a | Paul Brook | s->lockval = 0;
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53 | be0f204a | Paul Brook | s->cfgdata1 = 0;
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54 | be0f204a | Paul Brook | s->cfgdata2 = 0;
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55 | be0f204a | Paul Brook | s->flags = 0;
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56 | be0f204a | Paul Brook | s->resetlevel = 0;
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57 | be0f204a | Paul Brook | } |
58 | be0f204a | Paul Brook | |
59 | c227f099 | Anthony Liguori | static uint32_t arm_sysctl_read(void *opaque, target_phys_addr_t offset) |
60 | e69954b9 | pbrook | { |
61 | e69954b9 | pbrook | arm_sysctl_state *s = (arm_sysctl_state *)opaque; |
62 | e69954b9 | pbrook | |
63 | e69954b9 | pbrook | switch (offset) {
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64 | e69954b9 | pbrook | case 0x00: /* ID */ |
65 | e69954b9 | pbrook | return s->sys_id;
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66 | e69954b9 | pbrook | case 0x04: /* SW */ |
67 | e69954b9 | pbrook | /* General purpose hardware switches.
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68 | e69954b9 | pbrook | We don't have a useful way of exposing these to the user. */
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69 | e69954b9 | pbrook | return 0; |
70 | e69954b9 | pbrook | case 0x08: /* LED */ |
71 | e69954b9 | pbrook | return s->leds;
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72 | e69954b9 | pbrook | case 0x20: /* LOCK */ |
73 | e69954b9 | pbrook | return s->lockval;
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74 | e69954b9 | pbrook | case 0x0c: /* OSC0 */ |
75 | e69954b9 | pbrook | case 0x10: /* OSC1 */ |
76 | e69954b9 | pbrook | case 0x14: /* OSC2 */ |
77 | e69954b9 | pbrook | case 0x18: /* OSC3 */ |
78 | e69954b9 | pbrook | case 0x1c: /* OSC4 */ |
79 | e69954b9 | pbrook | case 0x24: /* 100HZ */ |
80 | e69954b9 | pbrook | /* ??? Implement these. */
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81 | e69954b9 | pbrook | return 0; |
82 | e69954b9 | pbrook | case 0x28: /* CFGDATA1 */ |
83 | e69954b9 | pbrook | return s->cfgdata1;
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84 | e69954b9 | pbrook | case 0x2c: /* CFGDATA2 */ |
85 | e69954b9 | pbrook | return s->cfgdata2;
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86 | e69954b9 | pbrook | case 0x30: /* FLAGS */ |
87 | e69954b9 | pbrook | return s->flags;
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88 | e69954b9 | pbrook | case 0x38: /* NVFLAGS */ |
89 | e69954b9 | pbrook | return s->nvflags;
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90 | e69954b9 | pbrook | case 0x40: /* RESETCTL */ |
91 | e69954b9 | pbrook | return s->resetlevel;
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92 | e69954b9 | pbrook | case 0x44: /* PCICTL */ |
93 | e69954b9 | pbrook | return 1; |
94 | e69954b9 | pbrook | case 0x48: /* MCI */ |
95 | e69954b9 | pbrook | return 0; |
96 | e69954b9 | pbrook | case 0x4c: /* FLASH */ |
97 | e69954b9 | pbrook | return 0; |
98 | e69954b9 | pbrook | case 0x50: /* CLCD */ |
99 | e69954b9 | pbrook | return 0x1000; |
100 | e69954b9 | pbrook | case 0x54: /* CLCDSER */ |
101 | e69954b9 | pbrook | return 0; |
102 | e69954b9 | pbrook | case 0x58: /* BOOTCS */ |
103 | e69954b9 | pbrook | return 0; |
104 | e69954b9 | pbrook | case 0x5c: /* 24MHz */ |
105 | 042eb37a | Daniel Jacobowitz | return muldiv64(qemu_get_clock(vm_clock), 24000000, get_ticks_per_sec()); |
106 | e69954b9 | pbrook | case 0x60: /* MISC */ |
107 | e69954b9 | pbrook | return 0; |
108 | e69954b9 | pbrook | case 0x84: /* PROCID0 */ |
109 | 26e92f65 | Paul Brook | return s->proc_id;
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110 | e69954b9 | pbrook | case 0x88: /* PROCID1 */ |
111 | e69954b9 | pbrook | return 0xff000000; |
112 | e69954b9 | pbrook | case 0x64: /* DMAPSR0 */ |
113 | e69954b9 | pbrook | case 0x68: /* DMAPSR1 */ |
114 | e69954b9 | pbrook | case 0x6c: /* DMAPSR2 */ |
115 | e69954b9 | pbrook | case 0x70: /* IOSEL */ |
116 | e69954b9 | pbrook | case 0x74: /* PLDCTL */ |
117 | e69954b9 | pbrook | case 0x80: /* BUSID */ |
118 | e69954b9 | pbrook | case 0x8c: /* OSCRESET0 */ |
119 | e69954b9 | pbrook | case 0x90: /* OSCRESET1 */ |
120 | e69954b9 | pbrook | case 0x94: /* OSCRESET2 */ |
121 | e69954b9 | pbrook | case 0x98: /* OSCRESET3 */ |
122 | e69954b9 | pbrook | case 0x9c: /* OSCRESET4 */ |
123 | e69954b9 | pbrook | case 0xc0: /* SYS_TEST_OSC0 */ |
124 | e69954b9 | pbrook | case 0xc4: /* SYS_TEST_OSC1 */ |
125 | e69954b9 | pbrook | case 0xc8: /* SYS_TEST_OSC2 */ |
126 | e69954b9 | pbrook | case 0xcc: /* SYS_TEST_OSC3 */ |
127 | e69954b9 | pbrook | case 0xd0: /* SYS_TEST_OSC4 */ |
128 | e69954b9 | pbrook | return 0; |
129 | e69954b9 | pbrook | default:
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130 | e69954b9 | pbrook | printf ("arm_sysctl_read: Bad register offset 0x%x\n", (int)offset); |
131 | e69954b9 | pbrook | return 0; |
132 | e69954b9 | pbrook | } |
133 | e69954b9 | pbrook | } |
134 | e69954b9 | pbrook | |
135 | c227f099 | Anthony Liguori | static void arm_sysctl_write(void *opaque, target_phys_addr_t offset, |
136 | e69954b9 | pbrook | uint32_t val) |
137 | e69954b9 | pbrook | { |
138 | e69954b9 | pbrook | arm_sysctl_state *s = (arm_sysctl_state *)opaque; |
139 | e69954b9 | pbrook | |
140 | e69954b9 | pbrook | switch (offset) {
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141 | e69954b9 | pbrook | case 0x08: /* LED */ |
142 | e69954b9 | pbrook | s->leds = val; |
143 | e69954b9 | pbrook | case 0x0c: /* OSC0 */ |
144 | e69954b9 | pbrook | case 0x10: /* OSC1 */ |
145 | e69954b9 | pbrook | case 0x14: /* OSC2 */ |
146 | e69954b9 | pbrook | case 0x18: /* OSC3 */ |
147 | e69954b9 | pbrook | case 0x1c: /* OSC4 */ |
148 | e69954b9 | pbrook | /* ??? */
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149 | e69954b9 | pbrook | break;
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150 | e69954b9 | pbrook | case 0x20: /* LOCK */ |
151 | e69954b9 | pbrook | if (val == LOCK_VALUE)
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152 | e69954b9 | pbrook | s->lockval = val; |
153 | e69954b9 | pbrook | else
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154 | e69954b9 | pbrook | s->lockval = val & 0x7fff;
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155 | e69954b9 | pbrook | break;
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156 | e69954b9 | pbrook | case 0x28: /* CFGDATA1 */ |
157 | e69954b9 | pbrook | /* ??? Need to implement this. */
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158 | e69954b9 | pbrook | s->cfgdata1 = val; |
159 | e69954b9 | pbrook | break;
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160 | e69954b9 | pbrook | case 0x2c: /* CFGDATA2 */ |
161 | e69954b9 | pbrook | /* ??? Need to implement this. */
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162 | e69954b9 | pbrook | s->cfgdata2 = val; |
163 | e69954b9 | pbrook | break;
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164 | e69954b9 | pbrook | case 0x30: /* FLAGSSET */ |
165 | e69954b9 | pbrook | s->flags |= val; |
166 | e69954b9 | pbrook | break;
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167 | e69954b9 | pbrook | case 0x34: /* FLAGSCLR */ |
168 | e69954b9 | pbrook | s->flags &= ~val; |
169 | e69954b9 | pbrook | break;
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170 | e69954b9 | pbrook | case 0x38: /* NVFLAGSSET */ |
171 | e69954b9 | pbrook | s->nvflags |= val; |
172 | e69954b9 | pbrook | break;
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173 | e69954b9 | pbrook | case 0x3c: /* NVFLAGSCLR */ |
174 | e69954b9 | pbrook | s->nvflags &= ~val; |
175 | e69954b9 | pbrook | break;
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176 | e69954b9 | pbrook | case 0x40: /* RESETCTL */ |
177 | e69954b9 | pbrook | if (s->lockval == LOCK_VALUE) {
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178 | e69954b9 | pbrook | s->resetlevel = val; |
179 | e69954b9 | pbrook | if (val & 0x100) |
180 | f3d6b95e | pbrook | qemu_system_reset_request (); |
181 | e69954b9 | pbrook | } |
182 | e69954b9 | pbrook | break;
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183 | e69954b9 | pbrook | case 0x44: /* PCICTL */ |
184 | e69954b9 | pbrook | /* nothing to do. */
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185 | e69954b9 | pbrook | break;
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186 | e69954b9 | pbrook | case 0x4c: /* FLASH */ |
187 | e69954b9 | pbrook | case 0x50: /* CLCD */ |
188 | e69954b9 | pbrook | case 0x54: /* CLCDSER */ |
189 | e69954b9 | pbrook | case 0x64: /* DMAPSR0 */ |
190 | e69954b9 | pbrook | case 0x68: /* DMAPSR1 */ |
191 | e69954b9 | pbrook | case 0x6c: /* DMAPSR2 */ |
192 | e69954b9 | pbrook | case 0x70: /* IOSEL */ |
193 | e69954b9 | pbrook | case 0x74: /* PLDCTL */ |
194 | e69954b9 | pbrook | case 0x80: /* BUSID */ |
195 | e69954b9 | pbrook | case 0x84: /* PROCID0 */ |
196 | e69954b9 | pbrook | case 0x88: /* PROCID1 */ |
197 | e69954b9 | pbrook | case 0x8c: /* OSCRESET0 */ |
198 | e69954b9 | pbrook | case 0x90: /* OSCRESET1 */ |
199 | e69954b9 | pbrook | case 0x94: /* OSCRESET2 */ |
200 | e69954b9 | pbrook | case 0x98: /* OSCRESET3 */ |
201 | e69954b9 | pbrook | case 0x9c: /* OSCRESET4 */ |
202 | e69954b9 | pbrook | break;
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203 | e69954b9 | pbrook | default:
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204 | e69954b9 | pbrook | printf ("arm_sysctl_write: Bad register offset 0x%x\n", (int)offset); |
205 | e69954b9 | pbrook | return;
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206 | e69954b9 | pbrook | } |
207 | e69954b9 | pbrook | } |
208 | e69954b9 | pbrook | |
209 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const arm_sysctl_readfn[] = { |
210 | e69954b9 | pbrook | arm_sysctl_read, |
211 | e69954b9 | pbrook | arm_sysctl_read, |
212 | e69954b9 | pbrook | arm_sysctl_read |
213 | e69954b9 | pbrook | }; |
214 | e69954b9 | pbrook | |
215 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const arm_sysctl_writefn[] = { |
216 | e69954b9 | pbrook | arm_sysctl_write, |
217 | e69954b9 | pbrook | arm_sysctl_write, |
218 | e69954b9 | pbrook | arm_sysctl_write |
219 | e69954b9 | pbrook | }; |
220 | e69954b9 | pbrook | |
221 | 81a322d4 | Gerd Hoffmann | static int arm_sysctl_init1(SysBusDevice *dev) |
222 | e69954b9 | pbrook | { |
223 | 82634c2d | Paul Brook | arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, dev); |
224 | e69954b9 | pbrook | int iomemtype;
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225 | e69954b9 | pbrook | |
226 | 1eed09cb | Avi Kivity | iomemtype = cpu_register_io_memory(arm_sysctl_readfn, |
227 | 2507c12a | Alexander Graf | arm_sysctl_writefn, s, |
228 | 2507c12a | Alexander Graf | DEVICE_NATIVE_ENDIAN); |
229 | 82634c2d | Paul Brook | sysbus_init_mmio(dev, 0x1000, iomemtype);
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230 | e69954b9 | pbrook | /* ??? Save/restore. */
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231 | 81a322d4 | Gerd Hoffmann | return 0; |
232 | e69954b9 | pbrook | } |
233 | 82634c2d | Paul Brook | |
234 | 82634c2d | Paul Brook | /* Legacy helper function. */
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235 | 26e92f65 | Paul Brook | void arm_sysctl_init(uint32_t base, uint32_t sys_id, uint32_t proc_id)
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236 | 82634c2d | Paul Brook | { |
237 | 82634c2d | Paul Brook | DeviceState *dev; |
238 | 82634c2d | Paul Brook | |
239 | 82634c2d | Paul Brook | dev = qdev_create(NULL, "realview_sysctl"); |
240 | ee6847d1 | Gerd Hoffmann | qdev_prop_set_uint32(dev, "sys_id", sys_id);
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241 | e23a1b33 | Markus Armbruster | qdev_init_nofail(dev); |
242 | 26e92f65 | Paul Brook | qdev_prop_set_uint32(dev, "proc_id", proc_id);
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243 | 82634c2d | Paul Brook | sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
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244 | 82634c2d | Paul Brook | } |
245 | 82634c2d | Paul Brook | |
246 | ee6847d1 | Gerd Hoffmann | static SysBusDeviceInfo arm_sysctl_info = {
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247 | ee6847d1 | Gerd Hoffmann | .init = arm_sysctl_init1, |
248 | ee6847d1 | Gerd Hoffmann | .qdev.name = "realview_sysctl",
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249 | ee6847d1 | Gerd Hoffmann | .qdev.size = sizeof(arm_sysctl_state),
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250 | b5ad0ae7 | Peter Maydell | .qdev.vmsd = &vmstate_arm_sysctl, |
251 | be0f204a | Paul Brook | .qdev.reset = arm_sysctl_reset, |
252 | ee6847d1 | Gerd Hoffmann | .qdev.props = (Property[]) { |
253 | e325775b | Gerd Hoffmann | DEFINE_PROP_UINT32("sys_id", arm_sysctl_state, sys_id, 0), |
254 | 26e92f65 | Paul Brook | DEFINE_PROP_UINT32("proc_id", arm_sysctl_state, proc_id, 0), |
255 | e325775b | Gerd Hoffmann | DEFINE_PROP_END_OF_LIST(), |
256 | ee6847d1 | Gerd Hoffmann | } |
257 | ee6847d1 | Gerd Hoffmann | }; |
258 | ee6847d1 | Gerd Hoffmann | |
259 | 82634c2d | Paul Brook | static void arm_sysctl_register_devices(void) |
260 | 82634c2d | Paul Brook | { |
261 | ee6847d1 | Gerd Hoffmann | sysbus_register_withprop(&arm_sysctl_info); |
262 | 82634c2d | Paul Brook | } |
263 | 82634c2d | Paul Brook | |
264 | 82634c2d | Paul Brook | device_init(arm_sysctl_register_devices) |