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/*
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* m68k micro operations
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*
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* Copyright (c) 2006-2007 CodeSourcery
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* Written by Paul Brook
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h" |
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#include "m68k-qreg.h" |
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#ifndef offsetof
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#define offsetof(type, field) ((size_t) &((type *)0)->field) |
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#endif
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static long qreg_offsets[] = { |
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#define DEFO32(name, offset) offsetof(CPUState, offset),
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#define DEFR(name, reg, mode) -1, |
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#define DEFF64(name, offset) offsetof(CPUState, offset),
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0,
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#include "qregs.def" |
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}; |
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#define CPU_FP_STATUS env->fp_status
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#define RAISE_EXCEPTION(n) do { \ |
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env->exception_index = n; \ |
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cpu_loop_exit(); \ |
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} while(0) |
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#define get_op helper_get_op
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#define set_op helper_set_op
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#define get_opf64 helper_get_opf64
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#define set_opf64 helper_set_opf64
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uint32_t |
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get_op(int qreg)
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{ |
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if (qreg >= TARGET_NUM_QREGS) {
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return env->qregs[qreg - TARGET_NUM_QREGS];
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} else if (qreg == QREG_T0) { |
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return T0;
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} else {
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return *(uint32_t *)(((long)env) + qreg_offsets[qreg]); |
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} |
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} |
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void set_op(int qreg, uint32_t val) |
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{ |
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if (qreg >= TARGET_NUM_QREGS) {
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env->qregs[qreg - TARGET_NUM_QREGS] = val; |
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} else if (qreg == QREG_T0) { |
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T0 = val; |
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} else {
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*(uint32_t *)(((long)env) + qreg_offsets[qreg]) = val;
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} |
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} |
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float64 get_opf64(int qreg)
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{ |
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if (qreg < TARGET_NUM_QREGS) {
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return *(float64 *)(((long)env) + qreg_offsets[qreg]); |
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} else {
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return *(float64 *)&env->qregs[qreg - TARGET_NUM_QREGS];
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} |
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} |
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void set_opf64(int qreg, float64 val) |
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{ |
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if (qreg < TARGET_NUM_QREGS) {
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*(float64 *)(((long)env) + qreg_offsets[qreg]) = val;
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} else {
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*(float64 *)&env->qregs[qreg - TARGET_NUM_QREGS] = val; |
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} |
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} |
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#define OP(name) void OPPROTO glue(op_,name) (void) |
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OP(mov32) |
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{ |
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set_op(PARAM1, get_op(PARAM2)); |
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FORCE_RET(); |
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} |
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OP(mov32_im) |
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{ |
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set_op(PARAM1, PARAM2); |
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FORCE_RET(); |
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} |
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|
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OP(movf64) |
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{ |
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set_opf64(PARAM1, get_opf64(PARAM2)); |
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FORCE_RET(); |
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} |
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|
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OP(zerof64) |
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{ |
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set_opf64(PARAM1, 0);
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FORCE_RET(); |
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} |
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OP(add32) |
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{ |
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uint32_t op2 = get_op(PARAM2); |
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uint32_t op3 = get_op(PARAM3); |
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set_op(PARAM1, op2 + op3); |
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FORCE_RET(); |
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} |
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OP(sub32) |
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{ |
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uint32_t op2 = get_op(PARAM2); |
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uint32_t op3 = get_op(PARAM3); |
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set_op(PARAM1, op2 - op3); |
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FORCE_RET(); |
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} |
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OP(mul32) |
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{ |
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uint32_t op2 = get_op(PARAM2); |
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uint32_t op3 = get_op(PARAM3); |
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set_op(PARAM1, op2 * op3); |
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FORCE_RET(); |
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} |
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OP(not32) |
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{ |
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uint32_t arg = get_op(PARAM2); |
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set_op(PARAM1, ~arg); |
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FORCE_RET(); |
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} |
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OP(neg32) |
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{ |
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uint32_t arg = get_op(PARAM2); |
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set_op(PARAM1, -arg); |
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FORCE_RET(); |
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} |
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OP(bswap32) |
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{ |
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uint32_t arg = get_op(PARAM2); |
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arg = (arg >> 24) | (arg << 24) |
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| ((arg >> 16) & 0xff00) | ((arg << 16) & 0xff0000); |
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set_op(PARAM1, arg); |
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FORCE_RET(); |
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} |
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OP(btest) |
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{ |
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uint32_t op1 = get_op(PARAM1); |
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uint32_t op2 = get_op(PARAM2); |
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if (op1 & op2)
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env->cc_dest &= ~CCF_Z; |
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else
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env->cc_dest |= CCF_Z; |
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FORCE_RET(); |
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} |
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OP(ff1) |
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{ |
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uint32_t arg = get_op(PARAM2); |
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int n;
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for (n = 32; arg; n--) |
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arg >>= 1;
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set_op(PARAM1, n); |
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FORCE_RET(); |
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} |
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OP(subx_cc) |
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{ |
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uint32_t op1 = get_op(PARAM1); |
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uint32_t op2 = get_op(PARAM2); |
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uint32_t res; |
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if (env->cc_x) {
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env->cc_x = (op1 <= op2); |
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env->cc_op = CC_OP_SUBX; |
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res = op1 - (op2 + 1);
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} else {
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env->cc_x = (op1 < op2); |
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env->cc_op = CC_OP_SUB; |
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res = op1 - op2; |
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} |
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set_op(PARAM1, res); |
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FORCE_RET(); |
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} |
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OP(addx_cc) |
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{ |
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uint32_t op1 = get_op(PARAM1); |
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uint32_t op2 = get_op(PARAM2); |
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uint32_t res; |
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if (env->cc_x) {
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res = op1 + op2 + 1;
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env->cc_x = (res <= op2); |
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env->cc_op = CC_OP_ADDX; |
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} else {
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res = op1 + op2; |
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env->cc_x = (res < op2); |
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env->cc_op = CC_OP_ADD; |
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} |
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set_op(PARAM1, res); |
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FORCE_RET(); |
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} |
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/* Logic ops. */
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OP(and32) |
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{ |
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uint32_t op2 = get_op(PARAM2); |
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uint32_t op3 = get_op(PARAM3); |
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set_op(PARAM1, op2 & op3); |
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FORCE_RET(); |
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} |
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OP(or32) |
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{ |
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uint32_t op2 = get_op(PARAM2); |
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uint32_t op3 = get_op(PARAM3); |
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set_op(PARAM1, op2 | op3); |
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FORCE_RET(); |
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} |
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OP(xor32) |
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{ |
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uint32_t op2 = get_op(PARAM2); |
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uint32_t op3 = get_op(PARAM3); |
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set_op(PARAM1, op2 ^ op3); |
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FORCE_RET(); |
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} |
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/* Shifts. */
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OP(shl32) |
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{ |
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uint32_t op2 = get_op(PARAM2); |
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uint32_t op3 = get_op(PARAM3); |
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uint32_t result; |
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result = op2 << op3; |
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set_op(PARAM1, result); |
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FORCE_RET(); |
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} |
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OP(shl_cc) |
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{ |
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uint32_t op1 = get_op(PARAM1); |
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uint32_t op2 = get_op(PARAM2); |
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uint32_t result; |
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result = op1 << op2; |
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set_op(PARAM1, result); |
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env->cc_x = (op1 << (op2 - 1)) & 1; |
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FORCE_RET(); |
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} |
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OP(shr32) |
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{ |
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uint32_t op2 = get_op(PARAM2); |
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uint32_t op3 = get_op(PARAM3); |
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uint32_t result; |
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result = op2 >> op3; |
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set_op(PARAM1, result); |
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FORCE_RET(); |
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} |
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OP(shr_cc) |
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{ |
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uint32_t op1 = get_op(PARAM1); |
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uint32_t op2 = get_op(PARAM2); |
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uint32_t result; |
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result = op1 >> op2; |
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set_op(PARAM1, result); |
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env->cc_x = (op1 >> (op2 - 1)) & 1; |
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FORCE_RET(); |
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} |
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OP(sar32) |
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{ |
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int32_t op2 = get_op(PARAM2); |
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uint32_t op3 = get_op(PARAM3); |
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uint32_t result; |
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result = op2 >> op3; |
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set_op(PARAM1, result); |
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FORCE_RET(); |
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} |
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OP(sar_cc) |
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{ |
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int32_t op1 = get_op(PARAM1); |
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uint32_t op2 = get_op(PARAM2); |
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uint32_t result; |
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result = op1 >> op2; |
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set_op(PARAM1, result); |
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env->cc_x = (op1 >> (op2 - 1)) & 1; |
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FORCE_RET(); |
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} |
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/* Value extend. */
|
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OP(ext8u32) |
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{ |
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uint32_t op2 = get_op(PARAM2); |
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set_op(PARAM1, (uint8_t)op2); |
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FORCE_RET(); |
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} |
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OP(ext8s32) |
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{ |
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uint32_t op2 = get_op(PARAM2); |
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set_op(PARAM1, (int8_t)op2); |
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FORCE_RET(); |
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} |
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OP(ext16u32) |
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{ |
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uint32_t op2 = get_op(PARAM2); |
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set_op(PARAM1, (uint16_t)op2); |
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FORCE_RET(); |
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} |
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|
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OP(ext16s32) |
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{ |
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uint32_t op2 = get_op(PARAM2); |
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set_op(PARAM1, (int16_t)op2); |
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FORCE_RET(); |
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} |
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|
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OP(flush_flags) |
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{ |
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cpu_m68k_flush_flags(env, env->cc_op); |
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FORCE_RET(); |
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} |
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|
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OP(divu) |
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{ |
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uint32_t num; |
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uint32_t den; |
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uint32_t quot; |
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uint32_t rem; |
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uint32_t flags; |
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num = env->div1; |
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den = env->div2; |
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/* ??? This needs to make sure the throwing location is accurate. */
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if (den == 0) |
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RAISE_EXCEPTION(EXCP_DIV0); |
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quot = num / den; |
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rem = num % den; |
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flags = 0;
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/* Avoid using a PARAM1 of zero. This breaks dyngen because it uses
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the address of a symbol, and gcc knows symbols can't have address
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zero. */
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if (PARAM1 == 2 && quot > 0xffff) |
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flags |= CCF_V; |
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if (quot == 0) |
367 |
flags |= CCF_Z; |
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else if ((int32_t)quot < 0) |
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flags |= CCF_N; |
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env->div1 = quot; |
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env->div2 = rem; |
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env->cc_dest = flags; |
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FORCE_RET(); |
374 |
} |
375 |
|
376 |
OP(divs) |
377 |
{ |
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int32_t num; |
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int32_t den; |
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int32_t quot; |
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int32_t rem; |
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int32_t flags; |
383 |
|
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num = env->div1; |
385 |
den = env->div2; |
386 |
if (den == 0) |
387 |
RAISE_EXCEPTION(EXCP_DIV0); |
388 |
quot = num / den; |
389 |
rem = num % den; |
390 |
flags = 0;
|
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if (PARAM1 == 2 && quot != (int16_t)quot) |
392 |
flags |= CCF_V; |
393 |
if (quot == 0) |
394 |
flags |= CCF_Z; |
395 |
else if (quot < 0) |
396 |
flags |= CCF_N; |
397 |
env->div1 = quot; |
398 |
env->div2 = rem; |
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env->cc_dest = flags; |
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FORCE_RET(); |
401 |
} |
402 |
|
403 |
/* Halt is special because it may be a semihosting call. */
|
404 |
OP(halt) |
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{ |
406 |
RAISE_EXCEPTION(EXCP_HALT_INSN); |
407 |
FORCE_RET(); |
408 |
} |
409 |
|
410 |
OP(stop) |
411 |
{ |
412 |
env->halted = 1;
|
413 |
RAISE_EXCEPTION(EXCP_HLT); |
414 |
FORCE_RET(); |
415 |
} |
416 |
|
417 |
OP(raise_exception) |
418 |
{ |
419 |
RAISE_EXCEPTION(PARAM1); |
420 |
FORCE_RET(); |
421 |
} |
422 |
|
423 |
/* Floating point comparison sets flags differently to other instructions. */
|
424 |
|
425 |
OP(sub_cmpf64) |
426 |
{ |
427 |
float64 src0; |
428 |
float64 src1; |
429 |
src0 = get_opf64(PARAM2); |
430 |
src1 = get_opf64(PARAM3); |
431 |
set_opf64(PARAM1, helper_sub_cmpf64(env, src0, src1)); |
432 |
FORCE_RET(); |
433 |
} |
434 |
|
435 |
OP(update_xflag_tst) |
436 |
{ |
437 |
uint32_t op1 = get_op(PARAM1); |
438 |
env->cc_x = op1; |
439 |
FORCE_RET(); |
440 |
} |
441 |
|
442 |
OP(update_xflag_lt) |
443 |
{ |
444 |
uint32_t op1 = get_op(PARAM1); |
445 |
uint32_t op2 = get_op(PARAM2); |
446 |
env->cc_x = (op1 < op2); |
447 |
FORCE_RET(); |
448 |
} |
449 |
|
450 |
OP(get_xflag) |
451 |
{ |
452 |
set_op(PARAM1, env->cc_x); |
453 |
FORCE_RET(); |
454 |
} |
455 |
|
456 |
OP(logic_cc) |
457 |
{ |
458 |
uint32_t op1 = get_op(PARAM1); |
459 |
env->cc_dest = op1; |
460 |
FORCE_RET(); |
461 |
} |
462 |
|
463 |
OP(update_cc_add) |
464 |
{ |
465 |
uint32_t op1 = get_op(PARAM1); |
466 |
uint32_t op2 = get_op(PARAM2); |
467 |
env->cc_dest = op1; |
468 |
env->cc_src = op2; |
469 |
FORCE_RET(); |
470 |
} |
471 |
|
472 |
OP(fp_result) |
473 |
{ |
474 |
env->fp_result = get_opf64(PARAM1); |
475 |
FORCE_RET(); |
476 |
} |
477 |
|
478 |
OP(set_sr) |
479 |
{ |
480 |
env->sr = get_op(PARAM1) & 0xffff;
|
481 |
m68k_switch_sp(env); |
482 |
FORCE_RET(); |
483 |
} |
484 |
|
485 |
OP(jmp) |
486 |
{ |
487 |
GOTO_LABEL_PARAM(1);
|
488 |
} |
489 |
|
490 |
OP(set_T0_z32) |
491 |
{ |
492 |
uint32_t arg = get_op(PARAM1); |
493 |
T0 = (arg == 0);
|
494 |
FORCE_RET(); |
495 |
} |
496 |
|
497 |
OP(set_T0_nz32) |
498 |
{ |
499 |
uint32_t arg = get_op(PARAM1); |
500 |
T0 = (arg != 0);
|
501 |
FORCE_RET(); |
502 |
} |
503 |
|
504 |
OP(set_T0_s32) |
505 |
{ |
506 |
int32_t arg = get_op(PARAM1); |
507 |
T0 = (arg > 0);
|
508 |
FORCE_RET(); |
509 |
} |
510 |
|
511 |
OP(set_T0_ns32) |
512 |
{ |
513 |
int32_t arg = get_op(PARAM1); |
514 |
T0 = (arg >= 0);
|
515 |
FORCE_RET(); |
516 |
} |
517 |
|
518 |
OP(jmp_T0) |
519 |
{ |
520 |
if (T0)
|
521 |
GOTO_LABEL_PARAM(1);
|
522 |
FORCE_RET(); |
523 |
} |
524 |
|
525 |
void OPPROTO op_goto_tb0(void) |
526 |
{ |
527 |
GOTO_TB(op_goto_tb0, PARAM1, 0);
|
528 |
} |
529 |
|
530 |
void OPPROTO op_goto_tb1(void) |
531 |
{ |
532 |
GOTO_TB(op_goto_tb1, PARAM1, 1);
|
533 |
} |
534 |
|
535 |
OP(exit_tb) |
536 |
{ |
537 |
EXIT_TB(); |
538 |
} |
539 |
|
540 |
|
541 |
/* Floating point. */
|
542 |
OP(f64_to_i32) |
543 |
{ |
544 |
set_op(PARAM1, float64_to_int32(get_opf64(PARAM2), &CPU_FP_STATUS)); |
545 |
FORCE_RET(); |
546 |
} |
547 |
|
548 |
OP(f64_to_f32) |
549 |
{ |
550 |
union {
|
551 |
float32 f; |
552 |
uint32_t i; |
553 |
} u; |
554 |
u.f = float64_to_float32(get_opf64(PARAM2), &CPU_FP_STATUS); |
555 |
set_op(PARAM1, u.i); |
556 |
FORCE_RET(); |
557 |
} |
558 |
|
559 |
OP(i32_to_f64) |
560 |
{ |
561 |
set_opf64(PARAM1, int32_to_float64(get_op(PARAM2), &CPU_FP_STATUS)); |
562 |
FORCE_RET(); |
563 |
} |
564 |
|
565 |
OP(f32_to_f64) |
566 |
{ |
567 |
union {
|
568 |
float32 f; |
569 |
uint32_t i; |
570 |
} u; |
571 |
u.i = get_op(PARAM2); |
572 |
set_opf64(PARAM1, float32_to_float64(u.f, &CPU_FP_STATUS)); |
573 |
FORCE_RET(); |
574 |
} |
575 |
|
576 |
OP(absf64) |
577 |
{ |
578 |
float64 op0 = get_opf64(PARAM2); |
579 |
set_opf64(PARAM1, float64_abs(op0)); |
580 |
FORCE_RET(); |
581 |
} |
582 |
|
583 |
OP(chsf64) |
584 |
{ |
585 |
float64 op0 = get_opf64(PARAM2); |
586 |
set_opf64(PARAM1, float64_chs(op0)); |
587 |
FORCE_RET(); |
588 |
} |
589 |
|
590 |
OP(sqrtf64) |
591 |
{ |
592 |
float64 op0 = get_opf64(PARAM2); |
593 |
set_opf64(PARAM1, float64_sqrt(op0, &CPU_FP_STATUS)); |
594 |
FORCE_RET(); |
595 |
} |
596 |
|
597 |
OP(addf64) |
598 |
{ |
599 |
float64 op0 = get_opf64(PARAM2); |
600 |
float64 op1 = get_opf64(PARAM3); |
601 |
set_opf64(PARAM1, float64_add(op0, op1, &CPU_FP_STATUS)); |
602 |
FORCE_RET(); |
603 |
} |
604 |
|
605 |
OP(subf64) |
606 |
{ |
607 |
float64 op0 = get_opf64(PARAM2); |
608 |
float64 op1 = get_opf64(PARAM3); |
609 |
set_opf64(PARAM1, float64_sub(op0, op1, &CPU_FP_STATUS)); |
610 |
FORCE_RET(); |
611 |
} |
612 |
|
613 |
OP(mulf64) |
614 |
{ |
615 |
float64 op0 = get_opf64(PARAM2); |
616 |
float64 op1 = get_opf64(PARAM3); |
617 |
set_opf64(PARAM1, float64_mul(op0, op1, &CPU_FP_STATUS)); |
618 |
FORCE_RET(); |
619 |
} |
620 |
|
621 |
OP(divf64) |
622 |
{ |
623 |
float64 op0 = get_opf64(PARAM2); |
624 |
float64 op1 = get_opf64(PARAM3); |
625 |
set_opf64(PARAM1, float64_div(op0, op1, &CPU_FP_STATUS)); |
626 |
FORCE_RET(); |
627 |
} |
628 |
|
629 |
OP(iround_f64) |
630 |
{ |
631 |
float64 op0 = get_opf64(PARAM2); |
632 |
set_opf64(PARAM1, float64_round_to_int(op0, &CPU_FP_STATUS)); |
633 |
FORCE_RET(); |
634 |
} |
635 |
|
636 |
OP(itrunc_f64) |
637 |
{ |
638 |
float64 op0 = get_opf64(PARAM2); |
639 |
set_opf64(PARAM1, float64_trunc_to_int(op0, &CPU_FP_STATUS)); |
640 |
FORCE_RET(); |
641 |
} |
642 |
|
643 |
OP(compare_quietf64) |
644 |
{ |
645 |
float64 op0 = get_opf64(PARAM2); |
646 |
float64 op1 = get_opf64(PARAM3); |
647 |
set_op(PARAM1, float64_compare_quiet(op0, op1, &CPU_FP_STATUS)); |
648 |
FORCE_RET(); |
649 |
} |
650 |
|
651 |
OP(movec) |
652 |
{ |
653 |
int op1 = get_op(PARAM1);
|
654 |
uint32_t op2 = get_op(PARAM2); |
655 |
helper_movec(env, op1, op2); |
656 |
} |
657 |
|
658 |
/* Memory access. */
|
659 |
|
660 |
#define MEMSUFFIX _raw
|
661 |
#include "op_mem.h" |
662 |
|
663 |
#if !defined(CONFIG_USER_ONLY)
|
664 |
#define MEMSUFFIX _user
|
665 |
#include "op_mem.h" |
666 |
#define MEMSUFFIX _kernel
|
667 |
#include "op_mem.h" |
668 |
#endif
|
669 |
|
670 |
/* MAC unit. */
|
671 |
/* TODO: The MAC instructions use 64-bit arithmetic fairly extensively.
|
672 |
This results in fairly large ops (and sometimes other issues) on 32-bit
|
673 |
hosts. Maybe move most of them into helpers. */
|
674 |
OP(macmuls) |
675 |
{ |
676 |
uint32_t op1 = get_op(PARAM1); |
677 |
uint32_t op2 = get_op(PARAM2); |
678 |
int64_t product; |
679 |
int64_t res; |
680 |
|
681 |
product = (uint64_t)op1 * op2; |
682 |
res = (product << 24) >> 24; |
683 |
if (res != product) {
|
684 |
env->macsr |= MACSR_V; |
685 |
if (env->macsr & MACSR_OMC) {
|
686 |
/* Make sure the accumulate operation overflows. */
|
687 |
if (product < 0) |
688 |
res = ~(1ll << 50); |
689 |
else
|
690 |
res = 1ll << 50; |
691 |
} |
692 |
} |
693 |
env->mactmp = res; |
694 |
FORCE_RET(); |
695 |
} |
696 |
|
697 |
OP(macmulu) |
698 |
{ |
699 |
uint32_t op1 = get_op(PARAM1); |
700 |
uint32_t op2 = get_op(PARAM2); |
701 |
uint64_t product; |
702 |
|
703 |
product = (uint64_t)op1 * op2; |
704 |
if (product & (0xffffffull << 40)) { |
705 |
env->macsr |= MACSR_V; |
706 |
if (env->macsr & MACSR_OMC) {
|
707 |
/* Make sure the accumulate operation overflows. */
|
708 |
product = 1ll << 50; |
709 |
} else {
|
710 |
product &= ((1ull << 40) - 1); |
711 |
} |
712 |
} |
713 |
env->mactmp = product; |
714 |
FORCE_RET(); |
715 |
} |
716 |
|
717 |
OP(macmulf) |
718 |
{ |
719 |
int32_t op1 = get_op(PARAM1); |
720 |
int32_t op2 = get_op(PARAM2); |
721 |
uint64_t product; |
722 |
uint32_t remainder; |
723 |
|
724 |
product = (uint64_t)op1 * op2; |
725 |
if (env->macsr & MACSR_RT) {
|
726 |
remainder = product & 0xffffff;
|
727 |
product >>= 24;
|
728 |
if (remainder > 0x800000) |
729 |
product++; |
730 |
else if (remainder == 0x800000) |
731 |
product += (product & 1);
|
732 |
} else {
|
733 |
product >>= 24;
|
734 |
} |
735 |
env->mactmp = product; |
736 |
FORCE_RET(); |
737 |
} |
738 |
|
739 |
OP(macshl) |
740 |
{ |
741 |
env->mactmp <<= 1;
|
742 |
} |
743 |
|
744 |
OP(macshr) |
745 |
{ |
746 |
env->mactmp >>= 1;
|
747 |
} |
748 |
|
749 |
OP(macadd) |
750 |
{ |
751 |
int acc = PARAM1;
|
752 |
env->macc[acc] += env->mactmp; |
753 |
FORCE_RET(); |
754 |
} |
755 |
|
756 |
OP(macsub) |
757 |
{ |
758 |
int acc = PARAM1;
|
759 |
env->macc[acc] -= env->mactmp; |
760 |
FORCE_RET(); |
761 |
} |
762 |
|
763 |
OP(macsats) |
764 |
{ |
765 |
int acc = PARAM1;
|
766 |
int64_t sum; |
767 |
int64_t result; |
768 |
|
769 |
sum = env->macc[acc]; |
770 |
result = (sum << 16) >> 16; |
771 |
if (result != sum) {
|
772 |
env->macsr |= MACSR_V; |
773 |
} |
774 |
if (env->macsr & MACSR_V) {
|
775 |
env->macsr |= MACSR_PAV0 << acc; |
776 |
if (env->macsr & MACSR_OMC) {
|
777 |
/* The result is saturated to 32 bits, despite overflow occuring
|
778 |
at 48 bits. Seems weird, but that's what the hardware docs
|
779 |
say. */
|
780 |
result = (result >> 63) ^ 0x7fffffff; |
781 |
} |
782 |
} |
783 |
env->macc[acc] = result; |
784 |
FORCE_RET(); |
785 |
} |
786 |
|
787 |
OP(macsatu) |
788 |
{ |
789 |
int acc = PARAM1;
|
790 |
uint64_t sum; |
791 |
|
792 |
sum = env->macc[acc]; |
793 |
if (sum & (0xffffull << 48)) { |
794 |
env->macsr |= MACSR_V; |
795 |
} |
796 |
if (env->macsr & MACSR_V) {
|
797 |
env->macsr |= MACSR_PAV0 << acc; |
798 |
if (env->macsr & MACSR_OMC) {
|
799 |
if (sum > (1ull << 53)) |
800 |
sum = 0;
|
801 |
else
|
802 |
sum = (1ull << 48) - 1; |
803 |
} else {
|
804 |
sum &= ((1ull << 48) - 1); |
805 |
} |
806 |
} |
807 |
FORCE_RET(); |
808 |
} |
809 |
|
810 |
OP(macsatf) |
811 |
{ |
812 |
int acc = PARAM1;
|
813 |
int64_t sum; |
814 |
int64_t result; |
815 |
|
816 |
sum = env->macc[acc]; |
817 |
result = (sum << 16) >> 16; |
818 |
if (result != sum) {
|
819 |
env->macsr |= MACSR_V; |
820 |
} |
821 |
if (env->macsr & MACSR_V) {
|
822 |
env->macsr |= MACSR_PAV0 << acc; |
823 |
if (env->macsr & MACSR_OMC) {
|
824 |
result = (result >> 63) ^ 0x7fffffffffffll; |
825 |
} |
826 |
} |
827 |
env->macc[acc] = result; |
828 |
FORCE_RET(); |
829 |
} |
830 |
|
831 |
OP(mac_clear_flags) |
832 |
{ |
833 |
env->macsr &= ~(MACSR_V | MACSR_Z | MACSR_N | MACSR_EV); |
834 |
} |
835 |
|
836 |
OP(mac_set_flags) |
837 |
{ |
838 |
int acc = PARAM1;
|
839 |
uint64_t val; |
840 |
val = env->macc[acc]; |
841 |
if (val == 0) |
842 |
env->macsr |= MACSR_Z; |
843 |
else if (val & (1ull << 47)); |
844 |
env->macsr |= MACSR_N; |
845 |
if (env->macsr & (MACSR_PAV0 << acc)) {
|
846 |
env->macsr |= MACSR_V; |
847 |
} |
848 |
if (env->macsr & MACSR_FI) {
|
849 |
val = ((int64_t)val) >> 40;
|
850 |
if (val != 0 && val != -1) |
851 |
env->macsr |= MACSR_EV; |
852 |
} else if (env->macsr & MACSR_SU) { |
853 |
val = ((int64_t)val) >> 32;
|
854 |
if (val != 0 && val != -1) |
855 |
env->macsr |= MACSR_EV; |
856 |
} else {
|
857 |
if ((val >> 32) != 0) |
858 |
env->macsr |= MACSR_EV; |
859 |
} |
860 |
FORCE_RET(); |
861 |
} |
862 |
|
863 |
OP(get_macf) |
864 |
{ |
865 |
int acc = PARAM2;
|
866 |
int64_t val; |
867 |
int rem;
|
868 |
uint32_t result; |
869 |
|
870 |
val = env->macc[acc]; |
871 |
if (env->macsr & MACSR_SU) {
|
872 |
/* 16-bit rounding. */
|
873 |
rem = val & 0xffffff;
|
874 |
val = (val >> 24) & 0xffffu; |
875 |
if (rem > 0x800000) |
876 |
val++; |
877 |
else if (rem == 0x800000) |
878 |
val += (val & 1);
|
879 |
} else if (env->macsr & MACSR_RT) { |
880 |
/* 32-bit rounding. */
|
881 |
rem = val & 0xff;
|
882 |
val >>= 8;
|
883 |
if (rem > 0x80) |
884 |
val++; |
885 |
else if (rem == 0x80) |
886 |
val += (val & 1);
|
887 |
} else {
|
888 |
/* No rounding. */
|
889 |
val >>= 8;
|
890 |
} |
891 |
if (env->macsr & MACSR_OMC) {
|
892 |
/* Saturate. */
|
893 |
if (env->macsr & MACSR_SU) {
|
894 |
if (val != (uint16_t) val) {
|
895 |
result = ((val >> 63) ^ 0x7fff) & 0xffff; |
896 |
} else {
|
897 |
result = val & 0xffff;
|
898 |
} |
899 |
} else {
|
900 |
if (val != (uint32_t)val) {
|
901 |
result = ((uint32_t)(val >> 63) & 0x7fffffff); |
902 |
} else {
|
903 |
result = (uint32_t)val; |
904 |
} |
905 |
} |
906 |
} else {
|
907 |
/* No saturation. */
|
908 |
if (env->macsr & MACSR_SU) {
|
909 |
result = val & 0xffff;
|
910 |
} else {
|
911 |
result = (uint32_t)val; |
912 |
} |
913 |
} |
914 |
set_op(PARAM1, result); |
915 |
FORCE_RET(); |
916 |
} |
917 |
|
918 |
OP(get_maci) |
919 |
{ |
920 |
int acc = PARAM2;
|
921 |
set_op(PARAM1, (uint32_t)env->macc[acc]); |
922 |
FORCE_RET(); |
923 |
} |
924 |
|
925 |
OP(get_macs) |
926 |
{ |
927 |
int acc = PARAM2;
|
928 |
int64_t val = env->macc[acc]; |
929 |
uint32_t result; |
930 |
if (val == (int32_t)val) {
|
931 |
result = (int32_t)val; |
932 |
} else {
|
933 |
result = (val >> 61) ^ 0x7fffffff; |
934 |
} |
935 |
set_op(PARAM1, result); |
936 |
FORCE_RET(); |
937 |
} |
938 |
|
939 |
OP(get_macu) |
940 |
{ |
941 |
int acc = PARAM2;
|
942 |
uint64_t val = env->macc[acc]; |
943 |
uint32_t result; |
944 |
if ((val >> 32) == 0) { |
945 |
result = (uint32_t)val; |
946 |
} else {
|
947 |
result = 0xffffffffu;
|
948 |
} |
949 |
set_op(PARAM1, result); |
950 |
FORCE_RET(); |
951 |
} |
952 |
|
953 |
OP(clear_mac) |
954 |
{ |
955 |
int acc = PARAM1;
|
956 |
|
957 |
env->macc[acc] = 0;
|
958 |
env->macsr &= ~(MACSR_PAV0 << acc); |
959 |
FORCE_RET(); |
960 |
} |
961 |
|
962 |
OP(move_mac) |
963 |
{ |
964 |
int dest = PARAM1;
|
965 |
int src = PARAM2;
|
966 |
uint32_t mask; |
967 |
env->macc[dest] = env->macc[src]; |
968 |
mask = MACSR_PAV0 << dest; |
969 |
if (env->macsr & (MACSR_PAV0 << src))
|
970 |
env->macsr |= mask; |
971 |
else
|
972 |
env->macsr &= ~mask; |
973 |
FORCE_RET(); |
974 |
} |
975 |
|
976 |
OP(get_mac_extf) |
977 |
{ |
978 |
uint32_t val; |
979 |
int acc = PARAM2;
|
980 |
val = env->macc[acc] & 0x00ff;
|
981 |
val = (env->macc[acc] >> 32) & 0xff00; |
982 |
val |= (env->macc[acc + 1] << 16) & 0x00ff0000; |
983 |
val |= (env->macc[acc + 1] >> 16) & 0xff000000; |
984 |
set_op(PARAM1, val); |
985 |
FORCE_RET(); |
986 |
} |
987 |
|
988 |
OP(get_mac_exti) |
989 |
{ |
990 |
uint32_t val; |
991 |
int acc = PARAM2;
|
992 |
val = (env->macc[acc] >> 32) & 0xffff; |
993 |
val |= (env->macc[acc + 1] >> 16) & 0xffff0000; |
994 |
set_op(PARAM1, val); |
995 |
FORCE_RET(); |
996 |
} |
997 |
|
998 |
OP(set_macf) |
999 |
{ |
1000 |
int acc = PARAM2;
|
1001 |
int32_t val = get_op(PARAM1); |
1002 |
env->macc[acc] = ((int64_t)val) << 8;
|
1003 |
env->macsr &= ~(MACSR_PAV0 << acc); |
1004 |
FORCE_RET(); |
1005 |
} |
1006 |
|
1007 |
OP(set_macs) |
1008 |
{ |
1009 |
int acc = PARAM2;
|
1010 |
int32_t val = get_op(PARAM1); |
1011 |
env->macc[acc] = val; |
1012 |
env->macsr &= ~(MACSR_PAV0 << acc); |
1013 |
FORCE_RET(); |
1014 |
} |
1015 |
|
1016 |
OP(set_macu) |
1017 |
{ |
1018 |
int acc = PARAM2;
|
1019 |
uint32_t val = get_op(PARAM1); |
1020 |
env->macc[acc] = val; |
1021 |
env->macsr &= ~(MACSR_PAV0 << acc); |
1022 |
FORCE_RET(); |
1023 |
} |
1024 |
|
1025 |
OP(set_mac_extf) |
1026 |
{ |
1027 |
int acc = PARAM2;
|
1028 |
int32_t val = get_op(PARAM1); |
1029 |
int64_t res; |
1030 |
int32_t tmp; |
1031 |
res = env->macc[acc] & 0xffffffff00ull;
|
1032 |
tmp = (int16_t)(val & 0xff00);
|
1033 |
res |= ((int64_t)tmp) << 32;
|
1034 |
res |= val & 0xff;
|
1035 |
env->macc[acc] = res; |
1036 |
res = env->macc[acc + 1] & 0xffffffff00ull; |
1037 |
tmp = (val & 0xff000000);
|
1038 |
res |= ((int64_t)tmp) << 16;
|
1039 |
res |= (val >> 16) & 0xff; |
1040 |
env->macc[acc + 1] = res;
|
1041 |
} |
1042 |
|
1043 |
OP(set_mac_exts) |
1044 |
{ |
1045 |
int acc = PARAM2;
|
1046 |
int32_t val = get_op(PARAM1); |
1047 |
int64_t res; |
1048 |
int32_t tmp; |
1049 |
res = (uint32_t)env->macc[acc]; |
1050 |
tmp = (int16_t)val; |
1051 |
res |= ((int64_t)tmp) << 32;
|
1052 |
env->macc[acc] = res; |
1053 |
res = (uint32_t)env->macc[acc + 1];
|
1054 |
tmp = val & 0xffff0000;
|
1055 |
res |= (int64_t)tmp << 16;
|
1056 |
env->macc[acc + 1] = res;
|
1057 |
} |
1058 |
|
1059 |
OP(set_mac_extu) |
1060 |
{ |
1061 |
int acc = PARAM2;
|
1062 |
int32_t val = get_op(PARAM1); |
1063 |
uint64_t res; |
1064 |
res = (uint32_t)env->macc[acc]; |
1065 |
res |= ((uint64_t)(val & 0xffff)) << 32; |
1066 |
env->macc[acc] = res; |
1067 |
res = (uint32_t)env->macc[acc + 1];
|
1068 |
res |= (uint64_t)(val & 0xffff0000) << 16; |
1069 |
env->macc[acc + 1] = res;
|
1070 |
} |
1071 |
|
1072 |
OP(set_macsr) |
1073 |
{ |
1074 |
m68k_set_macsr(env, get_op(PARAM1)); |
1075 |
} |