Revision 8b0de438 hw/iommu.c
| b/hw/iommu.c | ||
|---|---|---|
| 109 | 109 |
#define IOPTE_VALID 0x00000002 /* IOPTE is valid */ |
| 110 | 110 |
#define IOPTE_WAZ 0x00000001 /* Write as zeros */ |
| 111 | 111 |
|
| 112 |
#define PAGE_SHIFT 12
|
|
| 113 |
#define PAGE_SIZE (1 << PAGE_SHIFT)
|
|
| 114 |
#define PAGE_MASK (PAGE_SIZE - 1)
|
|
| 112 |
#define IOMMU_PAGE_SHIFT 12
|
|
| 113 |
#define IOMMU_PAGE_SIZE (1 << IOMMU_PAGE_SHIFT)
|
|
| 114 |
#define IOMMU_PAGE_MASK ~(IOMMU_PAGE_SIZE - 1)
|
|
| 115 | 115 |
|
| 116 | 116 |
typedef struct IOMMUState {
|
| 117 | 117 |
uint32_t regs[IOMMU_NREGS]; |
| ... | ... | |
| 242 | 242 |
|
| 243 | 243 |
iopte = s->regs[IOMMU_BASE] << 4; |
| 244 | 244 |
addr &= ~s->iostart; |
| 245 |
iopte += (addr >> (PAGE_SHIFT - 2)) & ~3; |
|
| 245 |
iopte += (addr >> (IOMMU_PAGE_SHIFT - 2)) & ~3;
|
|
| 246 | 246 |
cpu_physical_memory_read(iopte, (uint8_t *)&ret, 4); |
| 247 | 247 |
tswap32s(&ret); |
| 248 | 248 |
DPRINTF("get flags addr " TARGET_FMT_plx " => pte " TARGET_FMT_plx
|
| ... | ... | |
| 258 | 258 |
target_phys_addr_t pa; |
| 259 | 259 |
|
| 260 | 260 |
tmppte = pte; |
| 261 |
pa = ((pte & IOPTE_PAGE) << 4) + (addr & PAGE_MASK); |
|
| 261 |
pa = ((pte & IOPTE_PAGE) << 4) + (addr & ~IOMMU_PAGE_MASK);
|
|
| 262 | 262 |
DPRINTF("xlate dva " TARGET_FMT_plx " => pa " TARGET_FMT_plx
|
| 263 | 263 |
" (iopte = %x)\n", addr, pa, tmppte); |
| 264 | 264 |
|
| ... | ... | |
| 285 | 285 |
target_phys_addr_t page, phys_addr; |
| 286 | 286 |
|
| 287 | 287 |
while (len > 0) {
|
| 288 |
page = addr & TARGET_PAGE_MASK;
|
|
| 289 |
l = (page + TARGET_PAGE_SIZE) - addr;
|
|
| 288 |
page = addr & IOMMU_PAGE_MASK;
|
|
| 289 |
l = (page + IOMMU_PAGE_SIZE) - addr;
|
|
| 290 | 290 |
if (l > len) |
| 291 | 291 |
l = len; |
| 292 | 292 |
flags = iommu_page_get_flags(opaque, page); |
Also available in: Unified diff