Revision 8c8dc39f
| b/hw/arm_gic.c | ||
|---|---|---|
| 324 | 324 |
} |
| 325 | 325 |
return res; |
| 326 | 326 |
bad_reg: |
| 327 |
hw_error("gic_dist_readb: Bad offset %x\n", (int)offset);
|
|
| 327 |
qemu_log_mask(LOG_GUEST_ERROR, |
|
| 328 |
"gic_dist_readb: Bad offset %x\n", (int)offset); |
|
| 328 | 329 |
return 0; |
| 329 | 330 |
} |
| 330 | 331 |
|
| ... | ... | |
| 487 | 488 |
gic_update(s); |
| 488 | 489 |
return; |
| 489 | 490 |
bad_reg: |
| 490 |
hw_error("gic_dist_writeb: Bad offset %x\n", (int)offset);
|
|
| 491 |
qemu_log_mask(LOG_GUEST_ERROR, |
|
| 492 |
"gic_dist_writeb: Bad offset %x\n", (int)offset); |
|
| 491 | 493 |
} |
| 492 | 494 |
|
| 493 | 495 |
static void gic_dist_writew(void *opaque, hwaddr offset, |
| ... | ... | |
| 556 | 558 |
case 0x18: /* Highest Pending Interrupt */ |
| 557 | 559 |
return s->current_pending[cpu]; |
| 558 | 560 |
default: |
| 559 |
hw_error("gic_cpu_read: Bad offset %x\n", (int)offset);
|
|
| 561 |
qemu_log_mask(LOG_GUEST_ERROR, |
|
| 562 |
"gic_cpu_read: Bad offset %x\n", (int)offset); |
|
| 560 | 563 |
return 0; |
| 561 | 564 |
} |
| 562 | 565 |
} |
| ... | ... | |
| 577 | 580 |
case 0x10: /* End Of Interrupt */ |
| 578 | 581 |
return gic_complete_irq(s, cpu, value & 0x3ff); |
| 579 | 582 |
default: |
| 580 |
hw_error("gic_cpu_write: Bad offset %x\n", (int)offset);
|
|
| 583 |
qemu_log_mask(LOG_GUEST_ERROR, |
|
| 584 |
"gic_cpu_write: Bad offset %x\n", (int)offset); |
|
| 581 | 585 |
return; |
| 582 | 586 |
} |
| 583 | 587 |
gic_update(s); |
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