root / target-cris / op_helper.c @ 8c99506c
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/*
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* CRIS helper routines
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*
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* Copyright (c) 2007 AXIS Communications
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* Written by Edgar E. Iglesias
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <assert.h> |
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#include "exec.h" |
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#include "mmu.h" |
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#define MMUSUFFIX _mmu
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#ifdef __s390__
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# define GETPC() ((void*)((unsigned long)__builtin_return_address(0) & 0x7fffffffUL)) |
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#else
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# define GETPC() (__builtin_return_address(0)) |
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#endif
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#define SHIFT 0 |
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#include "softmmu_template.h" |
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#define SHIFT 1 |
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#include "softmmu_template.h" |
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#define SHIFT 2 |
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#include "softmmu_template.h" |
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#define SHIFT 3 |
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#include "softmmu_template.h" |
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|
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#define D(x)
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/* Try to fill the TLB and return an exception if error. If retaddr is
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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/* XXX: fix it to restore all registers */
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void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) |
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{
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TranslationBlock *tb; |
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CPUState *saved_env; |
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unsigned long pc; |
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int ret;
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/* XXX: hack to restore env in all cases, even if not called from
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generated code */
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saved_env = env; |
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env = cpu_single_env; |
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D(fprintf(logfile, "%s pc=%x tpc=%x ra=%x\n", __func__,
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env->pc, env->debug1, retaddr)); |
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ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
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if (__builtin_expect(ret, 0)) { |
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if (retaddr) {
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/* now we have a real cpu fault */
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pc = (unsigned long)retaddr; |
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tb = tb_find_pc(pc); |
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if (tb) {
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/* the PC is inside the translated code. It means that we have
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a virtual CPU fault */
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cpu_restore_state(tb, env, pc, NULL);
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} |
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} |
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cpu_loop_exit(); |
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} |
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env = saved_env; |
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} |
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|
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void helper_raise_exception(uint32_t index)
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{
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env->exception_index = index; |
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cpu_loop_exit(); |
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} |
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void helper_tlb_flush_pid(uint32_t pid)
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{
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#if !defined(CONFIG_USER_ONLY)
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cris_mmu_flush_pid(env, pid); |
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#endif
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} |
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|
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void helper_tlb_flush(void) |
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{
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tlb_flush(env, 1);
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} |
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void helper_dump(uint32_t a0, uint32_t a1)
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{
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(fprintf(logfile, "%s: a0=%x a1=%x\n", __func__, a0, a1));
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} |
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void helper_dummy(void) |
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{
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} |
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/* Used by the tlb decoder. */
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#define EXTRACT_FIELD(src, start, end) \
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(((src) >> start) & ((1 << (end - start + 1)) - 1)) |
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void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg)
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{
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uint32_t srs; |
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srs = env->pregs[PR_SRS]; |
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srs &= 3;
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env->sregs[srs][sreg] = env->regs[reg]; |
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#if !defined(CONFIG_USER_ONLY)
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if (srs == 1 || srs == 2) { |
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if (sreg == 6) { |
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/* Writes to tlb-hi write to mm_cause as a side
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effect. */
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env->sregs[SFR_RW_MM_TLB_HI] = T0; |
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env->sregs[SFR_R_MM_CAUSE] = T0; |
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} |
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else if (sreg == 5) { |
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uint32_t set; |
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uint32_t idx; |
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uint32_t lo, hi; |
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uint32_t vaddr; |
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int tlb_v;
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idx = set = env->sregs[SFR_RW_MM_TLB_SEL]; |
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set >>= 4;
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set &= 3;
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idx &= 15;
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/* We've just made a write to tlb_lo. */
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lo = env->sregs[SFR_RW_MM_TLB_LO]; |
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/* Writes are done via r_mm_cause. */
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hi = env->sregs[SFR_R_MM_CAUSE]; |
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vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
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13, 31); |
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vaddr <<= TARGET_PAGE_BITS; |
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tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
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3, 3); |
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env->tlbsets[srs - 1][set][idx].lo = lo;
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env->tlbsets[srs - 1][set][idx].hi = hi;
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D(fprintf(logfile, |
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"tlb flush vaddr=%x v=%d pc=%x\n",
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vaddr, tlb_v, env->pc)); |
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tlb_flush_page(env, vaddr); |
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} |
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} |
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#endif
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} |
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void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg)
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{
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uint32_t srs; |
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env->pregs[PR_SRS] &= 3;
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srs = env->pregs[PR_SRS]; |
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#if !defined(CONFIG_USER_ONLY)
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if (srs == 1 || srs == 2) |
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{
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uint32_t set; |
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uint32_t idx; |
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uint32_t lo, hi; |
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idx = set = env->sregs[SFR_RW_MM_TLB_SEL]; |
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set >>= 4;
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set &= 3;
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idx &= 15;
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/* Update the mirror regs. */
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hi = env->tlbsets[srs - 1][set][idx].hi;
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lo = env->tlbsets[srs - 1][set][idx].lo;
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env->sregs[SFR_RW_MM_TLB_HI] = hi; |
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env->sregs[SFR_RW_MM_TLB_LO] = lo; |
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} |
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#endif
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env->regs[reg] = env->sregs[srs][sreg]; |
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RETURN(); |
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} |
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static void cris_ccs_rshift(CPUState *env) |
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{
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uint32_t ccs; |
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/* Apply the ccs shift. */
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ccs = env->pregs[PR_CCS]; |
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ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10); |
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if (ccs & U_FLAG)
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{
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/* Enter user mode. */
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env->ksp = env->regs[R_SP]; |
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env->regs[R_SP] = env->pregs[PR_USP]; |
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} |
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env->pregs[PR_CCS] = ccs; |
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} |
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void helper_rfe(void) |
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{
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D(fprintf(logfile, "rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
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env->pregs[PR_ERP], env->pregs[PR_PID], |
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env->pregs[PR_CCS], |
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env->btarget)); |
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cris_ccs_rshift(env); |
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/* RFE sets the P_FLAG only if the R_FLAG is not set. */
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if (!(env->pregs[PR_CCS] & R_FLAG))
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env->pregs[PR_CCS] |= P_FLAG; |
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} |
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void helper_store(uint32_t a0)
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{
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if (env->pregs[PR_CCS] & P_FLAG )
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{
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cpu_abort(env, "cond_store_failed! pc=%x a0=%x\n",
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env->pc, a0); |
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} |
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} |
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void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, |
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int is_asi)
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{
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D(printf("%s addr=%x w=%d ex=%d asi=%d\n",
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__func__, addr, is_write, is_exec, is_asi)); |
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} |
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static void evaluate_flags_writeback(uint32_t flags) |
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{
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int x;
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/* Extended arithmetics, leave the z flag alone. */
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env->debug3 = env->pregs[PR_CCS]; |
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if (env->cc_x_live)
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x = env->cc_x; |
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else
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x = env->pregs[PR_CCS] & X_FLAG; |
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if ((x || env->cc_op == CC_OP_ADDC)
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&& flags & Z_FLAG) |
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env->cc_mask &= ~Z_FLAG; |
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/* all insn clear the x-flag except setf or clrf. */
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env->pregs[PR_CCS] &= ~(env->cc_mask | X_FLAG); |
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flags &= env->cc_mask; |
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env->pregs[PR_CCS] |= flags; |
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} |
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void helper_evaluate_flags_muls(void) |
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{
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uint32_t src; |
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uint32_t dst; |
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uint32_t res; |
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uint32_t flags = 0;
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int64_t tmp; |
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int32_t mof; |
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int dneg;
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src = env->cc_src; |
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dst = env->cc_dest; |
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res = env->cc_result; |
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dneg = ((int32_t)res) < 0;
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mof = env->pregs[PR_MOF]; |
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tmp = mof; |
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tmp <<= 32;
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tmp |= res; |
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if (tmp == 0) |
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flags |= Z_FLAG; |
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else if (tmp < 0) |
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flags |= N_FLAG; |
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if ((dneg && mof != -1) |
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|| (!dneg && mof != 0))
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flags |= V_FLAG; |
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evaluate_flags_writeback(flags); |
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} |
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void helper_evaluate_flags_mulu(void) |
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{
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uint32_t src; |
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uint32_t dst; |
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uint32_t res; |
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uint32_t flags = 0;
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uint64_t tmp; |
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uint32_t mof; |
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src = env->cc_src; |
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dst = env->cc_dest; |
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res = env->cc_result; |
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mof = env->pregs[PR_MOF]; |
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tmp = mof; |
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tmp <<= 32;
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tmp |= res; |
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if (tmp == 0) |
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flags |= Z_FLAG; |
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else if (tmp >> 63) |
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flags |= N_FLAG; |
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if (mof)
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flags |= V_FLAG; |
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evaluate_flags_writeback(flags); |
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} |
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|
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void helper_evaluate_flags_mcp(void) |
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{
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uint32_t src; |
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uint32_t dst; |
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uint32_t res; |
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uint32_t flags = 0;
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|
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src = env->cc_src; |
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dst = env->cc_dest; |
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res = env->cc_result; |
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|
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if ((res & 0x80000000L) != 0L) |
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{
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flags |= N_FLAG; |
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if (((src & 0x80000000L) == 0L) |
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&& ((dst & 0x80000000L) == 0L)) |
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{
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flags |= V_FLAG; |
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} |
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else if (((src & 0x80000000L) != 0L) && |
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((dst & 0x80000000L) != 0L)) |
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{
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flags |= R_FLAG; |
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} |
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} |
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else
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{
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if (res == 0L) |
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flags |= Z_FLAG; |
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if (((src & 0x80000000L) != 0L) |
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&& ((dst & 0x80000000L) != 0L)) |
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flags |= V_FLAG; |
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if ((dst & 0x80000000L) != 0L |
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|| (src & 0x80000000L) != 0L) |
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flags |= R_FLAG; |
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} |
| 354 |
|
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evaluate_flags_writeback(flags); |
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} |
| 357 |
|
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void helper_evaluate_flags_alu_4(void) |
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{
|
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uint32_t src; |
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uint32_t dst; |
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uint32_t res; |
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uint32_t flags = 0;
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|
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src = env->cc_src; |
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dst = env->cc_dest; |
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res = env->cc_result; |
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|
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if ((res & 0x80000000L) != 0L) |
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{
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flags |= N_FLAG; |
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if (((src & 0x80000000L) == 0L) |
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&& ((dst & 0x80000000L) == 0L)) |
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{
|
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flags |= V_FLAG; |
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} |
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else if (((src & 0x80000000L) != 0L) && |
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((dst & 0x80000000L) != 0L)) |
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{
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flags |= C_FLAG; |
| 381 |
} |
| 382 |
} |
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else
|
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{
|
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if (res == 0L) |
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flags |= Z_FLAG; |
| 387 |
if (((src & 0x80000000L) != 0L) |
| 388 |
&& ((dst & 0x80000000L) != 0L)) |
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flags |= V_FLAG; |
| 390 |
if ((dst & 0x80000000L) != 0L |
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|| (src & 0x80000000L) != 0L) |
| 392 |
flags |= C_FLAG; |
| 393 |
} |
| 394 |
|
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if (env->cc_op == CC_OP_SUB
|
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|| env->cc_op == CC_OP_CMP) {
|
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flags ^= C_FLAG; |
| 398 |
} |
| 399 |
evaluate_flags_writeback(flags); |
| 400 |
} |
| 401 |
|
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void helper_evaluate_flags_move_4 (void) |
| 403 |
{
|
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uint32_t src; |
| 405 |
uint32_t res; |
| 406 |
uint32_t flags = 0;
|
| 407 |
|
| 408 |
src = env->cc_src; |
| 409 |
res = env->cc_result; |
| 410 |
|
| 411 |
if ((int32_t)res < 0) |
| 412 |
flags |= N_FLAG; |
| 413 |
else if (res == 0L) |
| 414 |
flags |= Z_FLAG; |
| 415 |
|
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evaluate_flags_writeback(flags); |
| 417 |
} |
| 418 |
void helper_evaluate_flags_move_2 (void) |
| 419 |
{
|
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uint32_t src; |
| 421 |
uint32_t flags = 0;
|
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uint16_t res; |
| 423 |
|
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src = env->cc_src; |
| 425 |
res = env->cc_result; |
| 426 |
|
| 427 |
if ((int16_t)res < 0L) |
| 428 |
flags |= N_FLAG; |
| 429 |
else if (res == 0) |
| 430 |
flags |= Z_FLAG; |
| 431 |
|
| 432 |
evaluate_flags_writeback(flags); |
| 433 |
} |
| 434 |
|
| 435 |
/* TODO: This is expensive. We could split things up and only evaluate part of
|
| 436 |
CCR on a need to know basis. For now, we simply re-evaluate everything. */
|
| 437 |
void helper_evaluate_flags (void) |
| 438 |
{
|
| 439 |
uint32_t src; |
| 440 |
uint32_t dst; |
| 441 |
uint32_t res; |
| 442 |
uint32_t flags = 0;
|
| 443 |
|
| 444 |
src = env->cc_src; |
| 445 |
dst = env->cc_dest; |
| 446 |
res = env->cc_result; |
| 447 |
|
| 448 |
|
| 449 |
/* Now, evaluate the flags. This stuff is based on
|
| 450 |
Per Zander's CRISv10 simulator. */
|
| 451 |
switch (env->cc_size)
|
| 452 |
{
|
| 453 |
case 1: |
| 454 |
if ((res & 0x80L) != 0L) |
| 455 |
{
|
| 456 |
flags |= N_FLAG; |
| 457 |
if (((src & 0x80L) == 0L) |
| 458 |
&& ((dst & 0x80L) == 0L)) |
| 459 |
{
|
| 460 |
flags |= V_FLAG; |
| 461 |
} |
| 462 |
else if (((src & 0x80L) != 0L) |
| 463 |
&& ((dst & 0x80L) != 0L)) |
| 464 |
{
|
| 465 |
flags |= C_FLAG; |
| 466 |
} |
| 467 |
} |
| 468 |
else
|
| 469 |
{
|
| 470 |
if ((res & 0xFFL) == 0L) |
| 471 |
{
|
| 472 |
flags |= Z_FLAG; |
| 473 |
} |
| 474 |
if (((src & 0x80L) != 0L) |
| 475 |
&& ((dst & 0x80L) != 0L)) |
| 476 |
{
|
| 477 |
flags |= V_FLAG; |
| 478 |
} |
| 479 |
if ((dst & 0x80L) != 0L |
| 480 |
|| (src & 0x80L) != 0L) |
| 481 |
{
|
| 482 |
flags |= C_FLAG; |
| 483 |
} |
| 484 |
} |
| 485 |
break;
|
| 486 |
case 2: |
| 487 |
if ((res & 0x8000L) != 0L) |
| 488 |
{
|
| 489 |
flags |= N_FLAG; |
| 490 |
if (((src & 0x8000L) == 0L) |
| 491 |
&& ((dst & 0x8000L) == 0L)) |
| 492 |
{
|
| 493 |
flags |= V_FLAG; |
| 494 |
} |
| 495 |
else if (((src & 0x8000L) != 0L) |
| 496 |
&& ((dst & 0x8000L) != 0L)) |
| 497 |
{
|
| 498 |
flags |= C_FLAG; |
| 499 |
} |
| 500 |
} |
| 501 |
else
|
| 502 |
{
|
| 503 |
if ((res & 0xFFFFL) == 0L) |
| 504 |
{
|
| 505 |
flags |= Z_FLAG; |
| 506 |
} |
| 507 |
if (((src & 0x8000L) != 0L) |
| 508 |
&& ((dst & 0x8000L) != 0L)) |
| 509 |
{
|
| 510 |
flags |= V_FLAG; |
| 511 |
} |
| 512 |
if ((dst & 0x8000L) != 0L |
| 513 |
|| (src & 0x8000L) != 0L) |
| 514 |
{
|
| 515 |
flags |= C_FLAG; |
| 516 |
} |
| 517 |
} |
| 518 |
break;
|
| 519 |
case 4: |
| 520 |
if ((res & 0x80000000L) != 0L) |
| 521 |
{
|
| 522 |
flags |= N_FLAG; |
| 523 |
if (((src & 0x80000000L) == 0L) |
| 524 |
&& ((dst & 0x80000000L) == 0L)) |
| 525 |
{
|
| 526 |
flags |= V_FLAG; |
| 527 |
} |
| 528 |
else if (((src & 0x80000000L) != 0L) && |
| 529 |
((dst & 0x80000000L) != 0L)) |
| 530 |
{
|
| 531 |
flags |= C_FLAG; |
| 532 |
} |
| 533 |
} |
| 534 |
else
|
| 535 |
{
|
| 536 |
if (res == 0L) |
| 537 |
flags |= Z_FLAG; |
| 538 |
if (((src & 0x80000000L) != 0L) |
| 539 |
&& ((dst & 0x80000000L) != 0L)) |
| 540 |
flags |= V_FLAG; |
| 541 |
if ((dst & 0x80000000L) != 0L |
| 542 |
|| (src & 0x80000000L) != 0L) |
| 543 |
flags |= C_FLAG; |
| 544 |
} |
| 545 |
break;
|
| 546 |
default:
|
| 547 |
break;
|
| 548 |
} |
| 549 |
|
| 550 |
if (env->cc_op == CC_OP_SUB
|
| 551 |
|| env->cc_op == CC_OP_CMP) {
|
| 552 |
flags ^= C_FLAG; |
| 553 |
} |
| 554 |
evaluate_flags_writeback(flags); |
| 555 |
} |