Revision 8cb7da56 hw/ppc_prep.c
| b/hw/ppc_prep.c | ||
|---|---|---|
| 145 | 145 |
|
| 146 | 146 |
static uint32_t PPC_intack_readw (void *opaque, target_phys_addr_t addr) |
| 147 | 147 |
{
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#ifdef TARGET_WORDS_BIGENDIAN |
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return bswap16(_PPC_intack_read(addr)); |
|
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#else |
|
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return _PPC_intack_read(addr); |
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#endif |
|
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} |
| 154 | 150 |
|
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static uint32_t PPC_intack_readl (void *opaque, target_phys_addr_t addr) |
| 156 | 152 |
{
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#ifdef TARGET_WORDS_BIGENDIAN |
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return bswap32(_PPC_intack_read(addr)); |
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#else |
|
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return _PPC_intack_read(addr); |
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#endif |
|
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} |
| 163 | 155 |
|
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static CPUWriteMemoryFunc * const PPC_intack_write[] = {
|
| ... | ... | |
| 210 | 202 |
static void PPC_XCSR_writew (void *opaque, |
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target_phys_addr_t addr, uint32_t value) |
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{
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#ifdef TARGET_WORDS_BIGENDIAN |
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value = bswap16(value); |
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#endif |
|
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printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", __func__, addr,
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value); |
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} |
| ... | ... | |
| 220 | 209 |
static void PPC_XCSR_writel (void *opaque, |
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target_phys_addr_t addr, uint32_t value) |
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{
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#ifdef TARGET_WORDS_BIGENDIAN |
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value = bswap32(value); |
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#endif |
|
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printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", __func__, addr,
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value); |
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} |
| ... | ... | |
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|
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printf("%s: 0x" TARGET_FMT_plx " <= %08" PRIx32 "\n", __func__, addr,
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| 245 | 231 |
retval); |
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#ifdef TARGET_WORDS_BIGENDIAN |
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retval = bswap16(retval); |
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#endif |
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| 249 | 232 |
|
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return retval; |
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} |
| ... | ... | |
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|
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printf("%s: 0x" TARGET_FMT_plx " <= %08" PRIx32 "\n", __func__, addr,
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| 258 | 241 |
retval); |
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#ifdef TARGET_WORDS_BIGENDIAN |
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retval = bswap32(retval); |
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#endif |
|
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|
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return retval; |
| 264 | 244 |
} |
| ... | ... | |
| 484 | 464 |
sysctrl_t *sysctrl = opaque; |
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|
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addr = prep_IO_address(sysctrl, addr); |
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#ifdef TARGET_WORDS_BIGENDIAN |
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value = bswap16(value); |
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#endif |
|
| 490 | 467 |
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value);
|
| 491 | 468 |
cpu_outw(addr, value); |
| 492 | 469 |
} |
| ... | ... | |
| 498 | 475 |
|
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addr = prep_IO_address(sysctrl, addr); |
| 500 | 477 |
ret = cpu_inw(addr); |
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#ifdef TARGET_WORDS_BIGENDIAN |
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ret = bswap16(ret); |
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#endif |
|
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PPC_IO_DPRINTF("0x" TARGET_FMT_plx " <= 0x%08" PRIx32 "\n", addr, ret);
|
| 505 | 479 |
|
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return ret; |
| ... | ... | |
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sysctrl_t *sysctrl = opaque; |
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|
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addr = prep_IO_address(sysctrl, addr); |
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#ifdef TARGET_WORDS_BIGENDIAN |
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value = bswap32(value); |
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#endif |
|
| 518 | 489 |
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value);
|
| 519 | 490 |
cpu_outl(addr, value); |
| 520 | 491 |
} |
| ... | ... | |
| 526 | 497 |
|
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addr = prep_IO_address(sysctrl, addr); |
| 528 | 499 |
ret = cpu_inl(addr); |
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#ifdef TARGET_WORDS_BIGENDIAN |
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ret = bswap32(ret); |
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#endif |
|
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PPC_IO_DPRINTF("0x" TARGET_FMT_plx " <= 0x%08" PRIx32 "\n", addr, ret);
|
| 533 | 501 |
|
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return ret; |
| ... | ... | |
| 691 | 659 |
/* Register 8 MB of ISA IO space (needed for non-contiguous map) */ |
| 692 | 660 |
PPC_io_memory = cpu_register_io_memory(PPC_prep_io_read, |
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PPC_prep_io_write, sysctrl, |
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DEVICE_NATIVE_ENDIAN);
|
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DEVICE_LITTLE_ENDIAN);
|
|
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cpu_register_physical_memory(0x80000000, 0x00800000, PPC_io_memory); |
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|
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/* init basic PC hardware */ |
| ... | ... | |
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/* PCI intack location */ |
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PPC_io_memory = cpu_register_io_memory(PPC_intack_read, |
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PPC_intack_write, NULL, |
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DEVICE_NATIVE_ENDIAN);
|
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DEVICE_LITTLE_ENDIAN);
|
|
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cpu_register_physical_memory(0xBFFFFFF0, 0x4, PPC_io_memory); |
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/* PowerPC control and status register group */ |
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#if 0 |
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PPC_io_memory = cpu_register_io_memory(PPC_XCSR_read, PPC_XCSR_write, |
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NULL, DEVICE_NATIVE_ENDIAN);
|
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NULL, DEVICE_LITTLE_ENDIAN);
|
|
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cpu_register_physical_memory(0xFEFF0000, 0x1000, PPC_io_memory); |
| 767 | 735 |
#endif |
| 768 | 736 |
|
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