root / hw / omap_tap.c @ 8d3a8c1e
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1 | cc9577cf | cmchao | /*
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2 | cc9577cf | cmchao | * TI OMAP TEST-Chip-level TAP emulation.
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3 | cc9577cf | cmchao | *
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4 | cc9577cf | cmchao | * Copyright (C) 2007-2008 Nokia Corporation
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5 | cc9577cf | cmchao | * Written by Andrzej Zaborowski <andrew@openedhand.com>
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6 | cc9577cf | cmchao | *
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7 | cc9577cf | cmchao | * This program is free software; you can redistribute it and/or
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8 | cc9577cf | cmchao | * modify it under the terms of the GNU General Public License as
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9 | cc9577cf | cmchao | * published by the Free Software Foundation; either version 2 or
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10 | cc9577cf | cmchao | * (at your option) any later version of the License.
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11 | cc9577cf | cmchao | *
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12 | cc9577cf | cmchao | * This program is distributed in the hope that it will be useful,
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13 | cc9577cf | cmchao | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | cc9577cf | cmchao | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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15 | cc9577cf | cmchao | * GNU General Public License for more details.
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16 | cc9577cf | cmchao | *
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17 | cc9577cf | cmchao | * You should have received a copy of the GNU General Public License along
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18 | cc9577cf | cmchao | * with this program; if not, see <http://www.gnu.org/licenses/>.
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19 | cc9577cf | cmchao | */
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20 | cc9577cf | cmchao | |
21 | cc9577cf | cmchao | #include "hw.h" |
22 | cc9577cf | cmchao | #include "omap.h" |
23 | cc9577cf | cmchao | |
24 | cc9577cf | cmchao | /* TEST-Chip-level TAP */
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25 | cc9577cf | cmchao | static uint32_t omap_tap_read(void *opaque, target_phys_addr_t addr) |
26 | cc9577cf | cmchao | { |
27 | cc9577cf | cmchao | struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque; |
28 | cc9577cf | cmchao | |
29 | cc9577cf | cmchao | switch (addr) {
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30 | cc9577cf | cmchao | case 0x204: /* IDCODE_reg */ |
31 | cc9577cf | cmchao | switch (s->mpu_model) {
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32 | cc9577cf | cmchao | case omap2420:
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33 | cc9577cf | cmchao | case omap2422:
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34 | cc9577cf | cmchao | case omap2423:
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35 | cc9577cf | cmchao | return 0x5b5d902f; /* ES 2.2 */ |
36 | cc9577cf | cmchao | case omap2430:
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37 | cc9577cf | cmchao | return 0x5b68a02f; /* ES 2.2 */ |
38 | cc9577cf | cmchao | case omap3430:
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39 | cc9577cf | cmchao | return 0x1b7ae02f; /* ES 2 */ |
40 | cc9577cf | cmchao | default:
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41 | cc9577cf | cmchao | hw_error("%s: Bad mpu model\n", __FUNCTION__);
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42 | cc9577cf | cmchao | } |
43 | cc9577cf | cmchao | |
44 | cc9577cf | cmchao | case 0x208: /* PRODUCTION_ID_reg for OMAP2 */ |
45 | cc9577cf | cmchao | case 0x210: /* PRODUCTION_ID_reg for OMAP3 */ |
46 | cc9577cf | cmchao | switch (s->mpu_model) {
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47 | cc9577cf | cmchao | case omap2420:
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48 | cc9577cf | cmchao | return 0x000254f0; /* POP ESHS2.1.1 in N91/93/95, ES2 in N800 */ |
49 | cc9577cf | cmchao | case omap2422:
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50 | cc9577cf | cmchao | return 0x000400f0; |
51 | cc9577cf | cmchao | case omap2423:
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52 | cc9577cf | cmchao | return 0x000800f0; |
53 | cc9577cf | cmchao | case omap2430:
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54 | cc9577cf | cmchao | return 0x000000f0; |
55 | cc9577cf | cmchao | case omap3430:
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56 | cc9577cf | cmchao | return 0x000000f0; |
57 | cc9577cf | cmchao | default:
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58 | cc9577cf | cmchao | hw_error("%s: Bad mpu model\n", __FUNCTION__);
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59 | cc9577cf | cmchao | } |
60 | cc9577cf | cmchao | |
61 | cc9577cf | cmchao | case 0x20c: |
62 | cc9577cf | cmchao | switch (s->mpu_model) {
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63 | cc9577cf | cmchao | case omap2420:
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64 | cc9577cf | cmchao | case omap2422:
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65 | cc9577cf | cmchao | case omap2423:
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66 | cc9577cf | cmchao | return 0xcafeb5d9; /* ES 2.2 */ |
67 | cc9577cf | cmchao | case omap2430:
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68 | cc9577cf | cmchao | return 0xcafeb68a; /* ES 2.2 */ |
69 | cc9577cf | cmchao | case omap3430:
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70 | cc9577cf | cmchao | return 0xcafeb7ae; /* ES 2 */ |
71 | cc9577cf | cmchao | default:
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72 | cc9577cf | cmchao | hw_error("%s: Bad mpu model\n", __FUNCTION__);
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73 | cc9577cf | cmchao | } |
74 | cc9577cf | cmchao | |
75 | cc9577cf | cmchao | case 0x218: /* DIE_ID_reg */ |
76 | cc9577cf | cmchao | return ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0); |
77 | cc9577cf | cmchao | case 0x21c: /* DIE_ID_reg */ |
78 | cc9577cf | cmchao | return 0x54 << 24; |
79 | cc9577cf | cmchao | case 0x220: /* DIE_ID_reg */ |
80 | cc9577cf | cmchao | return ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0); |
81 | cc9577cf | cmchao | case 0x224: /* DIE_ID_reg */ |
82 | cc9577cf | cmchao | return ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0); |
83 | cc9577cf | cmchao | } |
84 | cc9577cf | cmchao | |
85 | cc9577cf | cmchao | OMAP_BAD_REG(addr); |
86 | cc9577cf | cmchao | return 0; |
87 | cc9577cf | cmchao | } |
88 | cc9577cf | cmchao | |
89 | cc9577cf | cmchao | static void omap_tap_write(void *opaque, target_phys_addr_t addr, |
90 | cc9577cf | cmchao | uint32_t value) |
91 | cc9577cf | cmchao | { |
92 | cc9577cf | cmchao | OMAP_BAD_REG(addr); |
93 | cc9577cf | cmchao | } |
94 | cc9577cf | cmchao | |
95 | cc9577cf | cmchao | static CPUReadMemoryFunc * const omap_tap_readfn[] = { |
96 | cc9577cf | cmchao | omap_badwidth_read32, |
97 | cc9577cf | cmchao | omap_badwidth_read32, |
98 | cc9577cf | cmchao | omap_tap_read, |
99 | cc9577cf | cmchao | }; |
100 | cc9577cf | cmchao | |
101 | cc9577cf | cmchao | static CPUWriteMemoryFunc * const omap_tap_writefn[] = { |
102 | cc9577cf | cmchao | omap_badwidth_write32, |
103 | cc9577cf | cmchao | omap_badwidth_write32, |
104 | cc9577cf | cmchao | omap_tap_write, |
105 | cc9577cf | cmchao | }; |
106 | cc9577cf | cmchao | |
107 | cc9577cf | cmchao | void omap_tap_init(struct omap_target_agent_s *ta, |
108 | cc9577cf | cmchao | struct omap_mpu_state_s *mpu)
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109 | cc9577cf | cmchao | { |
110 | cc9577cf | cmchao | omap_l4_attach(ta, 0, l4_register_io_memory(
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111 | cc9577cf | cmchao | omap_tap_readfn, omap_tap_writefn, mpu)); |
112 | cc9577cf | cmchao | } |