root / hw / syborg_timer.c @ 8ec68b06
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/*
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* Syborg Interval Timer.
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*
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* Copyright (c) 2008 CodeSourcery
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "sysbus.h" |
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#include "qemu-timer.h" |
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#include "syborg.h" |
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//#define DEBUG_SYBORG_TIMER
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#ifdef DEBUG_SYBORG_TIMER
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#define DPRINTF(fmt, ...) \
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do { printf("syborg_timer: " fmt , ##args); } while (0) |
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#define BADF(fmt, ...) \
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do { fprintf(stderr, "syborg_timer: error: " fmt , ## __VA_ARGS__); \ |
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exit(1);} while (0) |
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#else
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#define DPRINTF(fmt, ...) do {} while(0) |
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#define BADF(fmt, ...) \
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do { fprintf(stderr, "syborg_timer: error: " fmt , ## __VA_ARGS__);} while (0) |
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#endif
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enum {
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TIMER_ID = 0,
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TIMER_RUNNING = 1,
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TIMER_ONESHOT = 2,
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TIMER_LIMIT = 3,
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TIMER_VALUE = 4,
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TIMER_INT_ENABLE = 5,
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TIMER_INT_STATUS = 6,
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TIMER_FREQ = 7
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}; |
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typedef struct { |
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SysBusDevice busdev; |
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ptimer_state *timer; |
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int running;
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int oneshot;
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uint32_t limit; |
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uint32_t freq; |
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uint32_t int_level; |
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uint32_t int_enabled; |
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qemu_irq irq; |
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} SyborgTimerState; |
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static void syborg_timer_update(SyborgTimerState *s) |
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{ |
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/* Update interrupt. */
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if (s->int_level && s->int_enabled) {
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qemu_irq_raise(s->irq); |
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} else {
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qemu_irq_lower(s->irq); |
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} |
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} |
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static void syborg_timer_tick(void *opaque) |
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{ |
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SyborgTimerState *s = (SyborgTimerState *)opaque; |
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//DPRINTF("Timer Tick\n");
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s->int_level = 1;
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if (s->oneshot)
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s->running = 0;
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syborg_timer_update(s); |
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} |
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static uint32_t syborg_timer_read(void *opaque, target_phys_addr_t offset) |
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{ |
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SyborgTimerState *s = (SyborgTimerState *)opaque; |
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DPRINTF("Reg read %d\n", (int)offset); |
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offset &= 0xfff;
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switch (offset >> 2) { |
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case TIMER_ID:
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return SYBORG_ID_TIMER;
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case TIMER_RUNNING:
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return s->running;
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case TIMER_ONESHOT:
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return s->oneshot;
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case TIMER_LIMIT:
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return s->limit;
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case TIMER_VALUE:
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return ptimer_get_count(s->timer);
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case TIMER_INT_ENABLE:
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return s->int_enabled;
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case TIMER_INT_STATUS:
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return s->int_level;
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case TIMER_FREQ:
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return s->freq;
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default:
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cpu_abort(cpu_single_env, "syborg_timer_read: Bad offset %x\n",
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(int)offset);
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return 0; |
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} |
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} |
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static void syborg_timer_write(void *opaque, target_phys_addr_t offset, |
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uint32_t value) |
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{ |
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SyborgTimerState *s = (SyborgTimerState *)opaque; |
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DPRINTF("Reg write %d\n", (int)offset); |
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offset &= 0xfff;
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switch (offset >> 2) { |
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case TIMER_RUNNING:
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if (value == s->running)
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break;
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s->running = value; |
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if (value) {
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ptimer_run(s->timer, s->oneshot); |
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} else {
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ptimer_stop(s->timer); |
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} |
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break;
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case TIMER_ONESHOT:
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if (s->running) {
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ptimer_stop(s->timer); |
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} |
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s->oneshot = value; |
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if (s->running) {
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ptimer_run(s->timer, s->oneshot); |
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} |
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break;
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case TIMER_LIMIT:
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s->limit = value; |
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ptimer_set_limit(s->timer, value, 1);
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break;
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case TIMER_VALUE:
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ptimer_set_count(s->timer, value); |
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break;
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case TIMER_INT_ENABLE:
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s->int_enabled = value; |
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syborg_timer_update(s); |
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break;
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case TIMER_INT_STATUS:
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s->int_level &= ~value; |
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syborg_timer_update(s); |
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break;
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default:
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cpu_abort(cpu_single_env, "syborg_timer_write: Bad offset %x\n",
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(int)offset);
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break;
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} |
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} |
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static CPUReadMemoryFunc * const syborg_timer_readfn[] = { |
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syborg_timer_read, |
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syborg_timer_read, |
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syborg_timer_read |
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}; |
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static CPUWriteMemoryFunc * const syborg_timer_writefn[] = { |
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syborg_timer_write, |
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syborg_timer_write, |
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syborg_timer_write |
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}; |
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static void syborg_timer_save(QEMUFile *f, void *opaque) |
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{ |
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SyborgTimerState *s = opaque; |
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qemu_put_be32(f, s->running); |
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qemu_put_be32(f, s->oneshot); |
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qemu_put_be32(f, s->limit); |
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qemu_put_be32(f, s->int_level); |
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qemu_put_be32(f, s->int_enabled); |
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qemu_put_ptimer(f, s->timer); |
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} |
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static int syborg_timer_load(QEMUFile *f, void *opaque, int version_id) |
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{ |
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SyborgTimerState *s = opaque; |
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if (version_id != 1) |
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return -EINVAL;
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s->running = qemu_get_be32(f); |
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s->oneshot = qemu_get_be32(f); |
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s->limit = qemu_get_be32(f); |
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s->int_level = qemu_get_be32(f); |
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s->int_enabled = qemu_get_be32(f); |
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qemu_get_ptimer(f, s->timer); |
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return 0; |
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} |
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static int syborg_timer_init(SysBusDevice *dev) |
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{ |
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SyborgTimerState *s = FROM_SYSBUS(SyborgTimerState, dev); |
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QEMUBH *bh; |
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int iomemtype;
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if (s->freq == 0) { |
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fprintf(stderr, "syborg_timer: Zero/unset frequency\n");
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exit(1);
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} |
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sysbus_init_irq(dev, &s->irq); |
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iomemtype = cpu_register_io_memory(syborg_timer_readfn, |
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syborg_timer_writefn, s); |
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sysbus_init_mmio(dev, 0x1000, iomemtype);
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bh = qemu_bh_new(syborg_timer_tick, s); |
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s->timer = ptimer_init(bh); |
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ptimer_set_freq(s->timer, s->freq); |
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register_savevm("syborg_timer", -1, 1, |
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syborg_timer_save, syborg_timer_load, s); |
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return 0; |
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} |
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static SysBusDeviceInfo syborg_timer_info = {
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.init = syborg_timer_init, |
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.qdev.name = "syborg,timer",
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.qdev.size = sizeof(SyborgTimerState),
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.qdev.props = (Property[]) { |
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DEFINE_PROP_UINT32("frequency",SyborgTimerState, freq, 0), |
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DEFINE_PROP_END_OF_LIST(), |
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} |
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}; |
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static void syborg_timer_register_devices(void) |
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{ |
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sysbus_register_withprop(&syborg_timer_info); |
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} |
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device_init(syborg_timer_register_devices) |