Revision 8ef6367e
| b/hw/mainstone.c | ||
|---|---|---|
| 11 | 11 |
#include "hw.h" |
| 12 | 12 |
#include "pxa.h" |
| 13 | 13 |
#include "arm-misc.h" |
| 14 |
#include "sysemu.h" |
|
| 15 | 14 |
#include "net.h" |
| 16 | 15 |
#include "devices.h" |
| 17 | 16 |
#include "boards.h" |
| b/hw/omap.c | ||
|---|---|---|
| 4809 | 4809 |
{
|
| 4810 | 4810 |
struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque; |
| 4811 | 4811 |
|
| 4812 |
omap_clkm_reset(mpu); |
|
| 4813 | 4812 |
omap_inth_reset(mpu->ih[0]); |
| 4814 | 4813 |
omap_inth_reset(mpu->ih[1]); |
| 4815 | 4814 |
omap_dma_reset(mpu->dma); |
| ... | ... | |
| 4843 | 4842 |
omap_mcbsp_reset(mpu->mcbsp3); |
| 4844 | 4843 |
omap_lpg_reset(mpu->led[0]); |
| 4845 | 4844 |
omap_lpg_reset(mpu->led[1]); |
| 4845 |
omap_clkm_reset(mpu); |
|
| 4846 | 4846 |
cpu_reset(mpu->env); |
| 4847 | 4847 |
} |
| 4848 | 4848 |
|
| b/hw/sd.c | ||
|---|---|---|
| 397 | 397 |
} |
| 398 | 398 |
|
| 399 | 399 |
/* We do not model the chip select pin, so allow the board to select |
| 400 |
whether card should be in SSI ot MMC/SD mode. It is also up to the
|
|
| 400 |
whether card should be in SSI or MMC/SD mode. It is also up to the
|
|
| 401 | 401 |
board to ensure that ssi transfers only occur when the chip select |
| 402 | 402 |
is asserted. */ |
| 403 | 403 |
SDState *sd_init(BlockDriverState *bs, int is_spi) |
| b/hw/tsc210x.c | ||
|---|---|---|
| 130 | 130 |
#define Y_TRANSFORM(value) \ |
| 131 | 131 |
((150 + ((int) (value) * (3037 - 150) / 32768)) << 4) |
| 132 | 132 |
#define Z1_TRANSFORM(s) \ |
| 133 |
((400 - (s)->x + ((s)->pressure << 9)) << 4)
|
|
| 133 |
((400 - ((s)->x >> 7) + ((s)->pressure << 10)) << 4)
|
|
| 134 | 134 |
#define Z2_TRANSFORM(s) \ |
| 135 |
((4000 + (s)->y - ((s)->pressure << 10)) << 4) |
|
| 135 |
((4000 + ((s)->y >> 7) - ((s)->pressure << 10)) << 4) |
|
| 136 |
|
|
| 136 | 137 |
#define BAT1_VAL 0x8660 |
| 137 | 138 |
#define BAT2_VAL 0x0000 |
| 138 | 139 |
#define AUX1_VAL 0x35c0 |
| ... | ... | |
| 367 | 368 |
|
| 368 | 369 |
case 0x05: /* BAT1 */ |
| 369 | 370 |
s->dav &= 0xffbf; |
| 370 |
return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision); |
|
| 371 |
return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision) + |
|
| 372 |
(s->noise & 6); |
|
| 371 | 373 |
|
| 372 | 374 |
case 0x06: /* BAT2 */ |
| 373 | 375 |
s->dav &= 0xffdf; |
| ... | ... | |
| 383 | 385 |
|
| 384 | 386 |
case 0x09: /* TEMP1 */ |
| 385 | 387 |
s->dav &= 0xfffb; |
| 386 |
return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision); |
|
| 388 |
return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision) - |
|
| 389 |
(s->noise & 5); |
|
| 387 | 390 |
|
| 388 | 391 |
case 0x0a: /* TEMP2 */ |
| 389 | 392 |
s->dav &= 0xfffd; |
| 390 |
return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision); |
|
| 393 |
return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision) ^ |
|
| 394 |
(s->noise & 3); |
|
| 391 | 395 |
|
| 392 | 396 |
case 0x0b: /* DAC */ |
| 393 | 397 |
s->dav &= 0xfffe; |
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