Revision 8f06bf69 tcg/mips/tcg-target.c
b/tcg/mips/tcg-target.c | ||
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static inline void tcg_out_bswap16(TCGContext *s, TCGReg ret, TCGReg arg) |
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{ |
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#ifdef _MIPS_ARCH_MIPS32R2
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#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg); |
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#else |
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/* ret and arg can't be register at */ |
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static inline void tcg_out_bswap16s(TCGContext *s, TCGReg ret, TCGReg arg) |
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{ |
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#ifdef _MIPS_ARCH_MIPS32R2
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#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg); |
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tcg_out_opc_reg(s, OPC_SEH, ret, 0, ret); |
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#else |
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static inline void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg) |
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{ |
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#ifdef _MIPS_ARCH_MIPS32R2
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#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg); |
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tcg_out_opc_sa(s, OPC_ROTR, ret, ret, 16); |
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#else |
... | ... | |
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static inline void tcg_out_ext8s(TCGContext *s, TCGReg ret, TCGReg arg) |
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{ |
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#ifdef _MIPS_ARCH_MIPS32R2
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#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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tcg_out_opc_reg(s, OPC_SEB, ret, 0, arg); |
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#else |
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tcg_out_opc_sa(s, OPC_SLL, ret, arg, 24); |
... | ... | |
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static inline void tcg_out_ext16s(TCGContext *s, TCGReg ret, TCGReg arg) |
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{ |
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#ifdef _MIPS_ARCH_MIPS32R2
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#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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tcg_out_opc_reg(s, OPC_SEH, ret, 0, arg); |
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#else |
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tcg_out_opc_sa(s, OPC_SLL, ret, arg, 16); |
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