Revision 8fec2b8c target-mips/op_helper.c
| b/target-mips/op_helper.c | ||
|---|---|---|
| 1194 | 1194 |
old = env->CP0_Status; |
| 1195 | 1195 |
env->CP0_Status = (env->CP0_Status & ~mask) | val; |
| 1196 | 1196 |
compute_hflags(env); |
| 1197 |
if (loglevel & CPU_LOG_EXEC)
|
|
| 1197 |
if (qemu_loglevel_mask(CPU_LOG_EXEC))
|
|
| 1198 | 1198 |
do_mtc0_status_debug(old, val); |
| 1199 | 1199 |
cpu_mips_update_irq(env); |
| 1200 | 1200 |
} |
| ... | ... | |
| 1705 | 1705 |
|
| 1706 | 1706 |
static void debug_pre_eret (void) |
| 1707 | 1707 |
{
|
| 1708 |
if (loglevel & CPU_LOG_EXEC) {
|
|
| 1708 |
if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
|
|
| 1709 | 1709 |
qemu_log("ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
|
| 1710 | 1710 |
env->active_tc.PC, env->CP0_EPC); |
| 1711 | 1711 |
if (env->CP0_Status & (1 << CP0St_ERL)) |
| ... | ... | |
| 1718 | 1718 |
|
| 1719 | 1719 |
static void debug_post_eret (void) |
| 1720 | 1720 |
{
|
| 1721 |
if (loglevel & CPU_LOG_EXEC) {
|
|
| 1721 |
if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
|
|
| 1722 | 1722 |
qemu_log(" => PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
|
| 1723 | 1723 |
env->active_tc.PC, env->CP0_EPC); |
| 1724 | 1724 |
if (env->CP0_Status & (1 << CP0St_ERL)) |
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