Revision 9042c0e2
| b/elf_ops.h | ||
|---|---|---|
| 153 | 153 |
glue(bswap_ehdr, SZ)(&ehdr); |
| 154 | 154 |
} |
| 155 | 155 |
|
| 156 |
if (ELF_MACHINE != ehdr.e_machine) |
|
| 157 |
goto fail; |
|
| 158 |
|
|
| 156 | 159 |
if (pentry) |
| 157 | 160 |
*pentry = (uint64_t)ehdr.e_entry; |
| 158 | 161 |
|
| ... | ... | |
| 164 | 167 |
if (!phdr) |
| 165 | 168 |
goto fail; |
| 166 | 169 |
if (read(fd, phdr, size) != size) |
| 167 |
goto fail; |
|
| 170 |
goto fail1;
|
|
| 168 | 171 |
if (must_swab) {
|
| 169 | 172 |
for(i = 0; i < ehdr.e_phnum; i++) {
|
| 170 | 173 |
ph = &phdr[i]; |
| ... | ... | |
| 181 | 184 |
data = qemu_mallocz(mem_size); |
| 182 | 185 |
if (ph->p_filesz > 0) {
|
| 183 | 186 |
if (lseek(fd, ph->p_offset, SEEK_SET) < 0) |
| 184 |
goto fail; |
|
| 187 |
goto fail2;
|
|
| 185 | 188 |
if (read(fd, data, ph->p_filesz) != ph->p_filesz) |
| 186 |
goto fail; |
|
| 189 |
goto fail2;
|
|
| 187 | 190 |
} |
| 188 | 191 |
addr = ph->p_vaddr + virt_to_phys_addend; |
| 189 | 192 |
|
| ... | ... | |
| 197 | 200 |
} |
| 198 | 201 |
qemu_free(phdr); |
| 199 | 202 |
return total_size; |
| 200 |
fail:
|
|
| 203 |
fail2:
|
|
| 201 | 204 |
qemu_free(data); |
| 205 |
fail1: |
|
| 202 | 206 |
qemu_free(phdr); |
| 207 |
fail: |
|
| 203 | 208 |
return -1; |
| 204 | 209 |
} |
| 205 | 210 |
|
| b/hw/mips_r4k.c | ||
|---|---|---|
| 11 | 11 |
|
| 12 | 12 |
#define BIOS_FILENAME "mips_bios.bin" |
| 13 | 13 |
//#define BIOS_FILENAME "system.bin" |
| 14 |
#define KERNEL_LOAD_ADDR (int32_t)0x80010000 |
|
| 15 | 14 |
#ifdef MIPS_HAS_MIPS64 |
| 16 | 15 |
#define INITRD_LOAD_ADDR (int64_t)0x80800000 |
| 17 | 16 |
#else |
| ... | ... | |
| 86 | 85 |
entry = (int32_t)entry; |
| 87 | 86 |
env->PC = entry; |
| 88 | 87 |
} else {
|
| 89 |
kernel_size = load_image(kernel_filename, |
|
| 90 |
phys_ram_base + KERNEL_LOAD_ADDR + VIRT_TO_PHYS_ADDEND); |
|
| 91 |
if (kernel_size < 0) {
|
|
| 92 |
fprintf(stderr, "qemu: could not load kernel '%s'\n", |
|
| 93 |
kernel_filename); |
|
| 94 |
exit(1); |
|
| 95 |
} |
|
| 96 |
env->PC = KERNEL_LOAD_ADDR; |
|
| 88 |
fprintf(stderr, "qemu: could not load kernel '%s'\n", |
|
| 89 |
kernel_filename); |
|
| 90 |
exit(1); |
|
| 97 | 91 |
} |
| 98 | 92 |
|
| 99 | 93 |
/* load initrd */ |
| b/loader.c | ||
|---|---|---|
| 197 | 197 |
int load_elf(const char *filename, int64_t virt_to_phys_addend, |
| 198 | 198 |
uint64_t *pentry) |
| 199 | 199 |
{
|
| 200 |
int fd, data_order, must_swab, ret; |
|
| 200 |
int fd, data_order, host_data_order, must_swab, ret;
|
|
| 201 | 201 |
uint8_t e_ident[EI_NIDENT]; |
| 202 | 202 |
|
| 203 | 203 |
fd = open(filename, O_RDONLY | O_BINARY); |
| ... | ... | |
| 218 | 218 |
data_order = ELFDATA2LSB; |
| 219 | 219 |
#endif |
| 220 | 220 |
must_swab = data_order != e_ident[EI_DATA]; |
| 221 |
|
|
| 221 |
|
|
| 222 |
#ifdef TARGET_WORDS_BIGENDIAN |
|
| 223 |
host_data_order = ELFDATA2MSB; |
|
| 224 |
#else |
|
| 225 |
host_data_order = ELFDATA2LSB; |
|
| 226 |
#endif |
|
| 227 |
if (host_data_order != e_ident[EI_DATA]) |
|
| 228 |
return -1; |
|
| 229 |
|
|
| 222 | 230 |
lseek(fd, 0, SEEK_SET); |
| 223 | 231 |
if (e_ident[EI_CLASS] == ELFCLASS64) {
|
| 224 | 232 |
ret = load_elf64(fd, virt_to_phys_addend, must_swab, pentry); |
| b/target-arm/cpu.h | ||
|---|---|---|
| 22 | 22 |
|
| 23 | 23 |
#define TARGET_LONG_BITS 32 |
| 24 | 24 |
|
| 25 |
#define ELF_MACHINE EM_ARM |
|
| 26 |
|
|
| 25 | 27 |
#include "cpu-defs.h" |
| 26 | 28 |
|
| 27 | 29 |
#include "softfloat.h" |
| b/target-i386/cpu.h | ||
|---|---|---|
| 36 | 36 |
|
| 37 | 37 |
#define TARGET_HAS_ICE 1 |
| 38 | 38 |
|
| 39 |
#ifdef TARGET_X86_64 |
|
| 40 |
#define ELF_MACHINE EM_X86_64 |
|
| 41 |
#else |
|
| 42 |
#define ELF_MACHINE EM_386 |
|
| 43 |
#endif |
|
| 44 |
|
|
| 39 | 45 |
#include "cpu-defs.h" |
| 40 | 46 |
|
| 41 | 47 |
#include "softfloat.h" |
| b/target-m68k/cpu.h | ||
|---|---|---|
| 31 | 31 |
|
| 32 | 32 |
#define TARGET_HAS_ICE 1 |
| 33 | 33 |
|
| 34 |
#define ELF_MACHINE EM_68K |
|
| 35 |
|
|
| 34 | 36 |
#define EXCP_ACCESS 2 /* Access (MMU) error. */ |
| 35 | 37 |
#define EXCP_ADDRESS 3 /* Address error. */ |
| 36 | 38 |
#define EXCP_ILLEGAL 4 /* Illegal instruction. */ |
| b/target-mips/cpu.h | ||
|---|---|---|
| 3 | 3 |
|
| 4 | 4 |
#define TARGET_HAS_ICE 1 |
| 5 | 5 |
|
| 6 |
#define ELF_MACHINE EM_MIPS |
|
| 7 |
|
|
| 6 | 8 |
#include "config.h" |
| 7 | 9 |
#include "mips-defs.h" |
| 8 | 10 |
#include "cpu-defs.h" |
| b/target-ppc/cpu.h | ||
|---|---|---|
| 32 | 32 |
|
| 33 | 33 |
#define TARGET_HAS_ICE 1 |
| 34 | 34 |
|
| 35 |
#define ELF_MACHINE EM_PPC |
|
| 36 |
|
|
| 35 | 37 |
/* XXX: this should be tunable: PowerPC 601 & 64 bits PowerPC |
| 36 | 38 |
* have different cache line sizes |
| 37 | 39 |
*/ |
| b/target-sh4/cpu.h | ||
|---|---|---|
| 25 | 25 |
#define TARGET_LONG_BITS 32 |
| 26 | 26 |
#define TARGET_HAS_ICE 1 |
| 27 | 27 |
|
| 28 |
#define ELF_MACHINE EM_SH |
|
| 29 |
|
|
| 28 | 30 |
#include "cpu-defs.h" |
| 29 | 31 |
|
| 30 | 32 |
#include "softfloat.h" |
| b/target-sparc/cpu.h | ||
|---|---|---|
| 19 | 19 |
|
| 20 | 20 |
#define TARGET_HAS_ICE 1 |
| 21 | 21 |
|
| 22 |
#if !defined(TARGET_SPARC64) |
|
| 23 |
#define ELF_MACHINE EM_SPARC |
|
| 24 |
#else |
|
| 25 |
#define ELF_MACHINE EM_SPARCV9 |
|
| 26 |
#endif |
|
| 27 |
|
|
| 22 | 28 |
/*#define EXCP_INTERRUPT 0x100*/ |
| 23 | 29 |
|
| 24 | 30 |
/* trap definitions */ |
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