Revision 90e189ec target-ppc/translate.c
b/target-ppc/translate.c | ||
---|---|---|
3755 | 3755 |
*/ |
3756 | 3756 |
if (sprn != SPR_PVR) { |
3757 | 3757 |
qemu_log("Trying to read privileged spr %d %03x at " |
3758 |
ADDRX "\n", sprn, sprn, ctx->nip);
|
|
3759 |
printf("Trying to read privileged spr %d %03x at " ADDRX "\n",
|
|
3760 |
sprn, sprn, ctx->nip); |
|
3758 |
TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);
|
|
3759 |
printf("Trying to read privileged spr %d %03x at " |
|
3760 |
TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);
|
|
3761 | 3761 |
} |
3762 | 3762 |
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
3763 | 3763 |
} |
3764 | 3764 |
} else { |
3765 | 3765 |
/* Not defined */ |
3766 | 3766 |
qemu_log("Trying to read invalid spr %d %03x at " |
3767 |
ADDRX "\n", sprn, sprn, ctx->nip);
|
|
3768 |
printf("Trying to read invalid spr %d %03x at " ADDRX "\n",
|
|
3767 |
TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);
|
|
3768 |
printf("Trying to read invalid spr %d %03x at " TARGET_FMT_lx "\n",
|
|
3769 | 3769 |
sprn, sprn, ctx->nip); |
3770 | 3770 |
gen_inval_exception(ctx, POWERPC_EXCP_INVAL_SPR); |
3771 | 3771 |
} |
... | ... | |
3905 | 3905 |
} else { |
3906 | 3906 |
/* Privilege exception */ |
3907 | 3907 |
qemu_log("Trying to write privileged spr %d %03x at " |
3908 |
ADDRX "\n", sprn, sprn, ctx->nip);
|
|
3909 |
printf("Trying to write privileged spr %d %03x at " ADDRX "\n",
|
|
3910 |
sprn, sprn, ctx->nip); |
|
3908 |
TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);
|
|
3909 |
printf("Trying to write privileged spr %d %03x at " TARGET_FMT_lx
|
|
3910 |
"\n", sprn, sprn, ctx->nip);
|
|
3911 | 3911 |
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
3912 | 3912 |
} |
3913 | 3913 |
} else { |
3914 | 3914 |
/* Not defined */ |
3915 | 3915 |
qemu_log("Trying to write invalid spr %d %03x at " |
3916 |
ADDRX "\n", sprn, sprn, ctx->nip);
|
|
3917 |
printf("Trying to write invalid spr %d %03x at " ADDRX "\n",
|
|
3916 |
TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);
|
|
3917 |
printf("Trying to write invalid spr %d %03x at " TARGET_FMT_lx "\n",
|
|
3918 | 3918 |
sprn, sprn, ctx->nip); |
3919 | 3919 |
gen_inval_exception(ctx, POWERPC_EXCP_INVAL_SPR); |
3920 | 3920 |
} |
... | ... | |
8839 | 8839 |
|
8840 | 8840 |
int i; |
8841 | 8841 |
|
8842 |
cpu_fprintf(f, "NIP " ADDRX " LR " ADDRX " CTR " ADDRX " XER %08x\n", |
|
8843 |
env->nip, env->lr, env->ctr, env->xer); |
|
8844 |
cpu_fprintf(f, "MSR " ADDRX " HID0 " ADDRX " HF " ADDRX " idx %d\n", |
|
8845 |
env->msr, env->spr[SPR_HID0], env->hflags, env->mmu_idx); |
|
8842 |
cpu_fprintf(f, "NIP " TARGET_FMT_lx " LR " TARGET_FMT_lx " CTR " |
|
8843 |
TARGET_FMT_lx " XER %08x\n", env->nip, env->lr, env->ctr, |
|
8844 |
env->xer); |
|
8845 |
cpu_fprintf(f, "MSR " TARGET_FMT_lx " HID0 " TARGET_FMT_lx " HF " |
|
8846 |
TARGET_FMT_lx " idx %d\n", env->msr, env->spr[SPR_HID0], |
|
8847 |
env->hflags, env->mmu_idx); |
|
8846 | 8848 |
#if !defined(NO_TIMER_DUMP) |
8847 | 8849 |
cpu_fprintf(f, "TB %08x %08x " |
8848 | 8850 |
#if !defined(CONFIG_USER_ONLY) |
... | ... | |
8876 | 8878 |
a = 'E'; |
8877 | 8879 |
cpu_fprintf(f, " %c%c", a, env->crf[i] & 0x01 ? 'O' : ' '); |
8878 | 8880 |
} |
8879 |
cpu_fprintf(f, " ] RES " ADDRX "\n", env->reserve_addr); |
|
8881 |
cpu_fprintf(f, " ] RES " TARGET_FMT_lx "\n", |
|
8882 |
env->reserve_addr); |
|
8880 | 8883 |
for (i = 0; i < 32; i++) { |
8881 | 8884 |
if ((i & (RFPL - 1)) == 0) |
8882 | 8885 |
cpu_fprintf(f, "FPR%02d", i); |
... | ... | |
8886 | 8889 |
} |
8887 | 8890 |
cpu_fprintf(f, "FPSCR %08x\n", env->fpscr); |
8888 | 8891 |
#if !defined(CONFIG_USER_ONLY) |
8889 |
cpu_fprintf(f, "SRR0 " ADDRX " SRR1 " ADDRX " SDR1 " ADDRX "\n", |
|
8890 |
env->spr[SPR_SRR0], env->spr[SPR_SRR1], env->sdr1); |
|
8892 |
cpu_fprintf(f, "SRR0 " TARGET_FMT_lx " SRR1 " TARGET_FMT_lx " SDR1 " |
|
8893 |
TARGET_FMT_lx "\n", env->spr[SPR_SRR0], env->spr[SPR_SRR1], |
|
8894 |
env->sdr1); |
|
8891 | 8895 |
#endif |
8892 | 8896 |
|
8893 | 8897 |
#undef RGPL |
... | ... | |
9016 | 9020 |
gen_opc_icount[lj] = num_insns; |
9017 | 9021 |
} |
9018 | 9022 |
LOG_DISAS("----------------\n"); |
9019 |
LOG_DISAS("nip=" ADDRX " super=%d ir=%d\n",
|
|
9023 |
LOG_DISAS("nip=" TARGET_FMT_lx " super=%d ir=%d\n",
|
|
9020 | 9024 |
ctx.nip, ctx.mem_idx, (int)msr_ir); |
9021 | 9025 |
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) |
9022 | 9026 |
gen_io_start(); |
... | ... | |
9044 | 9048 |
if (unlikely(handler->handler == &gen_invalid)) { |
9045 | 9049 |
if (qemu_log_enabled()) { |
9046 | 9050 |
qemu_log("invalid/unsupported opcode: " |
9047 |
"%02x - %02x - %02x (%08x) " ADDRX " %d\n",
|
|
9048 |
opc1(ctx.opcode), opc2(ctx.opcode),
|
|
9049 |
opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir);
|
|
9051 |
"%02x - %02x - %02x (%08x) " TARGET_FMT_lx " %d\n",
|
|
9052 |
opc1(ctx.opcode), opc2(ctx.opcode), |
|
9053 |
opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir); |
|
9050 | 9054 |
} else { |
9051 | 9055 |
printf("invalid/unsupported opcode: " |
9052 |
"%02x - %02x - %02x (%08x) " ADDRX " %d\n",
|
|
9056 |
"%02x - %02x - %02x (%08x) " TARGET_FMT_lx " %d\n",
|
|
9053 | 9057 |
opc1(ctx.opcode), opc2(ctx.opcode), |
9054 | 9058 |
opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir); |
9055 | 9059 |
} |
... | ... | |
9057 | 9061 |
if (unlikely((ctx.opcode & handler->inval) != 0)) { |
9058 | 9062 |
if (qemu_log_enabled()) { |
9059 | 9063 |
qemu_log("invalid bits: %08x for opcode: " |
9060 |
"%02x - %02x - %02x (%08x) " ADDRX "\n",
|
|
9061 |
ctx.opcode & handler->inval, opc1(ctx.opcode),
|
|
9062 |
opc2(ctx.opcode), opc3(ctx.opcode),
|
|
9063 |
ctx.opcode, ctx.nip - 4);
|
|
9064 |
"%02x - %02x - %02x (%08x) " TARGET_FMT_lx "\n",
|
|
9065 |
ctx.opcode & handler->inval, opc1(ctx.opcode), |
|
9066 |
opc2(ctx.opcode), opc3(ctx.opcode), |
|
9067 |
ctx.opcode, ctx.nip - 4); |
|
9064 | 9068 |
} else { |
9065 | 9069 |
printf("invalid bits: %08x for opcode: " |
9066 |
"%02x - %02x - %02x (%08x) " ADDRX "\n",
|
|
9070 |
"%02x - %02x - %02x (%08x) " TARGET_FMT_lx "\n",
|
|
9067 | 9071 |
ctx.opcode & handler->inval, opc1(ctx.opcode), |
9068 | 9072 |
opc2(ctx.opcode), opc3(ctx.opcode), |
9069 | 9073 |
ctx.opcode, ctx.nip - 4); |
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