root / hw / pl050.c @ 92d88ecb
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/*
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* Arm PrimeCell PL050 Keyboard / Mouse Interface
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*
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* Copyright (c) 2006 CodeSourcery.
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* Written by Paul Brook
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*
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* This code is licenced under the GPL.
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*/
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#include "vl.h" |
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typedef struct { |
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void *dev;
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uint32_t base; |
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uint32_t cr; |
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uint32_t clk; |
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uint32_t last; |
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int pending;
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qemu_irq irq; |
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int is_mouse;
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} pl050_state; |
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static const unsigned char pl050_id[] = |
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{ 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; |
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static void pl050_update(void *opaque, int level) |
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{ |
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pl050_state *s = (pl050_state *)opaque; |
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int raise;
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s->pending = level; |
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raise = (s->pending && (s->cr & 0x10) != 0) |
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|| (s->cr & 0x08) != 0; |
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qemu_set_irq(s->irq, raise); |
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} |
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static uint32_t pl050_read(void *opaque, target_phys_addr_t offset) |
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{ |
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pl050_state *s = (pl050_state *)opaque; |
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offset -= s->base; |
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if (offset >= 0xfe0 && offset < 0x1000) |
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return pl050_id[(offset - 0xfe0) >> 2]; |
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switch (offset >> 2) { |
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case 0: /* KMICR */ |
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return s->cr;
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case 1: /* KMISTAT */ |
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/* KMIC and KMID bits not implemented. */
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if (s->pending) {
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return 0x10; |
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} else {
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return 0; |
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} |
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case 2: /* KMIDATA */ |
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if (s->pending)
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s->last = ps2_read_data(s->dev); |
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return s->last;
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case 3: /* KMICLKDIV */ |
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return s->clk;
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case 4: /* KMIIR */ |
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return s->pending | 2; |
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default:
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cpu_abort (cpu_single_env, "pl050_read: Bad offset %x\n", offset);
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return 0; |
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} |
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} |
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static void pl050_write(void *opaque, target_phys_addr_t offset, |
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uint32_t value) |
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{ |
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pl050_state *s = (pl050_state *)opaque; |
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offset -= s->base; |
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switch (offset >> 2) { |
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case 0: /* KMICR */ |
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s->cr = value; |
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pl050_update(s, s->pending); |
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/* ??? Need to implement the enable/disable bit. */
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break;
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case 2: /* KMIDATA */ |
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/* ??? This should toggle the TX interrupt line. */
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/* ??? This means kbd/mouse can block each other. */
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if (s->is_mouse) {
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ps2_write_mouse(s->dev, value); |
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} else {
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ps2_write_keyboard(s->dev, value); |
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} |
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break;
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case 3: /* KMICLKDIV */ |
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s->clk = value; |
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return;
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default:
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cpu_abort (cpu_single_env, "pl050_write: Bad offset %x\n", offset);
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} |
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} |
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static CPUReadMemoryFunc *pl050_readfn[] = {
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pl050_read, |
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pl050_read, |
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pl050_read |
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}; |
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static CPUWriteMemoryFunc *pl050_writefn[] = {
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pl050_write, |
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pl050_write, |
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pl050_write |
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}; |
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void pl050_init(uint32_t base, qemu_irq irq, int is_mouse) |
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{ |
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int iomemtype;
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pl050_state *s; |
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s = (pl050_state *)qemu_mallocz(sizeof(pl050_state));
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iomemtype = cpu_register_io_memory(0, pl050_readfn,
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pl050_writefn, s); |
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cpu_register_physical_memory(base, 0x00000fff, iomemtype);
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s->base = base; |
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s->irq = irq; |
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s->is_mouse = is_mouse; |
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if (is_mouse)
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s->dev = ps2_mouse_init(pl050_update, s); |
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else
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s->dev = ps2_kbd_init(pl050_update, s); |
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/* ??? Save/restore. */
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} |
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