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/*
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 * QEMU TCX Frame buffer
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 * 
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 * Copyright (c) 2003-2005 Fabrice Bellard
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 * 
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "vl.h"
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#define MAXX 1024
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#define MAXY 768
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#define TCX_DAC_NREGS 16
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typedef struct TCXState {
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    uint32_t addr;
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    DisplayState *ds;
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    uint8_t *vram;
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    ram_addr_t vram_offset;
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    uint16_t width, height;
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    uint8_t r[256], g[256], b[256];
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    uint32_t palette[256];
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    uint8_t dac_index, dac_state;
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} TCXState;
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static void tcx_screen_dump(void *opaque, const char *filename);
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/* XXX: unify with vga draw line functions */
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static inline unsigned int rgb_to_pixel8(unsigned int r, unsigned int g, unsigned b)
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{
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    return ((r >> 5) << 5) | ((g >> 5) << 2) | (b >> 6);
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}
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static inline unsigned int rgb_to_pixel15(unsigned int r, unsigned int g, unsigned b)
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{
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    return ((r >> 3) << 10) | ((g >> 3) << 5) | (b >> 3);
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}
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static inline unsigned int rgb_to_pixel16(unsigned int r, unsigned int g, unsigned b)
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{
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    return ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3);
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}
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static inline unsigned int rgb_to_pixel32(unsigned int r, unsigned int g, unsigned b)
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{
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    return (r << 16) | (g << 8) | b;
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}
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static void update_palette_entries(TCXState *s, int start, int end)
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{
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    int i;
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    for(i = start; i < end; i++) {
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        switch(s->ds->depth) {
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        default:
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        case 8:
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            s->palette[i] = rgb_to_pixel8(s->r[i], s->g[i], s->b[i]);
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            break;
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        case 15:
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            s->palette[i] = rgb_to_pixel15(s->r[i], s->g[i], s->b[i]);
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            break;
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        case 16:
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            s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]);
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            break;
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        case 32:
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            s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]);
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            break;
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        }
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    }
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}
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static void tcx_draw_line32(TCXState *s1, uint8_t *d, 
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                            const uint8_t *s, int width)
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{
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    int x;
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    uint8_t val;
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    uint32_t *p = (uint32_t *)d;
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    for(x = 0; x < width; x++) {
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        val = *s++;
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        *p++ = s1->palette[val];
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    }
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}
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static void tcx_draw_line16(TCXState *s1, uint8_t *d, 
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                            const uint8_t *s, int width)
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{
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    int x;
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    uint8_t val;
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    uint16_t *p = (uint16_t *)d;
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    for(x = 0; x < width; x++) {
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        val = *s++;
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        *p++ = s1->palette[val];
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    }
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}
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static void tcx_draw_line8(TCXState *s1, uint8_t *d, 
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                           const uint8_t *s, int width)
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{
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    int x;
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    uint8_t val;
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    for(x = 0; x < width; x++) {
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        val = *s++;
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        *d++ = s1->palette[val];
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    }
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}
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/* Fixed line length 1024 allows us to do nice tricks not possible on
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   VGA... */
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static void tcx_update_display(void *opaque)
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{
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    TCXState *ts = opaque;
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    ram_addr_t page, page_min, page_max;
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    int y, y_start, dd, ds;
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    uint8_t *d, *s;
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    void (*f)(TCXState *s1, uint8_t *d, const uint8_t *s, int width);
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    if (ts->ds->depth == 0)
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        return;
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    page = ts->vram_offset;
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    y_start = -1;
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    page_min = 0xffffffff;
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    page_max = 0;
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    d = ts->ds->data;
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    s = ts->vram;
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    dd = ts->ds->linesize;
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    ds = 1024;
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    switch (ts->ds->depth) {
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    case 32:
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        f = tcx_draw_line32;
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        break;
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    case 15:
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    case 16:
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        f = tcx_draw_line16;
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        break;
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    default:
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    case 8:
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        f = tcx_draw_line8;
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        break;
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    case 0:
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        return;
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    }
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    for(y = 0; y < ts->height; y += 4, page += TARGET_PAGE_SIZE) {
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        if (cpu_physical_memory_get_dirty(page, VGA_DIRTY_FLAG)) {
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            if (y_start < 0)
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                y_start = y;
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            if (page < page_min)
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                page_min = page;
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            if (page > page_max)
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                page_max = page;
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            f(ts, d, s, ts->width);
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            d += dd;
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            s += ds;
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            f(ts, d, s, ts->width);
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            d += dd;
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            s += ds;
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            f(ts, d, s, ts->width);
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            d += dd;
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            s += ds;
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            f(ts, d, s, ts->width);
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            d += dd;
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            s += ds;
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        } else {
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            if (y_start >= 0) {
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                /* flush to display */
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                dpy_update(ts->ds, 0, y_start, 
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                           ts->width, y - y_start);
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                y_start = -1;
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            }
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            d += dd * 4;
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            s += ds * 4;
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        }
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    }
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    if (y_start >= 0) {
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        /* flush to display */
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        dpy_update(ts->ds, 0, y_start, 
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                   ts->width, y - y_start);
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    }
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    /* reset modified pages */
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    if (page_min <= page_max) {
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        cpu_physical_memory_reset_dirty(page_min, page_max + TARGET_PAGE_SIZE,
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                                        VGA_DIRTY_FLAG);
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    }
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}
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static void tcx_invalidate_display(void *opaque)
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{
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    TCXState *s = opaque;
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    int i;
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    for (i = 0; i < MAXX*MAXY; i += TARGET_PAGE_SIZE) {
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        cpu_physical_memory_set_dirty(s->vram_offset + i);
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    }
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}
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static void tcx_save(QEMUFile *f, void *opaque)
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{
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    TCXState *s = opaque;
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    qemu_put_be32s(f, (uint32_t *)&s->addr);
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    qemu_put_be32s(f, (uint32_t *)&s->vram);
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    qemu_put_be16s(f, (uint16_t *)&s->height);
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    qemu_put_be16s(f, (uint16_t *)&s->width);
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    qemu_put_buffer(f, s->r, 256);
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    qemu_put_buffer(f, s->g, 256);
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    qemu_put_buffer(f, s->b, 256);
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    qemu_put_8s(f, &s->dac_index);
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    qemu_put_8s(f, &s->dac_state);
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}
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static int tcx_load(QEMUFile *f, void *opaque, int version_id)
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{
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    TCXState *s = opaque;
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    if (version_id != 1)
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        return -EINVAL;
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    qemu_get_be32s(f, (uint32_t *)&s->addr);
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    qemu_get_be32s(f, (uint32_t *)&s->vram);
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    qemu_get_be16s(f, (uint16_t *)&s->height);
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    qemu_get_be16s(f, (uint16_t *)&s->width);
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    qemu_get_buffer(f, s->r, 256);
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    qemu_get_buffer(f, s->g, 256);
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    qemu_get_buffer(f, s->b, 256);
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    qemu_get_8s(f, &s->dac_index);
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    qemu_get_8s(f, &s->dac_state);
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    update_palette_entries(s, 0, 256);
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    tcx_invalidate_display(s);
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    return 0;
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}
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static void tcx_reset(void *opaque)
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{
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    TCXState *s = opaque;
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    /* Initialize palette */
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    memset(s->r, 0, 256);
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    memset(s->g, 0, 256);
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    memset(s->b, 0, 256);
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    s->r[255] = s->g[255] = s->b[255] = 255;
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    update_palette_entries(s, 0, 256);
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    memset(s->vram, 0, MAXX*MAXY);
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    cpu_physical_memory_reset_dirty(s->vram_offset, s->vram_offset + MAXX*MAXY,
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                                    VGA_DIRTY_FLAG);
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    s->dac_index = 0;
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    s->dac_state = 0;
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}
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static uint32_t tcx_dac_readl(void *opaque, target_phys_addr_t addr)
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{
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    return 0;
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}
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static void tcx_dac_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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    TCXState *s = opaque;
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    uint32_t saddr;
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    saddr = (addr & (TCX_DAC_NREGS - 1)) >> 2;
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    switch (saddr) {
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    case 0:
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        s->dac_index = val >> 24;
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        s->dac_state = 0;
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        break;
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    case 1:
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        switch (s->dac_state) {
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        case 0:
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            s->r[s->dac_index] = val >> 24;
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            update_palette_entries(s, s->dac_index, s->dac_index + 1);
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            s->dac_state++;
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            break;
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        case 1:
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            s->g[s->dac_index] = val >> 24;
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            update_palette_entries(s, s->dac_index, s->dac_index + 1);
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            s->dac_state++;
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            break;
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        case 2:
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            s->b[s->dac_index] = val >> 24;
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            update_palette_entries(s, s->dac_index, s->dac_index + 1);
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            s->dac_index = (s->dac_index + 1) & 255; // Index autoincrement
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        default:
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            s->dac_state = 0;
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            break;
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        }
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        break;
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    default:
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        break;
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    }
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    return;
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}
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static CPUReadMemoryFunc *tcx_dac_read[3] = {
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    tcx_dac_readl,
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    tcx_dac_readl,
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    tcx_dac_readl,
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};
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static CPUWriteMemoryFunc *tcx_dac_write[3] = {
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    tcx_dac_writel,
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    tcx_dac_writel,
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    tcx_dac_writel,
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};
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void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
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              unsigned long vram_offset, int vram_size, int width, int height)
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{
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    TCXState *s;
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    int io_memory;
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    s = qemu_mallocz(sizeof(TCXState));
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    if (!s)
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        return;
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    s->ds = ds;
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    s->addr = addr;
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    s->vram = vram_base;
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    s->vram_offset = vram_offset;
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    s->width = width;
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    s->height = height;
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    cpu_register_physical_memory(addr + 0x800000, vram_size, vram_offset);
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    io_memory = cpu_register_io_memory(0, tcx_dac_read, tcx_dac_write, s);
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    cpu_register_physical_memory(addr + 0x200000, TCX_DAC_NREGS, io_memory);
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    graphic_console_init(s->ds, tcx_update_display, tcx_invalidate_display,
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                         tcx_screen_dump, s);
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    register_savevm("tcx", addr, 1, tcx_save, tcx_load, s);
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    qemu_register_reset(tcx_reset, s);
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    tcx_reset(s);
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    dpy_resize(s->ds, width, height);
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}
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static void tcx_screen_dump(void *opaque, const char *filename)
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{
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    TCXState *s = opaque;
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    FILE *f;
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    uint8_t *d, *d1, v;
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    int y, x;
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    f = fopen(filename, "wb");
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    if (!f)
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        return;
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    fprintf(f, "P6\n%d %d\n%d\n", s->width, s->height, 255);
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    d1 = s->vram;
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    for(y = 0; y < s->height; y++) {
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        d = d1;
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        for(x = 0; x < s->width; x++) {
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            v = *d;
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            fputc(s->r[v], f);
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            fputc(s->g[v], f);
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            fputc(s->b[v], f);
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            d++;
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        }
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        d1 += MAXX;
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    }
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    fclose(f);
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    return;
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}
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