root / target-s390x / cc_helper.c @ 932385a3
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/*
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* S/390 condition code helper routines
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*
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* Copyright (c) 2009 Ulrich Hecht
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* Copyright (c) 2009 Alexander Graf
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "cpu.h" |
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#include "helper.h" |
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/* #define DEBUG_HELPER */
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#ifdef DEBUG_HELPER
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#define HELPER_LOG(x...) qemu_log(x)
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#else
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#define HELPER_LOG(x...)
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#endif
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static inline uint32_t cc_calc_ltgt_32(CPUS390XState *env, int32_t src, |
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int32_t dst) |
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{
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if (src == dst) {
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return 0; |
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} else if (src < dst) { |
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return 1; |
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} else {
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return 2; |
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} |
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} |
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static inline uint32_t cc_calc_ltgt0_32(CPUS390XState *env, int32_t dst) |
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{
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return cc_calc_ltgt_32(env, dst, 0); |
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} |
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|
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static inline uint32_t cc_calc_ltgt_64(CPUS390XState *env, int64_t src, |
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int64_t dst) |
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{
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if (src == dst) {
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return 0; |
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} else if (src < dst) { |
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return 1; |
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} else {
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return 2; |
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} |
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} |
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static inline uint32_t cc_calc_ltgt0_64(CPUS390XState *env, int64_t dst) |
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{
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return cc_calc_ltgt_64(env, dst, 0); |
| 63 |
} |
| 64 |
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static inline uint32_t cc_calc_ltugtu_32(CPUS390XState *env, uint32_t src, |
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uint32_t dst) |
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{
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if (src == dst) {
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return 0; |
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} else if (src < dst) { |
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return 1; |
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} else {
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return 2; |
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} |
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} |
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static inline uint32_t cc_calc_ltugtu_64(CPUS390XState *env, uint64_t src, |
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uint64_t dst) |
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{
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if (src == dst) {
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return 0; |
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} else if (src < dst) { |
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return 1; |
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} else {
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return 2; |
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} |
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} |
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static inline uint32_t cc_calc_tm_32(CPUS390XState *env, uint32_t val, |
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uint32_t mask) |
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{
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uint16_t r = val & mask; |
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|
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HELPER_LOG("%s: val 0x%x mask 0x%x\n", __func__, val, mask);
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if (r == 0 || mask == 0) { |
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return 0; |
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} else if (r == mask) { |
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return 3; |
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} else {
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return 1; |
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} |
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} |
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/* set condition code for test under mask */
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static inline uint32_t cc_calc_tm_64(CPUS390XState *env, uint64_t val, |
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uint32_t mask) |
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{
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uint16_t r = val & mask; |
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HELPER_LOG("%s: val 0x%lx mask 0x%x r 0x%x\n", __func__, val, mask, r);
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if (r == 0 || mask == 0) { |
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return 0; |
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} else if (r == mask) { |
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return 3; |
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} else {
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while (!(mask & 0x8000)) { |
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mask <<= 1;
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val <<= 1;
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} |
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if (val & 0x8000) { |
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return 2; |
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} else {
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return 1; |
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} |
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} |
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} |
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static inline uint32_t cc_calc_nz(CPUS390XState *env, uint64_t dst) |
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{
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return !!dst;
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} |
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static inline uint32_t cc_calc_add_64(CPUS390XState *env, int64_t a1, |
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int64_t a2, int64_t ar) |
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{
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if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) { |
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return 3; /* overflow */ |
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} else {
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if (ar < 0) { |
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return 1; |
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} else if (ar > 0) { |
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return 2; |
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} else {
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return 0; |
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} |
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} |
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} |
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static inline uint32_t cc_calc_addu_64(CPUS390XState *env, uint64_t a1, |
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uint64_t a2, uint64_t ar) |
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{
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if (ar == 0) { |
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if (a1) {
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return 2; |
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} else {
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return 0; |
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} |
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} else {
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if (ar < a1 || ar < a2) {
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return 3; |
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} else {
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return 1; |
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} |
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} |
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} |
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static inline uint32_t cc_calc_sub_64(CPUS390XState *env, int64_t a1, |
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int64_t a2, int64_t ar) |
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{
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if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) { |
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return 3; /* overflow */ |
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} else {
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if (ar < 0) { |
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return 1; |
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} else if (ar > 0) { |
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return 2; |
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} else {
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return 0; |
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} |
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} |
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} |
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static inline uint32_t cc_calc_subu_64(CPUS390XState *env, uint64_t a1, |
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uint64_t a2, uint64_t ar) |
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{
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if (ar == 0) { |
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return 2; |
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} else {
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if (a2 > a1) {
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return 1; |
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} else {
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return 3; |
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} |
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} |
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} |
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static inline uint32_t cc_calc_abs_64(CPUS390XState *env, int64_t dst) |
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{
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if ((uint64_t)dst == 0x8000000000000000ULL) { |
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return 3; |
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} else if (dst) { |
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return 1; |
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} else {
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return 0; |
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} |
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} |
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static inline uint32_t cc_calc_nabs_64(CPUS390XState *env, int64_t dst) |
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{
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return !!dst;
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} |
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static inline uint32_t cc_calc_comp_64(CPUS390XState *env, int64_t dst) |
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{
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if ((uint64_t)dst == 0x8000000000000000ULL) { |
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return 3; |
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} else if (dst < 0) { |
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return 1; |
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} else if (dst > 0) { |
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return 2; |
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} else {
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return 0; |
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} |
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} |
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static inline uint32_t cc_calc_add_32(CPUS390XState *env, int32_t a1, |
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int32_t a2, int32_t ar) |
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{
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if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) { |
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return 3; /* overflow */ |
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} else {
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if (ar < 0) { |
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return 1; |
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} else if (ar > 0) { |
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return 2; |
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} else {
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return 0; |
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} |
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} |
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} |
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static inline uint32_t cc_calc_addu_32(CPUS390XState *env, uint32_t a1, |
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uint32_t a2, uint32_t ar) |
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{
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if (ar == 0) { |
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if (a1) {
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return 2; |
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} else {
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return 0; |
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} |
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} else {
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if (ar < a1 || ar < a2) {
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return 3; |
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} else {
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return 1; |
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} |
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} |
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} |
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static inline uint32_t cc_calc_sub_32(CPUS390XState *env, int32_t a1, |
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int32_t a2, int32_t ar) |
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{
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if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) { |
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return 3; /* overflow */ |
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} else {
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if (ar < 0) { |
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return 1; |
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} else if (ar > 0) { |
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return 2; |
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} else {
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return 0; |
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} |
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} |
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} |
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static inline uint32_t cc_calc_subu_32(CPUS390XState *env, uint32_t a1, |
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uint32_t a2, uint32_t ar) |
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{
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if (ar == 0) { |
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return 2; |
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} else {
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if (a2 > a1) {
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return 1; |
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} else {
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return 3; |
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} |
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} |
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} |
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static inline uint32_t cc_calc_abs_32(CPUS390XState *env, int32_t dst) |
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{
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if ((uint32_t)dst == 0x80000000UL) { |
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return 3; |
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} else if (dst) { |
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return 1; |
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} else {
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return 0; |
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} |
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} |
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static inline uint32_t cc_calc_nabs_32(CPUS390XState *env, int32_t dst) |
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{
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return !!dst;
|
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} |
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static inline uint32_t cc_calc_comp_32(CPUS390XState *env, int32_t dst) |
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{
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if ((uint32_t)dst == 0x80000000UL) { |
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return 3; |
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} else if (dst < 0) { |
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return 1; |
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} else if (dst > 0) { |
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return 2; |
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} else {
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return 0; |
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} |
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} |
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/* calculate condition code for insert character under mask insn */
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static inline uint32_t cc_calc_icm_32(CPUS390XState *env, uint32_t mask, |
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uint32_t val) |
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{
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uint32_t cc; |
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HELPER_LOG("%s: mask 0x%x val %d\n", __func__, mask, val);
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if (mask == 0xf) { |
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if (!val) {
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return 0; |
| 330 |
} else if (val & 0x80000000) { |
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return 1; |
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} else {
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return 2; |
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} |
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} |
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|
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if (!val || !mask) {
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cc = 0;
|
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} else {
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while (mask != 1) { |
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mask >>= 1;
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val >>= 8;
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} |
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if (val & 0x80) { |
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cc = 1;
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} else {
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cc = 2;
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} |
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} |
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return cc;
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} |
| 352 |
|
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static inline uint32_t cc_calc_slag(CPUS390XState *env, uint64_t src, |
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uint64_t shift) |
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{
|
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uint64_t mask = ((1ULL << shift) - 1ULL) << (64 - shift); |
| 357 |
uint64_t match, r; |
| 358 |
|
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/* check if the sign bit stays the same */
|
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if (src & (1ULL << 63)) { |
| 361 |
match = mask; |
| 362 |
} else {
|
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match = 0;
|
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} |
| 365 |
|
| 366 |
if ((src & mask) != match) {
|
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/* overflow */
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return 3; |
| 369 |
} |
| 370 |
|
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r = ((src << shift) & ((1ULL << 63) - 1)) | (src & (1ULL << 63)); |
| 372 |
|
| 373 |
if ((int64_t)r == 0) { |
| 374 |
return 0; |
| 375 |
} else if ((int64_t)r < 0) { |
| 376 |
return 1; |
| 377 |
} |
| 378 |
|
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return 2; |
| 380 |
} |
| 381 |
|
| 382 |
|
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static inline uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op, |
| 384 |
uint64_t src, uint64_t dst, uint64_t vr) |
| 385 |
{
|
| 386 |
uint32_t r = 0;
|
| 387 |
|
| 388 |
switch (cc_op) {
|
| 389 |
case CC_OP_CONST0:
|
| 390 |
case CC_OP_CONST1:
|
| 391 |
case CC_OP_CONST2:
|
| 392 |
case CC_OP_CONST3:
|
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/* cc_op value _is_ cc */
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r = cc_op; |
| 395 |
break;
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case CC_OP_LTGT0_32:
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r = cc_calc_ltgt0_32(env, dst); |
| 398 |
break;
|
| 399 |
case CC_OP_LTGT0_64:
|
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r = cc_calc_ltgt0_64(env, dst); |
| 401 |
break;
|
| 402 |
case CC_OP_LTGT_32:
|
| 403 |
r = cc_calc_ltgt_32(env, src, dst); |
| 404 |
break;
|
| 405 |
case CC_OP_LTGT_64:
|
| 406 |
r = cc_calc_ltgt_64(env, src, dst); |
| 407 |
break;
|
| 408 |
case CC_OP_LTUGTU_32:
|
| 409 |
r = cc_calc_ltugtu_32(env, src, dst); |
| 410 |
break;
|
| 411 |
case CC_OP_LTUGTU_64:
|
| 412 |
r = cc_calc_ltugtu_64(env, src, dst); |
| 413 |
break;
|
| 414 |
case CC_OP_TM_32:
|
| 415 |
r = cc_calc_tm_32(env, src, dst); |
| 416 |
break;
|
| 417 |
case CC_OP_TM_64:
|
| 418 |
r = cc_calc_tm_64(env, src, dst); |
| 419 |
break;
|
| 420 |
case CC_OP_NZ:
|
| 421 |
r = cc_calc_nz(env, dst); |
| 422 |
break;
|
| 423 |
case CC_OP_ADD_64:
|
| 424 |
r = cc_calc_add_64(env, src, dst, vr); |
| 425 |
break;
|
| 426 |
case CC_OP_ADDU_64:
|
| 427 |
r = cc_calc_addu_64(env, src, dst, vr); |
| 428 |
break;
|
| 429 |
case CC_OP_SUB_64:
|
| 430 |
r = cc_calc_sub_64(env, src, dst, vr); |
| 431 |
break;
|
| 432 |
case CC_OP_SUBU_64:
|
| 433 |
r = cc_calc_subu_64(env, src, dst, vr); |
| 434 |
break;
|
| 435 |
case CC_OP_ABS_64:
|
| 436 |
r = cc_calc_abs_64(env, dst); |
| 437 |
break;
|
| 438 |
case CC_OP_NABS_64:
|
| 439 |
r = cc_calc_nabs_64(env, dst); |
| 440 |
break;
|
| 441 |
case CC_OP_COMP_64:
|
| 442 |
r = cc_calc_comp_64(env, dst); |
| 443 |
break;
|
| 444 |
|
| 445 |
case CC_OP_ADD_32:
|
| 446 |
r = cc_calc_add_32(env, src, dst, vr); |
| 447 |
break;
|
| 448 |
case CC_OP_ADDU_32:
|
| 449 |
r = cc_calc_addu_32(env, src, dst, vr); |
| 450 |
break;
|
| 451 |
case CC_OP_SUB_32:
|
| 452 |
r = cc_calc_sub_32(env, src, dst, vr); |
| 453 |
break;
|
| 454 |
case CC_OP_SUBU_32:
|
| 455 |
r = cc_calc_subu_32(env, src, dst, vr); |
| 456 |
break;
|
| 457 |
case CC_OP_ABS_32:
|
| 458 |
r = cc_calc_abs_64(env, dst); |
| 459 |
break;
|
| 460 |
case CC_OP_NABS_32:
|
| 461 |
r = cc_calc_nabs_64(env, dst); |
| 462 |
break;
|
| 463 |
case CC_OP_COMP_32:
|
| 464 |
r = cc_calc_comp_32(env, dst); |
| 465 |
break;
|
| 466 |
|
| 467 |
case CC_OP_ICM:
|
| 468 |
r = cc_calc_icm_32(env, src, dst); |
| 469 |
break;
|
| 470 |
case CC_OP_SLAG:
|
| 471 |
r = cc_calc_slag(env, src, dst); |
| 472 |
break;
|
| 473 |
|
| 474 |
case CC_OP_LTGT_F32:
|
| 475 |
r = set_cc_f32(env, src, dst); |
| 476 |
break;
|
| 477 |
case CC_OP_LTGT_F64:
|
| 478 |
r = set_cc_f64(env, src, dst); |
| 479 |
break;
|
| 480 |
case CC_OP_NZ_F32:
|
| 481 |
r = set_cc_nz_f32(dst); |
| 482 |
break;
|
| 483 |
case CC_OP_NZ_F64:
|
| 484 |
r = set_cc_nz_f64(dst); |
| 485 |
break;
|
| 486 |
|
| 487 |
default:
|
| 488 |
cpu_abort(env, "Unknown CC operation: %s\n", cc_name(cc_op));
|
| 489 |
} |
| 490 |
|
| 491 |
HELPER_LOG("%s: %15s 0x%016lx 0x%016lx 0x%016lx = %d\n", __func__,
|
| 492 |
cc_name(cc_op), src, dst, vr, r); |
| 493 |
return r;
|
| 494 |
} |
| 495 |
|
| 496 |
uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, uint64_t src, uint64_t dst, |
| 497 |
uint64_t vr) |
| 498 |
{
|
| 499 |
return do_calc_cc(env, cc_op, src, dst, vr);
|
| 500 |
} |
| 501 |
|
| 502 |
uint32_t HELPER(calc_cc)(CPUS390XState *env, uint32_t cc_op, uint64_t src, |
| 503 |
uint64_t dst, uint64_t vr) |
| 504 |
{
|
| 505 |
return do_calc_cc(env, cc_op, src, dst, vr);
|
| 506 |
} |
| 507 |
|
| 508 |
/* insert psw mask and condition code into r1 */
|
| 509 |
void HELPER(ipm)(CPUS390XState *env, uint32_t cc, uint32_t r1)
|
| 510 |
{
|
| 511 |
uint64_t r = env->regs[r1]; |
| 512 |
|
| 513 |
r &= 0xffffffff00ffffffULL;
|
| 514 |
r |= (cc << 28) | ((env->psw.mask >> 40) & 0xf); |
| 515 |
env->regs[r1] = r; |
| 516 |
HELPER_LOG("%s: cc %d psw.mask 0x%lx r1 0x%lx\n", __func__,
|
| 517 |
cc, env->psw.mask, r); |
| 518 |
} |
| 519 |
|
| 520 |
#ifndef CONFIG_USER_ONLY
|
| 521 |
void HELPER(load_psw)(CPUS390XState *env, uint64_t mask, uint64_t addr)
|
| 522 |
{
|
| 523 |
load_psw(env, mask, addr); |
| 524 |
cpu_loop_exit(env); |
| 525 |
} |
| 526 |
|
| 527 |
void HELPER(sacf)(CPUS390XState *env, uint64_t a1)
|
| 528 |
{
|
| 529 |
HELPER_LOG("%s: %16" PRIx64 "\n", __func__, a1); |
| 530 |
|
| 531 |
switch (a1 & 0xf00) { |
| 532 |
case 0x000: |
| 533 |
env->psw.mask &= ~PSW_MASK_ASC; |
| 534 |
env->psw.mask |= PSW_ASC_PRIMARY; |
| 535 |
break;
|
| 536 |
case 0x100: |
| 537 |
env->psw.mask &= ~PSW_MASK_ASC; |
| 538 |
env->psw.mask |= PSW_ASC_SECONDARY; |
| 539 |
break;
|
| 540 |
case 0x300: |
| 541 |
env->psw.mask &= ~PSW_MASK_ASC; |
| 542 |
env->psw.mask |= PSW_ASC_HOME; |
| 543 |
break;
|
| 544 |
default:
|
| 545 |
qemu_log("unknown sacf mode: %" PRIx64 "\n", a1); |
| 546 |
program_interrupt(env, PGM_SPECIFICATION, 2);
|
| 547 |
break;
|
| 548 |
} |
| 549 |
} |
| 550 |
#endif
|