Revision 93a40ea9
b/cpu-exec.c | ||
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225 | 225 |
cpu_arm_dump_state(env, logfile, 0); |
226 | 226 |
env->cpsr &= ~0xf0000000; |
227 | 227 |
#elif defined(TARGET_SPARC) |
228 |
cpu_sparc_dump_state (env, logfile, 0);
|
|
228 |
cpu_sparc_dump_state (env, logfile, 0);
|
|
229 | 229 |
#else |
230 | 230 |
#error unsupported target CPU |
231 | 231 |
#endif |
... | ... | |
273 | 273 |
tb->tc_ptr = tc_ptr; |
274 | 274 |
tb->cs_base = (unsigned long)cs_base; |
275 | 275 |
tb->flags = flags; |
276 |
/* XXX: an MMU exception can occur here */ |
|
276 | 277 |
cpu_gen_code(env, tb, CODE_GEN_MAX_SIZE, &code_gen_size); |
277 | 278 |
*ptb = tb; |
278 | 279 |
tb->hash_next = NULL; |
... | ... | |
456 | 457 |
return 1; |
457 | 458 |
} |
458 | 459 |
/* see if it is an MMU fault */ |
459 |
ret = cpu_x86_handle_mmu_fault(env, address, is_write); |
|
460 |
ret = cpu_x86_handle_mmu_fault(env, address, is_write, |
|
461 |
((env->hflags & HF_CPL_MASK) == 3), 0); |
|
460 | 462 |
if (ret < 0) |
461 | 463 |
return 0; /* not an MMU fault */ |
462 | 464 |
if (ret == 0) |
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