Revision 941694d0 target-mips/translate.c
b/target-mips/translate.c | ||
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803 | 803 |
} |
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/* Addresses computation */ |
806 |
static inline void gen_op_addr_add (DisasContext *ctx, TCGv t0, TCGv t1)
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806 |
static inline void gen_op_addr_add (DisasContext *ctx, TCGv ret, TCGv arg0, TCGv arg1)
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807 | 807 |
{ |
808 |
tcg_gen_add_tl(t0, t0, t1);
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tcg_gen_add_tl(ret, arg0, arg1);
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809 | 809 |
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810 | 810 |
#if defined(TARGET_MIPS64) |
811 | 811 |
/* For compatibility with 32-bit code, data reference in user mode |
... | ... | |
813 | 813 |
See the MIPS64 PRA manual, section 4.10. */ |
814 | 814 |
if (((ctx->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_UM) && |
815 | 815 |
!(ctx->hflags & MIPS_HFLAG_UX)) { |
816 |
tcg_gen_ext32s_i64(t0, t0);
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tcg_gen_ext32s_i64(ret, ret);
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817 | 817 |
} |
818 | 818 |
#endif |
819 | 819 |
} |
... | ... | |
1005 | 1005 |
gen_load_gpr(t0, base); |
1006 | 1006 |
} else { |
1007 | 1007 |
tcg_gen_movi_tl(t0, offset); |
1008 |
gen_op_addr_add(ctx, t0, cpu_gpr[base]); |
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1008 |
gen_op_addr_add(ctx, t0, cpu_gpr[base], t0);
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1009 | 1009 |
} |
1010 | 1010 |
/* Don't do NOP if destination is zero: we must perform the actual |
1011 | 1011 |
memory access. */ |
... | ... | |
1163 | 1163 |
gen_load_gpr(t0, base); |
1164 | 1164 |
} else { |
1165 | 1165 |
tcg_gen_movi_tl(t0, offset); |
1166 |
gen_op_addr_add(ctx, t0, cpu_gpr[base]); |
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1166 |
gen_op_addr_add(ctx, t0, cpu_gpr[base], t0);
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1167 | 1167 |
} |
1168 | 1168 |
/* Don't do NOP if destination is zero: we must perform the actual |
1169 | 1169 |
memory access. */ |
... | ... | |
1202 | 1202 |
gen_load_gpr(t0, base); |
1203 | 1203 |
} else { |
1204 | 1204 |
tcg_gen_movi_tl(t0, offset); |
1205 |
gen_op_addr_add(ctx, t0, cpu_gpr[base]); |
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1205 |
gen_op_addr_add(ctx, t0, cpu_gpr[base], t0);
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1206 | 1206 |
} |
1207 | 1207 |
/* Don't do NOP if destination is zero: we must perform the actual |
1208 | 1208 |
memory access. */ |
... | ... | |
7264 | 7264 |
gen_load_gpr(t0, base); |
7265 | 7265 |
} else { |
7266 | 7266 |
gen_load_gpr(t0, index); |
7267 |
gen_op_addr_add(ctx, t0, cpu_gpr[base]); |
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7267 |
gen_op_addr_add(ctx, t0, cpu_gpr[base], t0);
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7268 | 7268 |
} |
7269 | 7269 |
/* Don't do NOP if destination is zero: we must perform the actual |
7270 | 7270 |
memory access. */ |
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