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1 | 689f936f | bellard | #ifndef _QEMU_ELF_H
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2 | 689f936f | bellard | #define _QEMU_ELF_H
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3 | 31e31b8a | bellard | |
4 | 31e31b8a | bellard | #include <inttypes.h> |
5 | 31e31b8a | bellard | |
6 | 88570520 | bellard | /* 32-bit ELF base types. */
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7 | 88570520 | bellard | typedef uint32_t Elf32_Addr;
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8 | 31e31b8a | bellard | typedef uint16_t Elf32_Half;
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9 | 31e31b8a | bellard | typedef uint32_t Elf32_Off;
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10 | 31e31b8a | bellard | typedef int32_t Elf32_Sword;
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11 | 31e31b8a | bellard | typedef uint32_t Elf32_Word;
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12 | 31e31b8a | bellard | |
13 | 88570520 | bellard | /* 64-bit ELF base types. */
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14 | 88570520 | bellard | typedef uint64_t Elf64_Addr;
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15 | 88570520 | bellard | typedef uint16_t Elf64_Half;
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16 | 88570520 | bellard | typedef int16_t Elf64_SHalf;
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17 | 88570520 | bellard | typedef uint64_t Elf64_Off;
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18 | 88570520 | bellard | typedef int32_t Elf64_Sword;
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19 | 88570520 | bellard | typedef uint32_t Elf64_Word;
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20 | 88570520 | bellard | typedef uint64_t Elf64_Xword;
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21 | 88570520 | bellard | typedef int64_t Elf64_Sxword;
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22 | 88570520 | bellard | |
23 | 31e31b8a | bellard | /* These constants are for the segment types stored in the image headers */
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24 | 31e31b8a | bellard | #define PT_NULL 0 |
25 | 31e31b8a | bellard | #define PT_LOAD 1 |
26 | 31e31b8a | bellard | #define PT_DYNAMIC 2 |
27 | 31e31b8a | bellard | #define PT_INTERP 3 |
28 | 31e31b8a | bellard | #define PT_NOTE 4 |
29 | 31e31b8a | bellard | #define PT_SHLIB 5 |
30 | 31e31b8a | bellard | #define PT_PHDR 6 |
31 | 31e31b8a | bellard | #define PT_LOPROC 0x70000000 |
32 | 31e31b8a | bellard | #define PT_HIPROC 0x7fffffff |
33 | 88570520 | bellard | #define PT_MIPS_REGINFO 0x70000000 |
34 | 6af0bf9c | bellard | #define PT_MIPS_OPTIONS 0x70000001 |
35 | 88570520 | bellard | |
36 | 88570520 | bellard | /* Flags in the e_flags field of the header */
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37 | 6af0bf9c | bellard | /* MIPS architecture level. */
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38 | 6af0bf9c | bellard | #define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */ |
39 | 6af0bf9c | bellard | #define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */ |
40 | 6af0bf9c | bellard | #define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */ |
41 | 6af0bf9c | bellard | #define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */ |
42 | 6af0bf9c | bellard | #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */ |
43 | 6af0bf9c | bellard | #define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */ |
44 | 6af0bf9c | bellard | #define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */ |
45 | 6af0bf9c | bellard | |
46 | 6af0bf9c | bellard | /* The ABI of a file. */
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47 | 6af0bf9c | bellard | #define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */ |
48 | 6af0bf9c | bellard | #define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */ |
49 | 6af0bf9c | bellard | |
50 | 88570520 | bellard | #define EF_MIPS_NOREORDER 0x00000001 |
51 | 88570520 | bellard | #define EF_MIPS_PIC 0x00000002 |
52 | 88570520 | bellard | #define EF_MIPS_CPIC 0x00000004 |
53 | 6af0bf9c | bellard | #define EF_MIPS_ABI2 0x00000020 |
54 | 6af0bf9c | bellard | #define EF_MIPS_OPTIONS_FIRST 0x00000080 |
55 | 6af0bf9c | bellard | #define EF_MIPS_32BITMODE 0x00000100 |
56 | 6af0bf9c | bellard | #define EF_MIPS_ABI 0x0000f000 |
57 | 88570520 | bellard | #define EF_MIPS_ARCH 0xf0000000 |
58 | 31e31b8a | bellard | |
59 | 31e31b8a | bellard | /* These constants define the different elf file types */
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60 | 31e31b8a | bellard | #define ET_NONE 0 |
61 | 31e31b8a | bellard | #define ET_REL 1 |
62 | 31e31b8a | bellard | #define ET_EXEC 2 |
63 | 31e31b8a | bellard | #define ET_DYN 3 |
64 | 31e31b8a | bellard | #define ET_CORE 4 |
65 | 88570520 | bellard | #define ET_LOPROC 0xff00 |
66 | 88570520 | bellard | #define ET_HIPROC 0xffff |
67 | 31e31b8a | bellard | |
68 | 31e31b8a | bellard | /* These constants define the various ELF target machines */
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69 | 31e31b8a | bellard | #define EM_NONE 0 |
70 | 31e31b8a | bellard | #define EM_M32 1 |
71 | 31e31b8a | bellard | #define EM_SPARC 2 |
72 | 31e31b8a | bellard | #define EM_386 3 |
73 | 31e31b8a | bellard | #define EM_68K 4 |
74 | 31e31b8a | bellard | #define EM_88K 5 |
75 | 31e31b8a | bellard | #define EM_486 6 /* Perhaps disused */ |
76 | 31e31b8a | bellard | #define EM_860 7 |
77 | 31e31b8a | bellard | |
78 | 31e31b8a | bellard | #define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */ |
79 | 31e31b8a | bellard | |
80 | 31e31b8a | bellard | #define EM_MIPS_RS4_BE 10 /* MIPS R4000 big-endian */ |
81 | 31e31b8a | bellard | |
82 | 31e31b8a | bellard | #define EM_PARISC 15 /* HPPA */ |
83 | 31e31b8a | bellard | |
84 | 31e31b8a | bellard | #define EM_SPARC32PLUS 18 /* Sun's "v8plus" */ |
85 | 31e31b8a | bellard | |
86 | 31e31b8a | bellard | #define EM_PPC 20 /* PowerPC */ |
87 | 88570520 | bellard | #define EM_PPC64 21 /* PowerPC64 */ |
88 | 88570520 | bellard | |
89 | 88570520 | bellard | #define EM_ARM 40 /* ARM */ |
90 | 88570520 | bellard | |
91 | 88570520 | bellard | #define EM_SH 42 /* SuperH */ |
92 | 88570520 | bellard | |
93 | 88570520 | bellard | #define EM_SPARCV9 43 /* SPARC v9 64-bit */ |
94 | 88570520 | bellard | |
95 | 88570520 | bellard | #define EM_IA_64 50 /* HP/Intel IA-64 */ |
96 | 88570520 | bellard | |
97 | 88570520 | bellard | #define EM_X86_64 62 /* AMD x86-64 */ |
98 | 88570520 | bellard | |
99 | 88570520 | bellard | #define EM_S390 22 /* IBM S/390 */ |
100 | 88570520 | bellard | |
101 | 88570520 | bellard | #define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */ |
102 | 88570520 | bellard | |
103 | 88570520 | bellard | #define EM_V850 87 /* NEC v850 */ |
104 | 88570520 | bellard | |
105 | 88570520 | bellard | #define EM_H8_300H 47 /* Hitachi H8/300H */ |
106 | 88570520 | bellard | #define EM_H8S 48 /* Hitachi H8S */ |
107 | 31e31b8a | bellard | |
108 | 31e31b8a | bellard | /*
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109 | 31e31b8a | bellard | * This is an interim value that we will use until the committee comes
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110 | 31e31b8a | bellard | * up with a final number.
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111 | 31e31b8a | bellard | */
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112 | 31e31b8a | bellard | #define EM_ALPHA 0x9026 |
113 | 31e31b8a | bellard | |
114 | 88570520 | bellard | /* Bogus old v850 magic number, used by old tools. */
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115 | 88570520 | bellard | #define EM_CYGNUS_V850 0x9080 |
116 | 88570520 | bellard | |
117 | 88570520 | bellard | /*
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118 | 88570520 | bellard | * This is the old interim value for S/390 architecture
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119 | 88570520 | bellard | */
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120 | 88570520 | bellard | #define EM_S390_OLD 0xA390 |
121 | 31e31b8a | bellard | |
122 | 31e31b8a | bellard | /* This is the info that is needed to parse the dynamic section of the file */
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123 | 31e31b8a | bellard | #define DT_NULL 0 |
124 | 31e31b8a | bellard | #define DT_NEEDED 1 |
125 | 31e31b8a | bellard | #define DT_PLTRELSZ 2 |
126 | 31e31b8a | bellard | #define DT_PLTGOT 3 |
127 | 31e31b8a | bellard | #define DT_HASH 4 |
128 | 31e31b8a | bellard | #define DT_STRTAB 5 |
129 | 31e31b8a | bellard | #define DT_SYMTAB 6 |
130 | 31e31b8a | bellard | #define DT_RELA 7 |
131 | 31e31b8a | bellard | #define DT_RELASZ 8 |
132 | 31e31b8a | bellard | #define DT_RELAENT 9 |
133 | 31e31b8a | bellard | #define DT_STRSZ 10 |
134 | 31e31b8a | bellard | #define DT_SYMENT 11 |
135 | 31e31b8a | bellard | #define DT_INIT 12 |
136 | 31e31b8a | bellard | #define DT_FINI 13 |
137 | 31e31b8a | bellard | #define DT_SONAME 14 |
138 | 31e31b8a | bellard | #define DT_RPATH 15 |
139 | 31e31b8a | bellard | #define DT_SYMBOLIC 16 |
140 | 31e31b8a | bellard | #define DT_REL 17 |
141 | 31e31b8a | bellard | #define DT_RELSZ 18 |
142 | 31e31b8a | bellard | #define DT_RELENT 19 |
143 | 31e31b8a | bellard | #define DT_PLTREL 20 |
144 | 31e31b8a | bellard | #define DT_DEBUG 21 |
145 | 31e31b8a | bellard | #define DT_TEXTREL 22 |
146 | 31e31b8a | bellard | #define DT_JMPREL 23 |
147 | 31e31b8a | bellard | #define DT_LOPROC 0x70000000 |
148 | 31e31b8a | bellard | #define DT_HIPROC 0x7fffffff |
149 | 88570520 | bellard | #define DT_MIPS_RLD_VERSION 0x70000001 |
150 | 88570520 | bellard | #define DT_MIPS_TIME_STAMP 0x70000002 |
151 | 88570520 | bellard | #define DT_MIPS_ICHECKSUM 0x70000003 |
152 | 88570520 | bellard | #define DT_MIPS_IVERSION 0x70000004 |
153 | 88570520 | bellard | #define DT_MIPS_FLAGS 0x70000005 |
154 | 88570520 | bellard | #define RHF_NONE 0 |
155 | 88570520 | bellard | #define RHF_HARDWAY 1 |
156 | 88570520 | bellard | #define RHF_NOTPOT 2 |
157 | 88570520 | bellard | #define DT_MIPS_BASE_ADDRESS 0x70000006 |
158 | 88570520 | bellard | #define DT_MIPS_CONFLICT 0x70000008 |
159 | 88570520 | bellard | #define DT_MIPS_LIBLIST 0x70000009 |
160 | 88570520 | bellard | #define DT_MIPS_LOCAL_GOTNO 0x7000000a |
161 | 88570520 | bellard | #define DT_MIPS_CONFLICTNO 0x7000000b |
162 | 88570520 | bellard | #define DT_MIPS_LIBLISTNO 0x70000010 |
163 | 88570520 | bellard | #define DT_MIPS_SYMTABNO 0x70000011 |
164 | 88570520 | bellard | #define DT_MIPS_UNREFEXTNO 0x70000012 |
165 | 88570520 | bellard | #define DT_MIPS_GOTSYM 0x70000013 |
166 | 88570520 | bellard | #define DT_MIPS_HIPAGENO 0x70000014 |
167 | 88570520 | bellard | #define DT_MIPS_RLD_MAP 0x70000016 |
168 | 31e31b8a | bellard | |
169 | 31e31b8a | bellard | /* This info is needed when parsing the symbol table */
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170 | 31e31b8a | bellard | #define STB_LOCAL 0 |
171 | 31e31b8a | bellard | #define STB_GLOBAL 1 |
172 | 31e31b8a | bellard | #define STB_WEAK 2 |
173 | 31e31b8a | bellard | |
174 | 31e31b8a | bellard | #define STT_NOTYPE 0 |
175 | 31e31b8a | bellard | #define STT_OBJECT 1 |
176 | 31e31b8a | bellard | #define STT_FUNC 2 |
177 | 31e31b8a | bellard | #define STT_SECTION 3 |
178 | 31e31b8a | bellard | #define STT_FILE 4 |
179 | 31e31b8a | bellard | |
180 | 88570520 | bellard | #define ELF_ST_BIND(x) ((x) >> 4) |
181 | 88570520 | bellard | #define ELF_ST_TYPE(x) (((unsigned int) x) & 0xf) |
182 | 88570520 | bellard | #define ELF32_ST_BIND(x) ELF_ST_BIND(x)
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183 | 88570520 | bellard | #define ELF32_ST_TYPE(x) ELF_ST_TYPE(x)
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184 | 88570520 | bellard | #define ELF64_ST_BIND(x) ELF_ST_BIND(x)
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185 | 88570520 | bellard | #define ELF64_ST_TYPE(x) ELF_ST_TYPE(x)
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186 | 31e31b8a | bellard | |
187 | 31e31b8a | bellard | /* Symbolic values for the entries in the auxiliary table
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188 | 31e31b8a | bellard | put on the initial stack */
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189 | 31e31b8a | bellard | #define AT_NULL 0 /* end of vector */ |
190 | 31e31b8a | bellard | #define AT_IGNORE 1 /* entry should be ignored */ |
191 | 31e31b8a | bellard | #define AT_EXECFD 2 /* file descriptor of program */ |
192 | 31e31b8a | bellard | #define AT_PHDR 3 /* program headers for program */ |
193 | 31e31b8a | bellard | #define AT_PHENT 4 /* size of program header entry */ |
194 | 31e31b8a | bellard | #define AT_PHNUM 5 /* number of program headers */ |
195 | 31e31b8a | bellard | #define AT_PAGESZ 6 /* system page size */ |
196 | 31e31b8a | bellard | #define AT_BASE 7 /* base address of interpreter */ |
197 | 31e31b8a | bellard | #define AT_FLAGS 8 /* flags */ |
198 | 31e31b8a | bellard | #define AT_ENTRY 9 /* entry point of program */ |
199 | 31e31b8a | bellard | #define AT_NOTELF 10 /* program is not ELF */ |
200 | 31e31b8a | bellard | #define AT_UID 11 /* real uid */ |
201 | 31e31b8a | bellard | #define AT_EUID 12 /* effective uid */ |
202 | 31e31b8a | bellard | #define AT_GID 13 /* real gid */ |
203 | 31e31b8a | bellard | #define AT_EGID 14 /* effective gid */ |
204 | 88570520 | bellard | #define AT_PLATFORM 15 /* string identifying CPU for optimizations */ |
205 | 88570520 | bellard | #define AT_HWCAP 16 /* arch dependent hints at CPU capabilities */ |
206 | 88570520 | bellard | #define AT_CLKTCK 17 /* frequency at which times() increments */ |
207 | 31e31b8a | bellard | |
208 | 31e31b8a | bellard | typedef struct dynamic{ |
209 | 31e31b8a | bellard | Elf32_Sword d_tag; |
210 | 31e31b8a | bellard | union{
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211 | 31e31b8a | bellard | Elf32_Sword d_val; |
212 | 31e31b8a | bellard | Elf32_Addr d_ptr; |
213 | 31e31b8a | bellard | } d_un; |
214 | 31e31b8a | bellard | } Elf32_Dyn; |
215 | 31e31b8a | bellard | |
216 | 31e31b8a | bellard | typedef struct { |
217 | 88570520 | bellard | Elf64_Sxword d_tag; /* entry tag value */
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218 | 31e31b8a | bellard | union {
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219 | 88570520 | bellard | Elf64_Xword d_val; |
220 | 88570520 | bellard | Elf64_Addr d_ptr; |
221 | 31e31b8a | bellard | } d_un; |
222 | 31e31b8a | bellard | } Elf64_Dyn; |
223 | 31e31b8a | bellard | |
224 | 31e31b8a | bellard | /* The following are used with relocations */
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225 | 31e31b8a | bellard | #define ELF32_R_SYM(x) ((x) >> 8) |
226 | 31e31b8a | bellard | #define ELF32_R_TYPE(x) ((x) & 0xff) |
227 | 31e31b8a | bellard | |
228 | 88570520 | bellard | #define ELF64_R_SYM(i) ((i) >> 32) |
229 | 88570520 | bellard | #define ELF64_R_TYPE(i) ((i) & 0xffffffff) |
230 | 88570520 | bellard | |
231 | 31e31b8a | bellard | #define R_386_NONE 0 |
232 | 31e31b8a | bellard | #define R_386_32 1 |
233 | 31e31b8a | bellard | #define R_386_PC32 2 |
234 | 31e31b8a | bellard | #define R_386_GOT32 3 |
235 | 31e31b8a | bellard | #define R_386_PLT32 4 |
236 | 31e31b8a | bellard | #define R_386_COPY 5 |
237 | 31e31b8a | bellard | #define R_386_GLOB_DAT 6 |
238 | 31e31b8a | bellard | #define R_386_JMP_SLOT 7 |
239 | 31e31b8a | bellard | #define R_386_RELATIVE 8 |
240 | 31e31b8a | bellard | #define R_386_GOTOFF 9 |
241 | 31e31b8a | bellard | #define R_386_GOTPC 10 |
242 | 31e31b8a | bellard | #define R_386_NUM 11 |
243 | 31e31b8a | bellard | |
244 | 88570520 | bellard | #define R_MIPS_NONE 0 |
245 | 88570520 | bellard | #define R_MIPS_16 1 |
246 | 88570520 | bellard | #define R_MIPS_32 2 |
247 | 88570520 | bellard | #define R_MIPS_REL32 3 |
248 | 88570520 | bellard | #define R_MIPS_26 4 |
249 | 88570520 | bellard | #define R_MIPS_HI16 5 |
250 | 88570520 | bellard | #define R_MIPS_LO16 6 |
251 | 88570520 | bellard | #define R_MIPS_GPREL16 7 |
252 | 88570520 | bellard | #define R_MIPS_LITERAL 8 |
253 | 88570520 | bellard | #define R_MIPS_GOT16 9 |
254 | 88570520 | bellard | #define R_MIPS_PC16 10 |
255 | 88570520 | bellard | #define R_MIPS_CALL16 11 |
256 | 88570520 | bellard | #define R_MIPS_GPREL32 12 |
257 | 88570520 | bellard | /* The remaining relocs are defined on Irix, although they are not
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258 | 88570520 | bellard | in the MIPS ELF ABI. */
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259 | 88570520 | bellard | #define R_MIPS_UNUSED1 13 |
260 | 88570520 | bellard | #define R_MIPS_UNUSED2 14 |
261 | 88570520 | bellard | #define R_MIPS_UNUSED3 15 |
262 | 88570520 | bellard | #define R_MIPS_SHIFT5 16 |
263 | 88570520 | bellard | #define R_MIPS_SHIFT6 17 |
264 | 88570520 | bellard | #define R_MIPS_64 18 |
265 | 88570520 | bellard | #define R_MIPS_GOT_DISP 19 |
266 | 88570520 | bellard | #define R_MIPS_GOT_PAGE 20 |
267 | 88570520 | bellard | #define R_MIPS_GOT_OFST 21 |
268 | 88570520 | bellard | /*
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269 | 88570520 | bellard | * The following two relocation types are specified in the MIPS ABI
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270 | 88570520 | bellard | * conformance guide version 1.2 but not yet in the psABI.
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271 | 88570520 | bellard | */
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272 | 88570520 | bellard | #define R_MIPS_GOTHI16 22 |
273 | 88570520 | bellard | #define R_MIPS_GOTLO16 23 |
274 | 88570520 | bellard | #define R_MIPS_SUB 24 |
275 | 88570520 | bellard | #define R_MIPS_INSERT_A 25 |
276 | 88570520 | bellard | #define R_MIPS_INSERT_B 26 |
277 | 88570520 | bellard | #define R_MIPS_DELETE 27 |
278 | 88570520 | bellard | #define R_MIPS_HIGHER 28 |
279 | 88570520 | bellard | #define R_MIPS_HIGHEST 29 |
280 | 88570520 | bellard | /*
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281 | 88570520 | bellard | * The following two relocation types are specified in the MIPS ABI
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282 | 88570520 | bellard | * conformance guide version 1.2 but not yet in the psABI.
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283 | 88570520 | bellard | */
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284 | 88570520 | bellard | #define R_MIPS_CALLHI16 30 |
285 | 88570520 | bellard | #define R_MIPS_CALLLO16 31 |
286 | 88570520 | bellard | /*
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287 | 88570520 | bellard | * This range is reserved for vendor specific relocations.
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288 | 88570520 | bellard | */
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289 | 88570520 | bellard | #define R_MIPS_LOVENDOR 100 |
290 | 88570520 | bellard | #define R_MIPS_HIVENDOR 127 |
291 | 88570520 | bellard | |
292 | 88570520 | bellard | |
293 | 88570520 | bellard | /*
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294 | 88570520 | bellard | * Sparc ELF relocation types
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295 | 88570520 | bellard | */
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296 | 88570520 | bellard | #define R_SPARC_NONE 0 |
297 | 88570520 | bellard | #define R_SPARC_8 1 |
298 | 88570520 | bellard | #define R_SPARC_16 2 |
299 | 88570520 | bellard | #define R_SPARC_32 3 |
300 | 88570520 | bellard | #define R_SPARC_DISP8 4 |
301 | 88570520 | bellard | #define R_SPARC_DISP16 5 |
302 | 88570520 | bellard | #define R_SPARC_DISP32 6 |
303 | 88570520 | bellard | #define R_SPARC_WDISP30 7 |
304 | 88570520 | bellard | #define R_SPARC_WDISP22 8 |
305 | 88570520 | bellard | #define R_SPARC_HI22 9 |
306 | 88570520 | bellard | #define R_SPARC_22 10 |
307 | 88570520 | bellard | #define R_SPARC_13 11 |
308 | 88570520 | bellard | #define R_SPARC_LO10 12 |
309 | 88570520 | bellard | #define R_SPARC_GOT10 13 |
310 | 88570520 | bellard | #define R_SPARC_GOT13 14 |
311 | 88570520 | bellard | #define R_SPARC_GOT22 15 |
312 | 88570520 | bellard | #define R_SPARC_PC10 16 |
313 | 88570520 | bellard | #define R_SPARC_PC22 17 |
314 | 88570520 | bellard | #define R_SPARC_WPLT30 18 |
315 | 88570520 | bellard | #define R_SPARC_COPY 19 |
316 | 88570520 | bellard | #define R_SPARC_GLOB_DAT 20 |
317 | 88570520 | bellard | #define R_SPARC_JMP_SLOT 21 |
318 | 88570520 | bellard | #define R_SPARC_RELATIVE 22 |
319 | 88570520 | bellard | #define R_SPARC_UA32 23 |
320 | 88570520 | bellard | #define R_SPARC_PLT32 24 |
321 | 88570520 | bellard | #define R_SPARC_HIPLT22 25 |
322 | 88570520 | bellard | #define R_SPARC_LOPLT10 26 |
323 | 88570520 | bellard | #define R_SPARC_PCPLT32 27 |
324 | 88570520 | bellard | #define R_SPARC_PCPLT22 28 |
325 | 88570520 | bellard | #define R_SPARC_PCPLT10 29 |
326 | 88570520 | bellard | #define R_SPARC_10 30 |
327 | 88570520 | bellard | #define R_SPARC_11 31 |
328 | 88570520 | bellard | #define R_SPARC_64 32 |
329 | 88570520 | bellard | #define R_SPARC_WDISP16 40 |
330 | 88570520 | bellard | #define R_SPARC_WDISP19 41 |
331 | 88570520 | bellard | #define R_SPARC_7 43 |
332 | 88570520 | bellard | #define R_SPARC_5 44 |
333 | 88570520 | bellard | #define R_SPARC_6 45 |
334 | 88570520 | bellard | |
335 | 88570520 | bellard | /* Bits present in AT_HWCAP, primarily for Sparc32. */
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336 | 88570520 | bellard | |
337 | 88570520 | bellard | #define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ |
338 | 88570520 | bellard | #define HWCAP_SPARC_STBAR 2 |
339 | 88570520 | bellard | #define HWCAP_SPARC_SWAP 4 |
340 | 88570520 | bellard | #define HWCAP_SPARC_MULDIV 8 |
341 | 88570520 | bellard | #define HWCAP_SPARC_V9 16 |
342 | 88570520 | bellard | #define HWCAP_SPARC_ULTRA3 32 |
343 | 88570520 | bellard | |
344 | 88570520 | bellard | /*
|
345 | 88570520 | bellard | * 68k ELF relocation types
|
346 | 88570520 | bellard | */
|
347 | 88570520 | bellard | #define R_68K_NONE 0 |
348 | 88570520 | bellard | #define R_68K_32 1 |
349 | 88570520 | bellard | #define R_68K_16 2 |
350 | 88570520 | bellard | #define R_68K_8 3 |
351 | 88570520 | bellard | #define R_68K_PC32 4 |
352 | 88570520 | bellard | #define R_68K_PC16 5 |
353 | 88570520 | bellard | #define R_68K_PC8 6 |
354 | 88570520 | bellard | #define R_68K_GOT32 7 |
355 | 88570520 | bellard | #define R_68K_GOT16 8 |
356 | 88570520 | bellard | #define R_68K_GOT8 9 |
357 | 88570520 | bellard | #define R_68K_GOT32O 10 |
358 | 88570520 | bellard | #define R_68K_GOT16O 11 |
359 | 88570520 | bellard | #define R_68K_GOT8O 12 |
360 | 88570520 | bellard | #define R_68K_PLT32 13 |
361 | 88570520 | bellard | #define R_68K_PLT16 14 |
362 | 88570520 | bellard | #define R_68K_PLT8 15 |
363 | 88570520 | bellard | #define R_68K_PLT32O 16 |
364 | 88570520 | bellard | #define R_68K_PLT16O 17 |
365 | 88570520 | bellard | #define R_68K_PLT8O 18 |
366 | 88570520 | bellard | #define R_68K_COPY 19 |
367 | 88570520 | bellard | #define R_68K_GLOB_DAT 20 |
368 | 88570520 | bellard | #define R_68K_JMP_SLOT 21 |
369 | 88570520 | bellard | #define R_68K_RELATIVE 22 |
370 | 88570520 | bellard | |
371 | 88570520 | bellard | /*
|
372 | 88570520 | bellard | * Alpha ELF relocation types
|
373 | 88570520 | bellard | */
|
374 | 88570520 | bellard | #define R_ALPHA_NONE 0 /* No reloc */ |
375 | 88570520 | bellard | #define R_ALPHA_REFLONG 1 /* Direct 32 bit */ |
376 | 88570520 | bellard | #define R_ALPHA_REFQUAD 2 /* Direct 64 bit */ |
377 | 88570520 | bellard | #define R_ALPHA_GPREL32 3 /* GP relative 32 bit */ |
378 | 88570520 | bellard | #define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */ |
379 | 88570520 | bellard | #define R_ALPHA_LITUSE 5 /* Optimization hint for LITERAL */ |
380 | 88570520 | bellard | #define R_ALPHA_GPDISP 6 /* Add displacement to GP */ |
381 | 88570520 | bellard | #define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */ |
382 | 88570520 | bellard | #define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */ |
383 | 88570520 | bellard | #define R_ALPHA_SREL16 9 /* PC relative 16 bit */ |
384 | 88570520 | bellard | #define R_ALPHA_SREL32 10 /* PC relative 32 bit */ |
385 | 88570520 | bellard | #define R_ALPHA_SREL64 11 /* PC relative 64 bit */ |
386 | 88570520 | bellard | #define R_ALPHA_GPRELHIGH 17 /* GP relative 32 bit, high 16 bits */ |
387 | 88570520 | bellard | #define R_ALPHA_GPRELLOW 18 /* GP relative 32 bit, low 16 bits */ |
388 | 88570520 | bellard | #define R_ALPHA_GPREL16 19 /* GP relative 16 bit */ |
389 | 88570520 | bellard | #define R_ALPHA_COPY 24 /* Copy symbol at runtime */ |
390 | 88570520 | bellard | #define R_ALPHA_GLOB_DAT 25 /* Create GOT entry */ |
391 | 88570520 | bellard | #define R_ALPHA_JMP_SLOT 26 /* Create PLT entry */ |
392 | 88570520 | bellard | #define R_ALPHA_RELATIVE 27 /* Adjust by program base */ |
393 | 88570520 | bellard | #define R_ALPHA_BRSGP 28 |
394 | 88570520 | bellard | #define R_ALPHA_TLSGD 29 |
395 | 88570520 | bellard | #define R_ALPHA_TLS_LDM 30 |
396 | 88570520 | bellard | #define R_ALPHA_DTPMOD64 31 |
397 | 88570520 | bellard | #define R_ALPHA_GOTDTPREL 32 |
398 | 88570520 | bellard | #define R_ALPHA_DTPREL64 33 |
399 | 88570520 | bellard | #define R_ALPHA_DTPRELHI 34 |
400 | 88570520 | bellard | #define R_ALPHA_DTPRELLO 35 |
401 | 88570520 | bellard | #define R_ALPHA_DTPREL16 36 |
402 | 88570520 | bellard | #define R_ALPHA_GOTTPREL 37 |
403 | 88570520 | bellard | #define R_ALPHA_TPREL64 38 |
404 | 88570520 | bellard | #define R_ALPHA_TPRELHI 39 |
405 | 88570520 | bellard | #define R_ALPHA_TPRELLO 40 |
406 | 88570520 | bellard | #define R_ALPHA_TPREL16 41 |
407 | 88570520 | bellard | |
408 | 88570520 | bellard | #define SHF_ALPHA_GPREL 0x10000000 |
409 | 88570520 | bellard | |
410 | 88570520 | bellard | |
411 | 88570520 | bellard | /* PowerPC relocations defined by the ABIs */
|
412 | 88570520 | bellard | #define R_PPC_NONE 0 |
413 | 88570520 | bellard | #define R_PPC_ADDR32 1 /* 32bit absolute address */ |
414 | 88570520 | bellard | #define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */ |
415 | 88570520 | bellard | #define R_PPC_ADDR16 3 /* 16bit absolute address */ |
416 | 88570520 | bellard | #define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */ |
417 | 88570520 | bellard | #define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */ |
418 | 88570520 | bellard | #define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */ |
419 | 88570520 | bellard | #define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */ |
420 | 88570520 | bellard | #define R_PPC_ADDR14_BRTAKEN 8 |
421 | 88570520 | bellard | #define R_PPC_ADDR14_BRNTAKEN 9 |
422 | 88570520 | bellard | #define R_PPC_REL24 10 /* PC relative 26 bit */ |
423 | 88570520 | bellard | #define R_PPC_REL14 11 /* PC relative 16 bit */ |
424 | 88570520 | bellard | #define R_PPC_REL14_BRTAKEN 12 |
425 | 88570520 | bellard | #define R_PPC_REL14_BRNTAKEN 13 |
426 | 88570520 | bellard | #define R_PPC_GOT16 14 |
427 | 88570520 | bellard | #define R_PPC_GOT16_LO 15 |
428 | 88570520 | bellard | #define R_PPC_GOT16_HI 16 |
429 | 88570520 | bellard | #define R_PPC_GOT16_HA 17 |
430 | 88570520 | bellard | #define R_PPC_PLTREL24 18 |
431 | 88570520 | bellard | #define R_PPC_COPY 19 |
432 | 88570520 | bellard | #define R_PPC_GLOB_DAT 20 |
433 | 88570520 | bellard | #define R_PPC_JMP_SLOT 21 |
434 | 88570520 | bellard | #define R_PPC_RELATIVE 22 |
435 | 88570520 | bellard | #define R_PPC_LOCAL24PC 23 |
436 | 88570520 | bellard | #define R_PPC_UADDR32 24 |
437 | 88570520 | bellard | #define R_PPC_UADDR16 25 |
438 | 88570520 | bellard | #define R_PPC_REL32 26 |
439 | 88570520 | bellard | #define R_PPC_PLT32 27 |
440 | 88570520 | bellard | #define R_PPC_PLTREL32 28 |
441 | 88570520 | bellard | #define R_PPC_PLT16_LO 29 |
442 | 88570520 | bellard | #define R_PPC_PLT16_HI 30 |
443 | 88570520 | bellard | #define R_PPC_PLT16_HA 31 |
444 | 88570520 | bellard | #define R_PPC_SDAREL16 32 |
445 | 88570520 | bellard | #define R_PPC_SECTOFF 33 |
446 | 88570520 | bellard | #define R_PPC_SECTOFF_LO 34 |
447 | 88570520 | bellard | #define R_PPC_SECTOFF_HI 35 |
448 | 88570520 | bellard | #define R_PPC_SECTOFF_HA 36 |
449 | 88570520 | bellard | /* Keep this the last entry. */
|
450 | 88570520 | bellard | #define R_PPC_NUM 37 |
451 | 88570520 | bellard | |
452 | 88570520 | bellard | /* ARM specific declarations */
|
453 | 88570520 | bellard | |
454 | 88570520 | bellard | /* Processor specific flags for the ELF header e_flags field. */
|
455 | 88570520 | bellard | #define EF_ARM_RELEXEC 0x01 |
456 | 88570520 | bellard | #define EF_ARM_HASENTRY 0x02 |
457 | 88570520 | bellard | #define EF_ARM_INTERWORK 0x04 |
458 | 88570520 | bellard | #define EF_ARM_APCS_26 0x08 |
459 | 88570520 | bellard | #define EF_ARM_APCS_FLOAT 0x10 |
460 | 88570520 | bellard | #define EF_ARM_PIC 0x20 |
461 | 88570520 | bellard | #define EF_ALIGN8 0x40 /* 8-bit structure alignment is in use */ |
462 | 88570520 | bellard | #define EF_NEW_ABI 0x80 |
463 | 88570520 | bellard | #define EF_OLD_ABI 0x100 |
464 | 88570520 | bellard | |
465 | 88570520 | bellard | /* Additional symbol types for Thumb */
|
466 | 88570520 | bellard | #define STT_ARM_TFUNC 0xd |
467 | 88570520 | bellard | |
468 | 88570520 | bellard | /* ARM-specific values for sh_flags */
|
469 | 88570520 | bellard | #define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */ |
470 | 88570520 | bellard | #define SHF_ARM_COMDEF 0x80000000 /* Section may be multiply defined |
471 | 88570520 | bellard | in the input to a link step */
|
472 | 88570520 | bellard | |
473 | 88570520 | bellard | /* ARM-specific program header flags */
|
474 | 88570520 | bellard | #define PF_ARM_SB 0x10000000 /* Segment contains the location |
475 | 88570520 | bellard | addressed by the static base */
|
476 | 88570520 | bellard | |
477 | 88570520 | bellard | /* ARM relocs. */
|
478 | 88570520 | bellard | #define R_ARM_NONE 0 /* No reloc */ |
479 | 88570520 | bellard | #define R_ARM_PC24 1 /* PC relative 26 bit branch */ |
480 | 88570520 | bellard | #define R_ARM_ABS32 2 /* Direct 32 bit */ |
481 | 88570520 | bellard | #define R_ARM_REL32 3 /* PC relative 32 bit */ |
482 | 88570520 | bellard | #define R_ARM_PC13 4 |
483 | 88570520 | bellard | #define R_ARM_ABS16 5 /* Direct 16 bit */ |
484 | 88570520 | bellard | #define R_ARM_ABS12 6 /* Direct 12 bit */ |
485 | 88570520 | bellard | #define R_ARM_THM_ABS5 7 |
486 | 88570520 | bellard | #define R_ARM_ABS8 8 /* Direct 8 bit */ |
487 | 88570520 | bellard | #define R_ARM_SBREL32 9 |
488 | 88570520 | bellard | #define R_ARM_THM_PC22 10 |
489 | 88570520 | bellard | #define R_ARM_THM_PC8 11 |
490 | 88570520 | bellard | #define R_ARM_AMP_VCALL9 12 |
491 | 88570520 | bellard | #define R_ARM_SWI24 13 |
492 | 88570520 | bellard | #define R_ARM_THM_SWI8 14 |
493 | 88570520 | bellard | #define R_ARM_XPC25 15 |
494 | 88570520 | bellard | #define R_ARM_THM_XPC22 16 |
495 | 88570520 | bellard | #define R_ARM_COPY 20 /* Copy symbol at runtime */ |
496 | 88570520 | bellard | #define R_ARM_GLOB_DAT 21 /* Create GOT entry */ |
497 | 88570520 | bellard | #define R_ARM_JUMP_SLOT 22 /* Create PLT entry */ |
498 | 88570520 | bellard | #define R_ARM_RELATIVE 23 /* Adjust by program base */ |
499 | 88570520 | bellard | #define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */ |
500 | 88570520 | bellard | #define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */ |
501 | 88570520 | bellard | #define R_ARM_GOT32 26 /* 32 bit GOT entry */ |
502 | 88570520 | bellard | #define R_ARM_PLT32 27 /* 32 bit PLT address */ |
503 | 88570520 | bellard | #define R_ARM_GNU_VTENTRY 100 |
504 | 88570520 | bellard | #define R_ARM_GNU_VTINHERIT 101 |
505 | 88570520 | bellard | #define R_ARM_THM_PC11 102 /* thumb unconditional branch */ |
506 | 88570520 | bellard | #define R_ARM_THM_PC9 103 /* thumb conditional branch */ |
507 | 88570520 | bellard | #define R_ARM_RXPC25 249 |
508 | 88570520 | bellard | #define R_ARM_RSBREL32 250 |
509 | 88570520 | bellard | #define R_ARM_THM_RPC22 251 |
510 | 88570520 | bellard | #define R_ARM_RREL32 252 |
511 | 88570520 | bellard | #define R_ARM_RABS22 253 |
512 | 88570520 | bellard | #define R_ARM_RPC24 254 |
513 | 88570520 | bellard | #define R_ARM_RBASE 255 |
514 | 88570520 | bellard | /* Keep this the last entry. */
|
515 | 88570520 | bellard | #define R_ARM_NUM 256 |
516 | 88570520 | bellard | |
517 | 88570520 | bellard | /* s390 relocations defined by the ABIs */
|
518 | 88570520 | bellard | #define R_390_NONE 0 /* No reloc. */ |
519 | 88570520 | bellard | #define R_390_8 1 /* Direct 8 bit. */ |
520 | 88570520 | bellard | #define R_390_12 2 /* Direct 12 bit. */ |
521 | 88570520 | bellard | #define R_390_16 3 /* Direct 16 bit. */ |
522 | 88570520 | bellard | #define R_390_32 4 /* Direct 32 bit. */ |
523 | 88570520 | bellard | #define R_390_PC32 5 /* PC relative 32 bit. */ |
524 | 88570520 | bellard | #define R_390_GOT12 6 /* 12 bit GOT offset. */ |
525 | 88570520 | bellard | #define R_390_GOT32 7 /* 32 bit GOT offset. */ |
526 | 88570520 | bellard | #define R_390_PLT32 8 /* 32 bit PC relative PLT address. */ |
527 | 88570520 | bellard | #define R_390_COPY 9 /* Copy symbol at runtime. */ |
528 | 88570520 | bellard | #define R_390_GLOB_DAT 10 /* Create GOT entry. */ |
529 | 88570520 | bellard | #define R_390_JMP_SLOT 11 /* Create PLT entry. */ |
530 | 88570520 | bellard | #define R_390_RELATIVE 12 /* Adjust by program base. */ |
531 | 88570520 | bellard | #define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */ |
532 | 88570520 | bellard | #define R_390_GOTPC 14 /* 32 bit PC rel. offset to GOT. */ |
533 | 88570520 | bellard | #define R_390_GOT16 15 /* 16 bit GOT offset. */ |
534 | 88570520 | bellard | #define R_390_PC16 16 /* PC relative 16 bit. */ |
535 | 88570520 | bellard | #define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */ |
536 | 88570520 | bellard | #define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */ |
537 | 88570520 | bellard | #define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */ |
538 | 88570520 | bellard | #define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */ |
539 | 88570520 | bellard | #define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */ |
540 | 88570520 | bellard | #define R_390_64 22 /* Direct 64 bit. */ |
541 | 88570520 | bellard | #define R_390_PC64 23 /* PC relative 64 bit. */ |
542 | 88570520 | bellard | #define R_390_GOT64 24 /* 64 bit GOT offset. */ |
543 | 88570520 | bellard | #define R_390_PLT64 25 /* 64 bit PC relative PLT address. */ |
544 | 88570520 | bellard | #define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */ |
545 | 88570520 | bellard | #define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */ |
546 | 88570520 | bellard | #define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */ |
547 | 88570520 | bellard | #define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */ |
548 | 88570520 | bellard | #define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */ |
549 | 88570520 | bellard | #define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */ |
550 | 88570520 | bellard | #define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */ |
551 | 88570520 | bellard | #define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */ |
552 | 88570520 | bellard | #define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */ |
553 | 88570520 | bellard | #define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */ |
554 | 88570520 | bellard | #define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */ |
555 | 88570520 | bellard | #define R_390_TLS_LOAD 37 /* Tag for load insn in TLS code. */ |
556 | 88570520 | bellard | #define R_390_TLS_GDCALL 38 /* Tag for function call in general |
557 | 88570520 | bellard | dynamic TLS code. */
|
558 | 88570520 | bellard | #define R_390_TLS_LDCALL 39 /* Tag for function call in local |
559 | 88570520 | bellard | dynamic TLS code. */
|
560 | 88570520 | bellard | #define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic |
561 | 88570520 | bellard | thread local data. */
|
562 | 88570520 | bellard | #define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic |
563 | 88570520 | bellard | thread local data. */
|
564 | 88570520 | bellard | #define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS |
565 | 88570520 | bellard | block offset. */
|
566 | 88570520 | bellard | #define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS |
567 | 88570520 | bellard | block offset. */
|
568 | 88570520 | bellard | #define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS |
569 | 88570520 | bellard | block offset. */
|
570 | 88570520 | bellard | #define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic |
571 | 88570520 | bellard | thread local data in LD code. */
|
572 | 88570520 | bellard | #define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic |
573 | 88570520 | bellard | thread local data in LD code. */
|
574 | 88570520 | bellard | #define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for |
575 | 88570520 | bellard | negated static TLS block offset. */
|
576 | 88570520 | bellard | #define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for |
577 | 88570520 | bellard | negated static TLS block offset. */
|
578 | 88570520 | bellard | #define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for |
579 | 88570520 | bellard | negated static TLS block offset. */
|
580 | 88570520 | bellard | #define R_390_TLS_LE32 50 /* 32 bit negated offset relative to |
581 | 88570520 | bellard | static TLS block. */
|
582 | 88570520 | bellard | #define R_390_TLS_LE64 51 /* 64 bit negated offset relative to |
583 | 88570520 | bellard | static TLS block. */
|
584 | 88570520 | bellard | #define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS |
585 | 88570520 | bellard | block. */
|
586 | 88570520 | bellard | #define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS |
587 | 88570520 | bellard | block. */
|
588 | 88570520 | bellard | #define R_390_TLS_DTPMOD 54 /* ID of module containing symbol. */ |
589 | 88570520 | bellard | #define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */ |
590 | 88570520 | bellard | #define R_390_TLS_TPOFF 56 /* Negate offset in static TLS |
591 | 88570520 | bellard | block. */
|
592 | 88570520 | bellard | /* Keep this the last entry. */
|
593 | 88570520 | bellard | #define R_390_NUM 57 |
594 | 88570520 | bellard | |
595 | 88570520 | bellard | /* x86-64 relocation types */
|
596 | 88570520 | bellard | #define R_X86_64_NONE 0 /* No reloc */ |
597 | 88570520 | bellard | #define R_X86_64_64 1 /* Direct 64 bit */ |
598 | 88570520 | bellard | #define R_X86_64_PC32 2 /* PC relative 32 bit signed */ |
599 | 88570520 | bellard | #define R_X86_64_GOT32 3 /* 32 bit GOT entry */ |
600 | 88570520 | bellard | #define R_X86_64_PLT32 4 /* 32 bit PLT address */ |
601 | 88570520 | bellard | #define R_X86_64_COPY 5 /* Copy symbol at runtime */ |
602 | 88570520 | bellard | #define R_X86_64_GLOB_DAT 6 /* Create GOT entry */ |
603 | 88570520 | bellard | #define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */ |
604 | 88570520 | bellard | #define R_X86_64_RELATIVE 8 /* Adjust by program base */ |
605 | 88570520 | bellard | #define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative |
606 | 88570520 | bellard | offset to GOT */
|
607 | 88570520 | bellard | #define R_X86_64_32 10 /* Direct 32 bit zero extended */ |
608 | 88570520 | bellard | #define R_X86_64_32S 11 /* Direct 32 bit sign extended */ |
609 | 88570520 | bellard | #define R_X86_64_16 12 /* Direct 16 bit zero extended */ |
610 | 88570520 | bellard | #define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */ |
611 | 88570520 | bellard | #define R_X86_64_8 14 /* Direct 8 bit sign extended */ |
612 | 88570520 | bellard | #define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */ |
613 | 88570520 | bellard | |
614 | 88570520 | bellard | #define R_X86_64_NUM 16 |
615 | 88570520 | bellard | |
616 | 88570520 | bellard | /* Legal values for e_flags field of Elf64_Ehdr. */
|
617 | 88570520 | bellard | |
618 | 88570520 | bellard | #define EF_ALPHA_32BIT 1 /* All addresses are below 2GB */ |
619 | 88570520 | bellard | |
620 | 88570520 | bellard | /* HPPA specific definitions. */
|
621 | 88570520 | bellard | |
622 | 88570520 | bellard | /* Legal values for e_flags field of Elf32_Ehdr. */
|
623 | 88570520 | bellard | |
624 | 88570520 | bellard | #define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */ |
625 | 88570520 | bellard | #define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */ |
626 | 88570520 | bellard | #define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */ |
627 | 88570520 | bellard | #define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */ |
628 | 88570520 | bellard | #define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch |
629 | 88570520 | bellard | prediction. */
|
630 | 88570520 | bellard | #define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */ |
631 | 88570520 | bellard | #define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */ |
632 | 88570520 | bellard | |
633 | 88570520 | bellard | /* Defined values for `e_flags & EF_PARISC_ARCH' are: */
|
634 | 88570520 | bellard | |
635 | 88570520 | bellard | #define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */ |
636 | 88570520 | bellard | #define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */ |
637 | 88570520 | bellard | #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */ |
638 | 88570520 | bellard | |
639 | 88570520 | bellard | /* Additional section indeces. */
|
640 | 88570520 | bellard | |
641 | 88570520 | bellard | #define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared |
642 | 88570520 | bellard | symbols in ANSI C. */
|
643 | 88570520 | bellard | #define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */ |
644 | 88570520 | bellard | |
645 | 88570520 | bellard | /* Legal values for sh_type field of Elf32_Shdr. */
|
646 | 88570520 | bellard | |
647 | 88570520 | bellard | #define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */ |
648 | 88570520 | bellard | #define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */ |
649 | 88570520 | bellard | #define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */ |
650 | 88570520 | bellard | |
651 | 88570520 | bellard | /* Legal values for sh_flags field of Elf32_Shdr. */
|
652 | 88570520 | bellard | |
653 | 88570520 | bellard | #define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */ |
654 | 88570520 | bellard | #define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */ |
655 | 88570520 | bellard | #define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */ |
656 | 88570520 | bellard | |
657 | 88570520 | bellard | /* Legal values for ST_TYPE subfield of st_info (symbol type). */
|
658 | 88570520 | bellard | |
659 | 88570520 | bellard | #define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */ |
660 | 88570520 | bellard | |
661 | 88570520 | bellard | #define STT_HP_OPAQUE (STT_LOOS + 0x1) |
662 | 88570520 | bellard | #define STT_HP_STUB (STT_LOOS + 0x2) |
663 | 88570520 | bellard | |
664 | 88570520 | bellard | /* HPPA relocs. */
|
665 | 88570520 | bellard | |
666 | 88570520 | bellard | #define R_PARISC_NONE 0 /* No reloc. */ |
667 | 88570520 | bellard | #define R_PARISC_DIR32 1 /* Direct 32-bit reference. */ |
668 | 88570520 | bellard | #define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */ |
669 | 88570520 | bellard | #define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */ |
670 | 88570520 | bellard | #define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */ |
671 | 88570520 | bellard | #define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */ |
672 | 88570520 | bellard | #define R_PARISC_PCREL32 9 /* 32-bit rel. address. */ |
673 | 88570520 | bellard | #define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */ |
674 | 88570520 | bellard | #define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */ |
675 | 88570520 | bellard | #define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */ |
676 | 88570520 | bellard | #define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */ |
677 | 88570520 | bellard | #define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */ |
678 | 88570520 | bellard | #define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */ |
679 | 88570520 | bellard | #define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */ |
680 | 88570520 | bellard | #define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */ |
681 | 88570520 | bellard | #define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */ |
682 | 88570520 | bellard | #define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */ |
683 | 88570520 | bellard | #define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */ |
684 | 88570520 | bellard | #define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */ |
685 | 88570520 | bellard | #define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */ |
686 | 88570520 | bellard | #define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */ |
687 | 88570520 | bellard | #define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */ |
688 | 88570520 | bellard | #define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */ |
689 | 88570520 | bellard | #define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */ |
690 | 88570520 | bellard | #define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */ |
691 | 88570520 | bellard | #define R_PARISC_FPTR64 64 /* 64 bits function address. */ |
692 | 88570520 | bellard | #define R_PARISC_PLABEL32 65 /* 32 bits function address. */ |
693 | 88570520 | bellard | #define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */ |
694 | 88570520 | bellard | #define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */ |
695 | 88570520 | bellard | #define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */ |
696 | 88570520 | bellard | #define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */ |
697 | 88570520 | bellard | #define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */ |
698 | 88570520 | bellard | #define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */ |
699 | 88570520 | bellard | #define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */ |
700 | 88570520 | bellard | #define R_PARISC_DIR64 80 /* 64 bits of eff. address. */ |
701 | 88570520 | bellard | #define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */ |
702 | 88570520 | bellard | #define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */ |
703 | 88570520 | bellard | #define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */ |
704 | 88570520 | bellard | #define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */ |
705 | 88570520 | bellard | #define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */ |
706 | 88570520 | bellard | #define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */ |
707 | 88570520 | bellard | #define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */ |
708 | 88570520 | bellard | #define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */ |
709 | 88570520 | bellard | #define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */ |
710 | 88570520 | bellard | #define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */ |
711 | 88570520 | bellard | #define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */ |
712 | 88570520 | bellard | #define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */ |
713 | 88570520 | bellard | #define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */ |
714 | 88570520 | bellard | #define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */ |
715 | 88570520 | bellard | #define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */ |
716 | 88570520 | bellard | #define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */ |
717 | 88570520 | bellard | #define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */ |
718 | 88570520 | bellard | #define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */ |
719 | 88570520 | bellard | #define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */ |
720 | 88570520 | bellard | #define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */ |
721 | 88570520 | bellard | #define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */ |
722 | 88570520 | bellard | #define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */ |
723 | 88570520 | bellard | #define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */ |
724 | 88570520 | bellard | #define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */ |
725 | 88570520 | bellard | #define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */ |
726 | 88570520 | bellard | #define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */ |
727 | 88570520 | bellard | #define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */ |
728 | 88570520 | bellard | #define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */ |
729 | 88570520 | bellard | #define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */ |
730 | 88570520 | bellard | #define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */ |
731 | 88570520 | bellard | #define R_PARISC_LORESERVE 128 |
732 | 88570520 | bellard | #define R_PARISC_COPY 128 /* Copy relocation. */ |
733 | 88570520 | bellard | #define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */ |
734 | 88570520 | bellard | #define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */ |
735 | 88570520 | bellard | #define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */ |
736 | 88570520 | bellard | #define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */ |
737 | 88570520 | bellard | #define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */ |
738 | 88570520 | bellard | #define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */ |
739 | 88570520 | bellard | #define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/ |
740 | 88570520 | bellard | #define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */ |
741 | 88570520 | bellard | #define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */ |
742 | 88570520 | bellard | #define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */ |
743 | 88570520 | bellard | #define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */ |
744 | 88570520 | bellard | #define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */ |
745 | 88570520 | bellard | #define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */ |
746 | 88570520 | bellard | #define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */ |
747 | 88570520 | bellard | #define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */ |
748 | 88570520 | bellard | #define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/ |
749 | 88570520 | bellard | #define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/ |
750 | 88570520 | bellard | #define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */ |
751 | 88570520 | bellard | #define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */ |
752 | 88570520 | bellard | #define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */ |
753 | 88570520 | bellard | #define R_PARISC_HIRESERVE 255 |
754 | 88570520 | bellard | |
755 | 88570520 | bellard | /* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */
|
756 | 88570520 | bellard | |
757 | 88570520 | bellard | #define PT_HP_TLS (PT_LOOS + 0x0) |
758 | 88570520 | bellard | #define PT_HP_CORE_NONE (PT_LOOS + 0x1) |
759 | 88570520 | bellard | #define PT_HP_CORE_VERSION (PT_LOOS + 0x2) |
760 | 88570520 | bellard | #define PT_HP_CORE_KERNEL (PT_LOOS + 0x3) |
761 | 88570520 | bellard | #define PT_HP_CORE_COMM (PT_LOOS + 0x4) |
762 | 88570520 | bellard | #define PT_HP_CORE_PROC (PT_LOOS + 0x5) |
763 | 88570520 | bellard | #define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6) |
764 | 88570520 | bellard | #define PT_HP_CORE_STACK (PT_LOOS + 0x7) |
765 | 88570520 | bellard | #define PT_HP_CORE_SHM (PT_LOOS + 0x8) |
766 | 88570520 | bellard | #define PT_HP_CORE_MMF (PT_LOOS + 0x9) |
767 | 88570520 | bellard | #define PT_HP_PARALLEL (PT_LOOS + 0x10) |
768 | 88570520 | bellard | #define PT_HP_FASTBIND (PT_LOOS + 0x11) |
769 | 88570520 | bellard | #define PT_HP_OPT_ANNOT (PT_LOOS + 0x12) |
770 | 88570520 | bellard | #define PT_HP_HSL_ANNOT (PT_LOOS + 0x13) |
771 | 88570520 | bellard | #define PT_HP_STACK (PT_LOOS + 0x14) |
772 | 88570520 | bellard | |
773 | 88570520 | bellard | #define PT_PARISC_ARCHEXT 0x70000000 |
774 | 88570520 | bellard | #define PT_PARISC_UNWIND 0x70000001 |
775 | 88570520 | bellard | |
776 | 88570520 | bellard | /* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */
|
777 | 88570520 | bellard | |
778 | 88570520 | bellard | #define PF_PARISC_SBP 0x08000000 |
779 | 88570520 | bellard | |
780 | 88570520 | bellard | #define PF_HP_PAGE_SIZE 0x00100000 |
781 | 88570520 | bellard | #define PF_HP_FAR_SHARED 0x00200000 |
782 | 88570520 | bellard | #define PF_HP_NEAR_SHARED 0x00400000 |
783 | 88570520 | bellard | #define PF_HP_CODE 0x01000000 |
784 | 88570520 | bellard | #define PF_HP_MODIFY 0x02000000 |
785 | 88570520 | bellard | #define PF_HP_LAZYSWAP 0x04000000 |
786 | 88570520 | bellard | #define PF_HP_SBP 0x08000000 |
787 | 88570520 | bellard | |
788 | 0d330196 | bellard | /* IA-64 specific declarations. */
|
789 | 0d330196 | bellard | |
790 | 0d330196 | bellard | /* Processor specific flags for the Ehdr e_flags field. */
|
791 | 0d330196 | bellard | #define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */ |
792 | 0d330196 | bellard | #define EF_IA_64_ABI64 0x00000010 /* 64-bit ABI */ |
793 | 0d330196 | bellard | #define EF_IA_64_ARCH 0xff000000 /* arch. version mask */ |
794 | 0d330196 | bellard | |
795 | 0d330196 | bellard | /* Processor specific values for the Phdr p_type field. */
|
796 | 0d330196 | bellard | #define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* arch extension bits */ |
797 | 0d330196 | bellard | #define PT_IA_64_UNWIND (PT_LOPROC + 1) /* ia64 unwind bits */ |
798 | 0d330196 | bellard | |
799 | 0d330196 | bellard | /* Processor specific flags for the Phdr p_flags field. */
|
800 | 0d330196 | bellard | #define PF_IA_64_NORECOV 0x80000000 /* spec insns w/o recovery */ |
801 | 0d330196 | bellard | |
802 | 0d330196 | bellard | /* Processor specific values for the Shdr sh_type field. */
|
803 | 0d330196 | bellard | #define SHT_IA_64_EXT (SHT_LOPROC + 0) /* extension bits */ |
804 | 0d330196 | bellard | #define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* unwind bits */ |
805 | 0d330196 | bellard | |
806 | 0d330196 | bellard | /* Processor specific flags for the Shdr sh_flags field. */
|
807 | 0d330196 | bellard | #define SHF_IA_64_SHORT 0x10000000 /* section near gp */ |
808 | 0d330196 | bellard | #define SHF_IA_64_NORECOV 0x20000000 /* spec insns w/o recovery */ |
809 | 0d330196 | bellard | |
810 | 0d330196 | bellard | /* Processor specific values for the Dyn d_tag field. */
|
811 | 0d330196 | bellard | #define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0) |
812 | 0d330196 | bellard | #define DT_IA_64_NUM 1 |
813 | 0d330196 | bellard | |
814 | 0d330196 | bellard | /* IA-64 relocations. */
|
815 | 0d330196 | bellard | #define R_IA64_NONE 0x00 /* none */ |
816 | 0d330196 | bellard | #define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */ |
817 | 0d330196 | bellard | #define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */ |
818 | 0d330196 | bellard | #define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */ |
819 | 0d330196 | bellard | #define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */ |
820 | 0d330196 | bellard | #define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */ |
821 | 0d330196 | bellard | #define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */ |
822 | 0d330196 | bellard | #define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */ |
823 | 0d330196 | bellard | #define R_IA64_GPREL22 0x2a /* @gprel(sym + add), add imm22 */ |
824 | 0d330196 | bellard | #define R_IA64_GPREL64I 0x2b /* @gprel(sym + add), mov imm64 */ |
825 | 0d330196 | bellard | #define R_IA64_GPREL32MSB 0x2c /* @gprel(sym + add), data4 MSB */ |
826 | 0d330196 | bellard | #define R_IA64_GPREL32LSB 0x2d /* @gprel(sym + add), data4 LSB */ |
827 | 0d330196 | bellard | #define R_IA64_GPREL64MSB 0x2e /* @gprel(sym + add), data8 MSB */ |
828 | 0d330196 | bellard | #define R_IA64_GPREL64LSB 0x2f /* @gprel(sym + add), data8 LSB */ |
829 | 0d330196 | bellard | #define R_IA64_LTOFF22 0x32 /* @ltoff(sym + add), add imm22 */ |
830 | 0d330196 | bellard | #define R_IA64_LTOFF64I 0x33 /* @ltoff(sym + add), mov imm64 */ |
831 | 0d330196 | bellard | #define R_IA64_PLTOFF22 0x3a /* @pltoff(sym + add), add imm22 */ |
832 | 0d330196 | bellard | #define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym + add), mov imm64 */ |
833 | 0d330196 | bellard | #define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym + add), data8 MSB */ |
834 | 0d330196 | bellard | #define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym + add), data8 LSB */ |
835 | 0d330196 | bellard | #define R_IA64_FPTR64I 0x43 /* @fptr(sym + add), mov imm64 */ |
836 | 0d330196 | bellard | #define R_IA64_FPTR32MSB 0x44 /* @fptr(sym + add), data4 MSB */ |
837 | 0d330196 | bellard | #define R_IA64_FPTR32LSB 0x45 /* @fptr(sym + add), data4 LSB */ |
838 | 0d330196 | bellard | #define R_IA64_FPTR64MSB 0x46 /* @fptr(sym + add), data8 MSB */ |
839 | 0d330196 | bellard | #define R_IA64_FPTR64LSB 0x47 /* @fptr(sym + add), data8 LSB */ |
840 | 0d330196 | bellard | #define R_IA64_PCREL60B 0x48 /* @pcrel(sym + add), brl */ |
841 | 0d330196 | bellard | #define R_IA64_PCREL21B 0x49 /* @pcrel(sym + add), ptb, call */ |
842 | 0d330196 | bellard | #define R_IA64_PCREL21M 0x4a /* @pcrel(sym + add), chk.s */ |
843 | 0d330196 | bellard | #define R_IA64_PCREL21F 0x4b /* @pcrel(sym + add), fchkf */ |
844 | 0d330196 | bellard | #define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym + add), data4 MSB */ |
845 | 0d330196 | bellard | #define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym + add), data4 LSB */ |
846 | 0d330196 | bellard | #define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym + add), data8 MSB */ |
847 | 0d330196 | bellard | #define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym + add), data8 LSB */ |
848 | 0d330196 | bellard | #define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */ |
849 | 0d330196 | bellard | #define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */ |
850 | 0d330196 | bellard | #define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), data4 MSB */ |
851 | 0d330196 | bellard | #define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), data4 LSB */ |
852 | 0d330196 | bellard | #define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), data8 MSB */ |
853 | 0d330196 | bellard | #define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), data8 LSB */ |
854 | 0d330196 | bellard | #define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym + add), data4 MSB */ |
855 | 0d330196 | bellard | #define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym + add), data4 LSB */ |
856 | 0d330196 | bellard | #define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym + add), data8 MSB */ |
857 | 0d330196 | bellard | #define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym + add), data8 LSB */ |
858 | 0d330196 | bellard | #define R_IA64_SECREL32MSB 0x64 /* @secrel(sym + add), data4 MSB */ |
859 | 0d330196 | bellard | #define R_IA64_SECREL32LSB 0x65 /* @secrel(sym + add), data4 LSB */ |
860 | 0d330196 | bellard | #define R_IA64_SECREL64MSB 0x66 /* @secrel(sym + add), data8 MSB */ |
861 | 0d330196 | bellard | #define R_IA64_SECREL64LSB 0x67 /* @secrel(sym + add), data8 LSB */ |
862 | 0d330196 | bellard | #define R_IA64_REL32MSB 0x6c /* data 4 + REL */ |
863 | 0d330196 | bellard | #define R_IA64_REL32LSB 0x6d /* data 4 + REL */ |
864 | 0d330196 | bellard | #define R_IA64_REL64MSB 0x6e /* data 8 + REL */ |
865 | 0d330196 | bellard | #define R_IA64_REL64LSB 0x6f /* data 8 + REL */ |
866 | 0d330196 | bellard | #define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */ |
867 | 0d330196 | bellard | #define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */ |
868 | 0d330196 | bellard | #define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */ |
869 | 0d330196 | bellard | #define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */ |
870 | 0d330196 | bellard | #define R_IA64_PCREL21BI 0x79 /* @pcrel(sym + add), 21bit inst */ |
871 | 0d330196 | bellard | #define R_IA64_PCREL22 0x7a /* @pcrel(sym + add), 22bit inst */ |
872 | 0d330196 | bellard | #define R_IA64_PCREL64I 0x7b /* @pcrel(sym + add), 64bit inst */ |
873 | 0d330196 | bellard | #define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */ |
874 | 0d330196 | bellard | #define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */ |
875 | 0d330196 | bellard | #define R_IA64_COPY 0x84 /* copy relocation */ |
876 | 0d330196 | bellard | #define R_IA64_SUB 0x85 /* Addend and symbol difference */ |
877 | 0d330196 | bellard | #define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */ |
878 | 0d330196 | bellard | #define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */ |
879 | 0d330196 | bellard | #define R_IA64_TPREL14 0x91 /* @tprel(sym + add), imm14 */ |
880 | 0d330196 | bellard | #define R_IA64_TPREL22 0x92 /* @tprel(sym + add), imm22 */ |
881 | 0d330196 | bellard | #define R_IA64_TPREL64I 0x93 /* @tprel(sym + add), imm64 */ |
882 | 0d330196 | bellard | #define R_IA64_TPREL64MSB 0x96 /* @tprel(sym + add), data8 MSB */ |
883 | 0d330196 | bellard | #define R_IA64_TPREL64LSB 0x97 /* @tprel(sym + add), data8 LSB */ |
884 | 0d330196 | bellard | #define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), imm2 */ |
885 | 0d330196 | bellard | #define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym + add), data8 MSB */ |
886 | 0d330196 | bellard | #define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym + add), data8 LSB */ |
887 | 0d330196 | bellard | #define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(sym + add)), imm22 */ |
888 | 0d330196 | bellard | #define R_IA64_DTPREL14 0xb1 /* @dtprel(sym + add), imm14 */ |
889 | 0d330196 | bellard | #define R_IA64_DTPREL22 0xb2 /* @dtprel(sym + add), imm22 */ |
890 | 0d330196 | bellard | #define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym + add), imm64 */ |
891 | 0d330196 | bellard | #define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym + add), data4 MSB */ |
892 | 0d330196 | bellard | #define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym + add), data4 LSB */ |
893 | 0d330196 | bellard | #define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym + add), data8 MSB */ |
894 | 0d330196 | bellard | #define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym + add), data8 LSB */ |
895 | 0d330196 | bellard | #define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */ |
896 | 88570520 | bellard | |
897 | 31e31b8a | bellard | typedef struct elf32_rel { |
898 | 31e31b8a | bellard | Elf32_Addr r_offset; |
899 | 31e31b8a | bellard | Elf32_Word r_info; |
900 | 31e31b8a | bellard | } Elf32_Rel; |
901 | 31e31b8a | bellard | |
902 | 31e31b8a | bellard | typedef struct elf64_rel { |
903 | 88570520 | bellard | Elf64_Addr r_offset; /* Location at which to apply the action */
|
904 | 88570520 | bellard | Elf64_Xword r_info; /* index and type of relocation */
|
905 | 31e31b8a | bellard | } Elf64_Rel; |
906 | 31e31b8a | bellard | |
907 | 31e31b8a | bellard | typedef struct elf32_rela{ |
908 | 31e31b8a | bellard | Elf32_Addr r_offset; |
909 | 31e31b8a | bellard | Elf32_Word r_info; |
910 | 31e31b8a | bellard | Elf32_Sword r_addend; |
911 | 31e31b8a | bellard | } Elf32_Rela; |
912 | 31e31b8a | bellard | |
913 | 31e31b8a | bellard | typedef struct elf64_rela { |
914 | 88570520 | bellard | Elf64_Addr r_offset; /* Location at which to apply the action */
|
915 | 88570520 | bellard | Elf64_Xword r_info; /* index and type of relocation */
|
916 | 88570520 | bellard | Elf64_Sxword r_addend; /* Constant addend used to compute value */
|
917 | 31e31b8a | bellard | } Elf64_Rela; |
918 | 31e31b8a | bellard | |
919 | 31e31b8a | bellard | typedef struct elf32_sym{ |
920 | 31e31b8a | bellard | Elf32_Word st_name; |
921 | 31e31b8a | bellard | Elf32_Addr st_value; |
922 | 31e31b8a | bellard | Elf32_Word st_size; |
923 | 31e31b8a | bellard | unsigned char st_info; |
924 | 31e31b8a | bellard | unsigned char st_other; |
925 | 31e31b8a | bellard | Elf32_Half st_shndx; |
926 | 31e31b8a | bellard | } Elf32_Sym; |
927 | 31e31b8a | bellard | |
928 | 31e31b8a | bellard | typedef struct elf64_sym { |
929 | 88570520 | bellard | Elf64_Word st_name; /* Symbol name, index in string tbl */
|
930 | 88570520 | bellard | unsigned char st_info; /* Type and binding attributes */ |
931 | 88570520 | bellard | unsigned char st_other; /* No defined meaning, 0 */ |
932 | 88570520 | bellard | Elf64_Half st_shndx; /* Associated section index */
|
933 | 88570520 | bellard | Elf64_Addr st_value; /* Value of the symbol */
|
934 | 88570520 | bellard | Elf64_Xword st_size; /* Associated symbol size */
|
935 | 31e31b8a | bellard | } Elf64_Sym; |
936 | 31e31b8a | bellard | |
937 | 31e31b8a | bellard | |
938 | 31e31b8a | bellard | #define EI_NIDENT 16 |
939 | 31e31b8a | bellard | |
940 | 31e31b8a | bellard | typedef struct elf32_hdr{ |
941 | 31e31b8a | bellard | unsigned char e_ident[EI_NIDENT]; |
942 | 31e31b8a | bellard | Elf32_Half e_type; |
943 | 31e31b8a | bellard | Elf32_Half e_machine; |
944 | 31e31b8a | bellard | Elf32_Word e_version; |
945 | 31e31b8a | bellard | Elf32_Addr e_entry; /* Entry point */
|
946 | 31e31b8a | bellard | Elf32_Off e_phoff; |
947 | 31e31b8a | bellard | Elf32_Off e_shoff; |
948 | 31e31b8a | bellard | Elf32_Word e_flags; |
949 | 31e31b8a | bellard | Elf32_Half e_ehsize; |
950 | 31e31b8a | bellard | Elf32_Half e_phentsize; |
951 | 31e31b8a | bellard | Elf32_Half e_phnum; |
952 | 31e31b8a | bellard | Elf32_Half e_shentsize; |
953 | 31e31b8a | bellard | Elf32_Half e_shnum; |
954 | 31e31b8a | bellard | Elf32_Half e_shstrndx; |
955 | 31e31b8a | bellard | } Elf32_Ehdr; |
956 | 31e31b8a | bellard | |
957 | 31e31b8a | bellard | typedef struct elf64_hdr { |
958 | 31e31b8a | bellard | unsigned char e_ident[16]; /* ELF "magic number" */ |
959 | 88570520 | bellard | Elf64_Half e_type; |
960 | 88570520 | bellard | Elf64_Half e_machine; |
961 | 88570520 | bellard | Elf64_Word e_version; |
962 | 88570520 | bellard | Elf64_Addr e_entry; /* Entry point virtual address */
|
963 | 88570520 | bellard | Elf64_Off e_phoff; /* Program header table file offset */
|
964 | 88570520 | bellard | Elf64_Off e_shoff; /* Section header table file offset */
|
965 | 88570520 | bellard | Elf64_Word e_flags; |
966 | 88570520 | bellard | Elf64_Half e_ehsize; |
967 | 88570520 | bellard | Elf64_Half e_phentsize; |
968 | 88570520 | bellard | Elf64_Half e_phnum; |
969 | 88570520 | bellard | Elf64_Half e_shentsize; |
970 | 88570520 | bellard | Elf64_Half e_shnum; |
971 | 88570520 | bellard | Elf64_Half e_shstrndx; |
972 | 31e31b8a | bellard | } Elf64_Ehdr; |
973 | 31e31b8a | bellard | |
974 | 31e31b8a | bellard | /* These constants define the permissions on sections in the program
|
975 | 31e31b8a | bellard | header, p_flags. */
|
976 | 31e31b8a | bellard | #define PF_R 0x4 |
977 | 31e31b8a | bellard | #define PF_W 0x2 |
978 | 31e31b8a | bellard | #define PF_X 0x1 |
979 | 31e31b8a | bellard | |
980 | 31e31b8a | bellard | typedef struct elf32_phdr{ |
981 | 31e31b8a | bellard | Elf32_Word p_type; |
982 | 31e31b8a | bellard | Elf32_Off p_offset; |
983 | 31e31b8a | bellard | Elf32_Addr p_vaddr; |
984 | 31e31b8a | bellard | Elf32_Addr p_paddr; |
985 | 31e31b8a | bellard | Elf32_Word p_filesz; |
986 | 31e31b8a | bellard | Elf32_Word p_memsz; |
987 | 31e31b8a | bellard | Elf32_Word p_flags; |
988 | 31e31b8a | bellard | Elf32_Word p_align; |
989 | 31e31b8a | bellard | } Elf32_Phdr; |
990 | 31e31b8a | bellard | |
991 | 31e31b8a | bellard | typedef struct elf64_phdr { |
992 | 88570520 | bellard | Elf64_Word p_type; |
993 | 88570520 | bellard | Elf64_Word p_flags; |
994 | 88570520 | bellard | Elf64_Off p_offset; /* Segment file offset */
|
995 | 88570520 | bellard | Elf64_Addr p_vaddr; /* Segment virtual address */
|
996 | 88570520 | bellard | Elf64_Addr p_paddr; /* Segment physical address */
|
997 | 88570520 | bellard | Elf64_Xword p_filesz; /* Segment size in file */
|
998 | 88570520 | bellard | Elf64_Xword p_memsz; /* Segment size in memory */
|
999 | 88570520 | bellard | Elf64_Xword p_align; /* Segment alignment, file & memory */
|
1000 | 31e31b8a | bellard | } Elf64_Phdr; |
1001 | 31e31b8a | bellard | |
1002 | 31e31b8a | bellard | /* sh_type */
|
1003 | 31e31b8a | bellard | #define SHT_NULL 0 |
1004 | 31e31b8a | bellard | #define SHT_PROGBITS 1 |
1005 | 31e31b8a | bellard | #define SHT_SYMTAB 2 |
1006 | 31e31b8a | bellard | #define SHT_STRTAB 3 |
1007 | 31e31b8a | bellard | #define SHT_RELA 4 |
1008 | 31e31b8a | bellard | #define SHT_HASH 5 |
1009 | 31e31b8a | bellard | #define SHT_DYNAMIC 6 |
1010 | 31e31b8a | bellard | #define SHT_NOTE 7 |
1011 | 31e31b8a | bellard | #define SHT_NOBITS 8 |
1012 | 31e31b8a | bellard | #define SHT_REL 9 |
1013 | 31e31b8a | bellard | #define SHT_SHLIB 10 |
1014 | 31e31b8a | bellard | #define SHT_DYNSYM 11 |
1015 | 31e31b8a | bellard | #define SHT_NUM 12 |
1016 | 31e31b8a | bellard | #define SHT_LOPROC 0x70000000 |
1017 | 31e31b8a | bellard | #define SHT_HIPROC 0x7fffffff |
1018 | 31e31b8a | bellard | #define SHT_LOUSER 0x80000000 |
1019 | 31e31b8a | bellard | #define SHT_HIUSER 0xffffffff |
1020 | 88570520 | bellard | #define SHT_MIPS_LIST 0x70000000 |
1021 | 88570520 | bellard | #define SHT_MIPS_CONFLICT 0x70000002 |
1022 | 88570520 | bellard | #define SHT_MIPS_GPTAB 0x70000003 |
1023 | 88570520 | bellard | #define SHT_MIPS_UCODE 0x70000004 |
1024 | 31e31b8a | bellard | |
1025 | 31e31b8a | bellard | /* sh_flags */
|
1026 | 31e31b8a | bellard | #define SHF_WRITE 0x1 |
1027 | 31e31b8a | bellard | #define SHF_ALLOC 0x2 |
1028 | 31e31b8a | bellard | #define SHF_EXECINSTR 0x4 |
1029 | 31e31b8a | bellard | #define SHF_MASKPROC 0xf0000000 |
1030 | 88570520 | bellard | #define SHF_MIPS_GPREL 0x10000000 |
1031 | 31e31b8a | bellard | |
1032 | 31e31b8a | bellard | /* special section indexes */
|
1033 | 31e31b8a | bellard | #define SHN_UNDEF 0 |
1034 | 31e31b8a | bellard | #define SHN_LORESERVE 0xff00 |
1035 | 31e31b8a | bellard | #define SHN_LOPROC 0xff00 |
1036 | 31e31b8a | bellard | #define SHN_HIPROC 0xff1f |
1037 | 31e31b8a | bellard | #define SHN_ABS 0xfff1 |
1038 | 31e31b8a | bellard | #define SHN_COMMON 0xfff2 |
1039 | 31e31b8a | bellard | #define SHN_HIRESERVE 0xffff |
1040 | 88570520 | bellard | #define SHN_MIPS_ACCOMON 0xff00 |
1041 | 31e31b8a | bellard | |
1042 | 88570520 | bellard | typedef struct elf32_shdr { |
1043 | 31e31b8a | bellard | Elf32_Word sh_name; |
1044 | 31e31b8a | bellard | Elf32_Word sh_type; |
1045 | 31e31b8a | bellard | Elf32_Word sh_flags; |
1046 | 31e31b8a | bellard | Elf32_Addr sh_addr; |
1047 | 31e31b8a | bellard | Elf32_Off sh_offset; |
1048 | 31e31b8a | bellard | Elf32_Word sh_size; |
1049 | 31e31b8a | bellard | Elf32_Word sh_link; |
1050 | 31e31b8a | bellard | Elf32_Word sh_info; |
1051 | 31e31b8a | bellard | Elf32_Word sh_addralign; |
1052 | 31e31b8a | bellard | Elf32_Word sh_entsize; |
1053 | 31e31b8a | bellard | } Elf32_Shdr; |
1054 | 31e31b8a | bellard | |
1055 | 31e31b8a | bellard | typedef struct elf64_shdr { |
1056 | 88570520 | bellard | Elf64_Word sh_name; /* Section name, index in string tbl */
|
1057 | 88570520 | bellard | Elf64_Word sh_type; /* Type of section */
|
1058 | 88570520 | bellard | Elf64_Xword sh_flags; /* Miscellaneous section attributes */
|
1059 | 88570520 | bellard | Elf64_Addr sh_addr; /* Section virtual addr at execution */
|
1060 | 88570520 | bellard | Elf64_Off sh_offset; /* Section file offset */
|
1061 | 88570520 | bellard | Elf64_Xword sh_size; /* Size of section in bytes */
|
1062 | 88570520 | bellard | Elf64_Word sh_link; /* Index of another section */
|
1063 | 88570520 | bellard | Elf64_Word sh_info; /* Additional section information */
|
1064 | 88570520 | bellard | Elf64_Xword sh_addralign; /* Section alignment */
|
1065 | 88570520 | bellard | Elf64_Xword sh_entsize; /* Entry size if section holds table */
|
1066 | 31e31b8a | bellard | } Elf64_Shdr; |
1067 | 31e31b8a | bellard | |
1068 | 31e31b8a | bellard | #define EI_MAG0 0 /* e_ident[] indexes */ |
1069 | 31e31b8a | bellard | #define EI_MAG1 1 |
1070 | 31e31b8a | bellard | #define EI_MAG2 2 |
1071 | 31e31b8a | bellard | #define EI_MAG3 3 |
1072 | 31e31b8a | bellard | #define EI_CLASS 4 |
1073 | 31e31b8a | bellard | #define EI_DATA 5 |
1074 | 31e31b8a | bellard | #define EI_VERSION 6 |
1075 | 31e31b8a | bellard | #define EI_PAD 7 |
1076 | 31e31b8a | bellard | |
1077 | 31e31b8a | bellard | #define ELFMAG0 0x7f /* EI_MAG */ |
1078 | 31e31b8a | bellard | #define ELFMAG1 'E' |
1079 | 31e31b8a | bellard | #define ELFMAG2 'L' |
1080 | 31e31b8a | bellard | #define ELFMAG3 'F' |
1081 | 31e31b8a | bellard | #define ELFMAG "\177ELF" |
1082 | 31e31b8a | bellard | #define SELFMAG 4 |
1083 | 31e31b8a | bellard | |
1084 | 31e31b8a | bellard | #define ELFCLASSNONE 0 /* EI_CLASS */ |
1085 | 31e31b8a | bellard | #define ELFCLASS32 1 |
1086 | 31e31b8a | bellard | #define ELFCLASS64 2 |
1087 | 31e31b8a | bellard | #define ELFCLASSNUM 3 |
1088 | 31e31b8a | bellard | |
1089 | 31e31b8a | bellard | #define ELFDATANONE 0 /* e_ident[EI_DATA] */ |
1090 | 31e31b8a | bellard | #define ELFDATA2LSB 1 |
1091 | 31e31b8a | bellard | #define ELFDATA2MSB 2 |
1092 | 31e31b8a | bellard | |
1093 | 31e31b8a | bellard | #define EV_NONE 0 /* e_version, EI_VERSION */ |
1094 | 31e31b8a | bellard | #define EV_CURRENT 1 |
1095 | 31e31b8a | bellard | #define EV_NUM 2 |
1096 | 31e31b8a | bellard | |
1097 | 31e31b8a | bellard | /* Notes used in ET_CORE */
|
1098 | 31e31b8a | bellard | #define NT_PRSTATUS 1 |
1099 | 31e31b8a | bellard | #define NT_PRFPREG 2 |
1100 | 31e31b8a | bellard | #define NT_PRPSINFO 3 |
1101 | 31e31b8a | bellard | #define NT_TASKSTRUCT 4 |
1102 | 88570520 | bellard | #define NT_PRXFPREG 0x46e62b7f /* copied from gdb5.1/include/elf/common.h */ |
1103 | 88570520 | bellard | |
1104 | 31e31b8a | bellard | |
1105 | 31e31b8a | bellard | /* Note header in a PT_NOTE section */
|
1106 | 31e31b8a | bellard | typedef struct elf32_note { |
1107 | 31e31b8a | bellard | Elf32_Word n_namesz; /* Name size */
|
1108 | 31e31b8a | bellard | Elf32_Word n_descsz; /* Content size */
|
1109 | 31e31b8a | bellard | Elf32_Word n_type; /* Content type */
|
1110 | 31e31b8a | bellard | } Elf32_Nhdr; |
1111 | 31e31b8a | bellard | |
1112 | 31e31b8a | bellard | /* Note header in a PT_NOTE section */
|
1113 | 31e31b8a | bellard | typedef struct elf64_note { |
1114 | 88570520 | bellard | Elf64_Word n_namesz; /* Name size */
|
1115 | 88570520 | bellard | Elf64_Word n_descsz; /* Content size */
|
1116 | 88570520 | bellard | Elf64_Word n_type; /* Content type */
|
1117 | 31e31b8a | bellard | } Elf64_Nhdr; |
1118 | 31e31b8a | bellard | |
1119 | 31e31b8a | bellard | #if ELF_CLASS == ELFCLASS32
|
1120 | 31e31b8a | bellard | |
1121 | 31e31b8a | bellard | #define elfhdr elf32_hdr
|
1122 | 31e31b8a | bellard | #define elf_phdr elf32_phdr
|
1123 | 31e31b8a | bellard | #define elf_note elf32_note
|
1124 | 88570520 | bellard | #define elf_shdr elf32_shdr
|
1125 | 689f936f | bellard | #define elf_sym elf32_sym
|
1126 | 88570520 | bellard | |
1127 | 88570520 | bellard | #ifdef ELF_USES_RELOCA
|
1128 | 88570520 | bellard | # define ELF_RELOC Elf32_Rela
|
1129 | 88570520 | bellard | #else
|
1130 | 88570520 | bellard | # define ELF_RELOC Elf32_Rel
|
1131 | 88570520 | bellard | #endif
|
1132 | 31e31b8a | bellard | |
1133 | 31e31b8a | bellard | #else
|
1134 | 31e31b8a | bellard | |
1135 | 31e31b8a | bellard | #define elfhdr elf64_hdr
|
1136 | 31e31b8a | bellard | #define elf_phdr elf64_phdr
|
1137 | 31e31b8a | bellard | #define elf_note elf64_note
|
1138 | 88570520 | bellard | #define elf_shdr elf64_shdr
|
1139 | 689f936f | bellard | #define elf_sym elf64_sym
|
1140 | 88570520 | bellard | |
1141 | 88570520 | bellard | #ifdef ELF_USES_RELOCA
|
1142 | 88570520 | bellard | # define ELF_RELOC Elf64_Rela
|
1143 | 88570520 | bellard | #else
|
1144 | 88570520 | bellard | # define ELF_RELOC Elf64_Rel
|
1145 | 88570520 | bellard | #endif
|
1146 | 88570520 | bellard | |
1147 | 88570520 | bellard | #endif /* ELF_CLASS */ |
1148 | 31e31b8a | bellard | |
1149 | 88570520 | bellard | #ifndef ElfW
|
1150 | 88570520 | bellard | # if ELF_CLASS == ELFCLASS32
|
1151 | 88570520 | bellard | # define ElfW(x) Elf32_ ## x |
1152 | 88570520 | bellard | # define ELFW(x) ELF32_ ## x |
1153 | 88570520 | bellard | # else
|
1154 | 88570520 | bellard | # define ElfW(x) Elf64_ ## x |
1155 | 88570520 | bellard | # define ELFW(x) ELF64_ ## x |
1156 | 88570520 | bellard | # endif
|
1157 | 31e31b8a | bellard | #endif
|
1158 | 31e31b8a | bellard | |
1159 | 31e31b8a | bellard | |
1160 | 689f936f | bellard | #endif /* _QEMU_ELF_H */ |