target-sparc: Use movcond for FMOV*R
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sparc: Cleanup "global" temporary allocation
There are 6 temporaries that disas_sparc_insn relies on having beenallocated. Now that they are no longer referenced across branches,they need not be allocated as local temps.
Move the allocation/free of these temporaries to make it clear that...
target-sparc: Fall through from not-taken trap
Now that we've cleaned up global temporary allocation, we cancontinue translating the fallthru path of a conditional trap.
target-sparc: Optimize conditionals using SUBCC
Aka "normal" comparisons. We now have the infrastructure topass back non-boolean results from gen_compare. This willautomatically get used by both branches and conditional moves.
Signed-off-by: Richard Henderson <rth@twiddle.net>...
target-sparc: Move sdivx and udivx out of line
The branches around the exception are maintaining an otherwiseunnecessary use of local temps for the cpu destination.
target-sparc: Tidy Tcc
Share more code between unconditional and conditional paths.
Move the computation of the trap number into the conditional BB;avoid using temporaries that have gone out of scope (cpu_tmp32)or rely on local temps (cpu_dst).
Fully fold the exception number when the trap number is %g0+imm....
target-sparc: Move taddcctv and tsubcctv out of line
Note that gen_op_t{add,sub}_cc were identical to gen_op_{add,sub}_cc.
target-sparc: Use movcond in mulscc
target-sparc: Use DisasCompare and movcond in FMOVR, FMOVCC
target-sparc: Use DisasCompare and movcond in MOVCC
target-sparc: Use DisasCompare and movcond in MOVR
target-sparc: Use movcond in gen_generic_branch
target-sparc: Tidy save_npc interface
Use the cpu_cond global register directly instead of passing it down.
target-sparc: Tidy gen_generic_branch interface
The arguments passed are always the same.Pass down just DisasContext instead.
target-sparc: Introduce DisasCompare and functions to generate it
For the moment gen_cond et al retain their existing interface,using setcond to turn a (potential) comparison back into a boolean.
target-sparc: Use DisasCompare in Tcc
target-sparc: Tidy flush_cond interface
We always pass cpu_cond to the cond parameter. Use that globalregister directly instead of passing it down.
target-sparc: Tidy gen_trap_ifnofpu interface
target-sparc: Tidy save_state interface
target-sparc: Tidy gen_mov_pc_npc interface
target-sparc: Tidy cpu_dump_state
We don't really need to be told that %g are general register, etc.Issue a trailing newline to separate blocks.
target-sparc: Make CPU_LOG_INT useful by default
No need for ifdefs when the log mask does just as well.No need to print pc/npc when we're dumping the whole cpu state.
target-sparc: Tidy do_branch interfaces
We always pass cpu_cond to the r_cond parameter. Use that globalregister directly instead of passing it down.
sparc: use g_strdup in place of unchecked strdup
This avoids a NULL-deref upon strdup failure.Also update matching free to g_free.
Signed-off-by: Jim Meyering <meyering@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Emit debug_insn for CPU_LOG_TB_OP_OPT as well.
For all targets that currently call tcg_gen_debug_insn_start,add CPU_LOG_TB_OP_OPT to the condition that gates it.
This is useful for comparing optimization dumps, when thepre-optimization dump is merely noise....
Remove unused CONFIG_TCG_PASS_AREG0 and dead code
Now that CONFIG_TCG_PASS_AREG0 is enabled for all targets,remove dead code and support for !CONFIG_TCG_PASS_AREG0 case.
Remove dyngen-exec.h and all references to it. Although included byhw/spapr_hcall.c, it does not seem to use it....
target-sparc: fix fcmp{s,d,q} instructions wrt exception
fcmp{s,d,q} instructions are supposed to ignore quiet NaN (contrary tothe fcmpe{s,d,q} instructions), but the current code is wrongly settingthe NV exception in that case. Moreover the current code is duplicated:...
qemu-log: use LOG_UNIMP for some target CPU cases
Use LOG_UNIMP for some target CPU cases.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Acked-by: Alexander Graf <agraf@suse.de>
build: move other target-*/ objects to nested Makefile.objs
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
build: move libobj-y variable to nested Makefile.objs
build: move obj-TARGET-y variables to nested Makefile.objs
Also drop duplicate occurrence of device-hotplug.o.
target-sparc: Let cpu_sparc_init() return SPARCCPU
Make include paths for cpu-qom.h consistent, so that SPARCCPU can beused in cpu.h.
Turn cpu_init macro into a static inline function returningCPUSPARCState for backwards compatibility.
Signed-off-by: Andreas Färber <afaerber@suse.de>...
Kill off cpu_state_reset()
In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset()was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()that would operate on QOM objects.
All callers have been updated except for one in target-mips, so drop all...
fix block loads broken in commit 30038fd818
Fix UltraSPARC/JPS1/UA2007 VIS block load instructions broken in30038fd81808f7c3bca92be2369e74c8ca7b3d69.
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>[blauwirbel@gmail.com: trimmed unwanted part of patch]...
Implement address masking for SPARC v9 CPUs
According to UltraSPARC - IIi User's manual:
14.1.11 Address Masking (Impdep #125)When PSTATE.AM=1, the CALL, JMPL, and RDPC instructions and all trapstransmit zero in the high-order 32-bits of the PC to their specified...
sparc: fix qtest
Initialize TCG only when enabled.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Use uintptr_t for various op related functions
Use uintptr_t instead of void * or unsigned long inseveral op related functions, env->mem_io_pc andGETPC macro.
Reviewed-by: Stefan Weil <sw@weilnetz.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sparc: QOM'ify CPU
Embed CPUSPARCState as first member of SPARCCPU.Drop cpu_sparc_close() in favor of object_delete() and a finalizer.Let cpu_state_reset() call cpu_reset().
Make TYPE_SPARC_CPU non-abstract for now.Distinguish between "sparc-cpu" and "sparc64-cpu"....
target-sparc: Rename cpu_init.c
Align QOM'ified targets, with a view to simplify Makefile.target.
Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
sparc: pass page aligned addresses to tlb_set_page
Mask incoming page address early so that resolved addressesare page aligned. Remove further address masking.
Tested-by: Artyom Tarasenko <atar4qemu@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sparc: Add compiler attribute to some functions which don't return
helper_raise_exception does not return, nor does do_unaligned_access.
Cc: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Stefan Weil <sw@weilnetz.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Sparc: avoid AREG0 wrappers for memory access helpers
Adjust generation of load and store templates so that the functionstake a parameter for CPUState instead of relying on global env.
Remove wrappers. Move remaining memory helpers to ldst_helper.c.
Sparc: avoid AREG0 for memory access helpers
Make memory access helpers take a parameter for CPUState insteadof relying on global env. Introduce wrappers for load and store ops.
sparc64: implement PCI and ISA irqs
Generate correct trap for external interrupts. Map PCI and ISA IRQs toRIC/UltraSPARC-IIi interrupt vectors.
sparc: reset CPU state on reset
Not strictly accurate for Sparc64 but avoid confusing Valgrind.
Reported-by: Michael S. Tsirkin <mst@redhat.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Rename CPUState -> CPUArchState
Scripted conversion: for file in .[hc] hw/.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done...
target-sparc: Don't overuse CPUState
Scripted conversion: sed -i "s/CPUState/CPUSPARCState/g" target-sparc/*.[hc] sed -i "s/#define CPUSPARCState/#define CPUState/" target-sparc/cpu.h
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Anthony Liguori <aliguori@us.ibm.com>
Rename cpu_reset() to cpu_state_reset()
Frees the identifier cpu_reset for QOM CPUs (manual rename).
Don't hide the parameter type behind explicit casts, use staticfunctions with strongly typed argument to indirect.
target-sparc: Typedef struct CPUSPARCState early
Will be needed for qemu_irq_ack callback.
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
target-sparc: Fix mixup of uint64 and uint64_t
Commit 793a137a41ad4125011c7022cf16a1baa40a5ab6 (target-sparc:Implement BMASK/BSHUFFLE.) introduced a stray usage of softfloat uint64type.
Use uint64_t instead.
sparc: avoid cpu_get_physical_page_desc()
This reaches into the innards of the memory core, which are beingchanged. Switch to a memory API version.
Signed-off-by: Avi Kivity <avi@redhat.com>
fix spelling in target sub directory
Cc: Richard Henderson <rth@twiddle.net>Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>Cc: Aurelien Jarno <aurelien@aurel32.net>Cc: Alexander Graf <agraf@suse.de>Cc: Aurelien Jarno <aurelien@aurel32.net>Cc: Blue Swirl <blauwirbel@gmail.com>...
Improve "ta 0" shutdown
This patch replace the previous implementation with this simplified andmore complete version (no shutdown when psret == 1).
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sparc: Implement EDGE* instructions.
Signed-off-by: Richard Henderson <rth@twiddle.net>
target-sparc: Implement ALIGNADDR* inline.
While ALIGNADDR was implemented out-of-line, ALIGNADDRL was notimplemeneted at all. However, this is a very simple operationso we're better off doing this inline.
target-sparc: Implement BMASK/BSHUFFLE.
target-sparc: Implement FALIGNDATA inline.
This is a relatively simple sequence of shifts.
target-sparc: Implement fpack{16,32,fix}.
target-sparc: Implement PDIST.
target-sparc: Do exceptions management fully inside the helpers.
This reduces the size of the individual translation blocks, sincewe only emit a single call for each FOP rather than three. Inaddition, clear_float_exceptions expands inline to a single byte store....
target-sparc: Extract float128 move to a function.
target-sparc: Undo cpu_fpr rename.
target-sparc: Change fpr representation to doubles.
This allows a more efficient representation for 64-bit hosts.It should be about the same for 32-bit hosts, as we can stillaccess the individual pieces of the double.
target-sparc: Extract common code for floating-point operations.
target-sparc: Mark fprs dirty in store accessor.
target-sparc: Add accessors for double-precision fpr access.
Begin using i64 quantities to manipulate double-precision values.On a 64-bit host this will, for the moment, generate less efficientcode; on a 32-bit host code quality should be largely unchanged....
target-sparc: Pass float64 parameters instead of dt0/1 temporaries.
target-sparc: Make FPU/VIS helpers const when possible.
This also removes the unused ENV parameter from these helpers.
target-sparc: Add accessors for single-precision fpr access.
Load, store, and "create destination". This version attempts tochange the behaviour of the translator as little as possible. Wepreviously used cpu_tmp32 as the temporary destination, and we...
Sparc: split load and store op helpers
Move load and store op helpers top ldst_helper.c.
Reviewed-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Sparc: convert win_helper to trace framework
Sparc: convert interrupt helpers to trace framework
Sparc: convert mmu_helper to trace framework
Sparc: split MMU helpers
Move MMU helpers to mmu_helper.c.
Sparc: fix coding style in helper.c
Before the next patch, fix coding style of the areas affected.
Sparc: avoid AREG0 for division op helpers
Make [su]div{,cc} helpers take a parameter for CPUState insteadof relying on global env. Move the functions to helper.c.
Sparc: avoid AREG0 for softint op helpers and Leon cache control
Make softint op helpers and Leon cache irq manager take a parameterfor CPUState instead of relying on global env. Move the functionsto int{32,64}_helper.c.
Reviewed-by: Richard Henderson <rth@twiddle.net>...
Sparc: avoid AREG0 for CWP and PSTATE helpers
Make CWP and PSTATE helpers take a parameter for CPUState insteadof relying on global env. Remove wrapper functions.
target-sparc: Fix use of g_new0 / g_free
g_malloc0 needs g_free instead of free.While fixing this, I also replaced g_malloc0 by g_new0as was suggested by Stuart Brady.
target-sparc: Fix order of function parameters
The MinGW-w64 gcc complains about wrong parameters forgen_helper_fpadd16_s and three other functions.
gen_helper_fpadd16_s is declared like this (hidden in lots of macros):
static inline void gen_helper_fpadd16s(TCGv_i32 retval, TCGv_ptr arg1,...
Sparc: split CWP and PSTATE op helpers
Move CWP and PSTATE op helpers to win_helper.c.
Sparc: avoid AREG0 for lazy condition code helpers
Make lazy condition code helpers take a parameter for CPUState insteadof relying on global env.
Sparc: split lazy condition code handling op helpers
Move lazy condition code handling op helpers to cc_helper.c.
Sparc: avoid AREG0 for float and VIS ops
Make floating point and VIS ops take a parameter for CPUState insteadof relying on global env.
Sparc: split FPU and VIS op helpers
Move FPU op helpers to fop_helper.c. Move VIS op helpers to vis_helper.c,compile it only for Sparc64.
Sparc: fix coding style
Before the next patches, fix coding style of the areas affected.
Sparc: avoid AREG0 for raise_exception and helper_debug
Make raise_exception() and helper_debug() take a parameter forCPUState instead of relying on global env. Move the functionsto helper.c.
Sparc: move trivial functions from op_helper.c
These functions don't need access to CPUState or already pass it,so relocating them from op_helper.c to helper.c and int64_helper.cis trivial.
Sparc: split helper.c
Move CPU init to cpu_init.c and interrupt handling to int32_helper.cfor Sparc32 and int64_helper.c for Sparc64.
softmmu_header: pass CPUState to tlb_fill
Pass CPUState pointer to tlb_fill() instead of architecture localcpu_single_env hacks.
Gdbstub: Fix back-trace on SPARC32
Gdb expects all registers windows to be flushed in ram, which is not the casein Qemu. Therefore the back-trace generation doesn't work. This patch adds afunction to handle reads (and only read) in stack frames as if windows were...
Sparc64: remove useless variable
Remove a useless variable, spotted by clang analyzer:/src/qemu/target-sparc/op_helper.c:3904:18: warning: unused variable 'tmp' [-Wunused-variable] target_ulong tmp = val;The error message is actually incorrect since the variable is used....
Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)is not used in cpu_*_handle_mmu_fault() functions, remove themand adjust callers.
Acked-by: Richard Henderson <rth@twiddle.net>...
Fix handling of conditional branches in delay slot of a conditional branch
Check whether dc->npc is dynamic before using its value for branch.
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Sparc: fix non-faulting unassigned memory accesses
Commit b14ef7c9ab41ea824c3ccadb070ad95567cca84eintroduced cpu_unassigned_access() function. On Sparc,the function does not restore AREG0 used for global CPUStateon function exit, causing bugs with non-faulting unassigned...
exec.h cleanup
Move softmmu_exec.h include directives from target-*/exec.h totarget-*/op_helper.c. Move also various other stuff only used inop_helper.c there.
Define global env in dyngen-exec.h.
For i386, move wrappers for segment and FPU helpers from user-exec.c...
SPARC64: fix fnor* and fnand*
Fix the problem that result values are not assigned to the destinationregisters.
Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
SPARC64: implement %fprs dirty bits
Implement %fprs.DU/DL bits.The FPU sets %fprs.DL and %fprs.DU when values are assigned to %f0-31and %f32-63 respectively.