Revision 94dd91d6
| b/hw/alpha_typhoon.c | ||
|---|---|---|
| 15 | 15 |
#include "exec-memory.h" |
| 16 | 16 |
|
| 17 | 17 |
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#define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost" |
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| 19 |
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|
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typedef struct TyphoonCchip {
|
| 19 | 21 |
MemoryRegion region; |
| 20 | 22 |
uint64_t misc; |
| ... | ... | |
| 40 | 42 |
TyphoonWindow win[4]; |
| 41 | 43 |
} TyphoonPchip; |
| 42 | 44 |
|
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#define TYPHOON_PCI_HOST_BRIDGE(obj) \ |
|
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OBJECT_CHECK(TyphoonState, (obj), TYPE_TYPHOON_PCI_HOST_BRIDGE) |
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| 43 | 48 |
typedef struct TyphoonState {
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| 44 | 49 |
PCIHostState host; |
| 50 |
|
|
| 45 | 51 |
TyphoonCchip cchip; |
| 46 | 52 |
TyphoonPchip pchip; |
| 47 | 53 |
MemoryRegion dchip_region; |
| ... | ... | |
| 700 | 706 |
MemoryRegion *addr_space = get_system_memory(); |
| 701 | 707 |
MemoryRegion *addr_space_io = get_system_io(); |
| 702 | 708 |
DeviceState *dev; |
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PCIHostState *p; |
|
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TyphoonState *s; |
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PCIHostState *phb; |
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PCIBus *b; |
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int i; |
| 707 | 713 |
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dev = qdev_create(NULL, "typhoon-pcihost");
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dev = qdev_create(NULL, TYPE_TYPHOON_PCI_HOST_BRIDGE);
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|
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qdev_init_nofail(dev); |
| 710 | 716 |
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p = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev));
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s = container_of(p, TyphoonState, host);
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s = TYPHOON_PCI_HOST_BRIDGE(dev);
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phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(dev));
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|
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/* Remember the CPUs so that we can deliver interrupts to them. */ |
| 715 | 721 |
for (i = 0; i < 4; i++) {
|
| ... | ... | |
| 763 | 769 |
memory_region_add_subregion(addr_space, 0x801fc000000ULL, |
| 764 | 770 |
&s->pchip.reg_io); |
| 765 | 771 |
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b = pci_register_bus(&s->host.busdev.qdev, "pci",
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b = pci_register_bus(dev, "pci", |
|
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typhoon_set_irq, sys_map_irq, s, |
| 768 | 774 |
&s->pchip.reg_mem, addr_space_io, 0, 64); |
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s->host.bus = b;
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phb->bus = b;
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|
| 770 | 776 |
|
| 771 | 777 |
/* Pchip0 PCI special/interrupt acknowledge, 0x801.F800.0000, 64MB. */ |
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memory_region_init_io(&s->pchip.reg_iack, &alpha_pci_iack_ops, b, |
| ... | ... | |
| 818 | 824 |
} |
| 819 | 825 |
|
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static const TypeInfo typhoon_pcihost_info = {
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.name = "typhoon-pcihost",
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.name = TYPE_TYPHOON_PCI_HOST_BRIDGE,
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.parent = TYPE_SYS_BUS_DEVICE, |
| 823 | 829 |
.instance_size = sizeof(TyphoonState), |
| 824 | 830 |
.class_init = typhoon_pcihost_class_init, |
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