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1 | 80cabfad | bellard | /*
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2 | 80cabfad | bellard | * QEMU PC System Emulator
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3 | 5fafdf24 | ths | *
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4 | 80cabfad | bellard | * Copyright (c) 2003-2004 Fabrice Bellard
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5 | 5fafdf24 | ths | *
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6 | 80cabfad | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 80cabfad | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 80cabfad | bellard | * in the Software without restriction, including without limitation the rights
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9 | 80cabfad | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 80cabfad | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 80cabfad | bellard | * furnished to do so, subject to the following conditions:
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12 | 80cabfad | bellard | *
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13 | 80cabfad | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 80cabfad | bellard | * all copies or substantial portions of the Software.
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15 | 80cabfad | bellard | *
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16 | 80cabfad | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 80cabfad | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 80cabfad | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 80cabfad | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 80cabfad | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 80cabfad | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 80cabfad | bellard | * THE SOFTWARE.
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23 | 80cabfad | bellard | */
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24 | 87ecb68b | pbrook | #include "hw.h" |
25 | 87ecb68b | pbrook | #include "pc.h" |
26 | aa28b9bf | Blue Swirl | #include "apic.h" |
27 | 87ecb68b | pbrook | #include "fdc.h" |
28 | c0897e0c | Markus Armbruster | #include "ide.h" |
29 | 87ecb68b | pbrook | #include "pci.h" |
30 | 18e08a55 | Michael S. Tsirkin | #include "vmware_vga.h" |
31 | 376253ec | aliguori | #include "monitor.h" |
32 | 3cce6243 | blueswir1 | #include "fw_cfg.h" |
33 | 16b29ae1 | aliguori | #include "hpet_emul.h" |
34 | b6f6e3d3 | aliguori | #include "smbios.h" |
35 | ca20cf32 | Blue Swirl | #include "loader.h" |
36 | ca20cf32 | Blue Swirl | #include "elf.h" |
37 | 52001445 | Adam Lackorzynski | #include "multiboot.h" |
38 | 1d914fa0 | Isaku Yamahata | #include "mc146818rtc.h" |
39 | 92a16d7a | Blue Swirl | #include "msix.h" |
40 | 822557eb | Jan Kiszka | #include "sysbus.h" |
41 | 666daa68 | Markus Armbruster | #include "sysemu.h" |
42 | 2446333c | Blue Swirl | #include "blockdev.h" |
43 | 80cabfad | bellard | |
44 | b41a2cd1 | bellard | /* output Bochs bios info messages */
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45 | b41a2cd1 | bellard | //#define DEBUG_BIOS
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46 | b41a2cd1 | bellard | |
47 | 471fd342 | Blue Swirl | /* debug PC/ISA interrupts */
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48 | 471fd342 | Blue Swirl | //#define DEBUG_IRQ
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49 | 471fd342 | Blue Swirl | |
50 | 471fd342 | Blue Swirl | #ifdef DEBUG_IRQ
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51 | 471fd342 | Blue Swirl | #define DPRINTF(fmt, ...) \
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52 | 471fd342 | Blue Swirl | do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0) |
53 | 471fd342 | Blue Swirl | #else
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54 | 471fd342 | Blue Swirl | #define DPRINTF(fmt, ...)
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55 | 471fd342 | Blue Swirl | #endif
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56 | 471fd342 | Blue Swirl | |
57 | 80cabfad | bellard | #define BIOS_FILENAME "bios.bin" |
58 | 80cabfad | bellard | |
59 | 7fb4fdcf | balrog | #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024) |
60 | 7fb4fdcf | balrog | |
61 | a80274c3 | pbrook | /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
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62 | a80274c3 | pbrook | #define ACPI_DATA_SIZE 0x10000 |
63 | 3cce6243 | blueswir1 | #define BIOS_CFG_IOPORT 0x510 |
64 | 8a92ea2f | aliguori | #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0) |
65 | b6f6e3d3 | aliguori | #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1) |
66 | 6b35e7bf | Jes Sorensen | #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2) |
67 | 4c5b10b7 | Jes Sorensen | #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3) |
68 | 40ac17cd | Gleb Natapov | #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4) |
69 | 80cabfad | bellard | |
70 | 92a16d7a | Blue Swirl | #define MSI_ADDR_BASE 0xfee00000 |
71 | 92a16d7a | Blue Swirl | |
72 | 4c5b10b7 | Jes Sorensen | #define E820_NR_ENTRIES 16 |
73 | 4c5b10b7 | Jes Sorensen | |
74 | 4c5b10b7 | Jes Sorensen | struct e820_entry {
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75 | 4c5b10b7 | Jes Sorensen | uint64_t address; |
76 | 4c5b10b7 | Jes Sorensen | uint64_t length; |
77 | 4c5b10b7 | Jes Sorensen | uint32_t type; |
78 | 4c5b10b7 | Jes Sorensen | }; |
79 | 4c5b10b7 | Jes Sorensen | |
80 | 4c5b10b7 | Jes Sorensen | struct e820_table {
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81 | 4c5b10b7 | Jes Sorensen | uint32_t count; |
82 | 4c5b10b7 | Jes Sorensen | struct e820_entry entry[E820_NR_ENTRIES];
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83 | 4c5b10b7 | Jes Sorensen | }; |
84 | 4c5b10b7 | Jes Sorensen | |
85 | 4c5b10b7 | Jes Sorensen | static struct e820_table e820_table; |
86 | 4c5b10b7 | Jes Sorensen | |
87 | 845773ab | Isaku Yamahata | void isa_irq_handler(void *opaque, int n, int level) |
88 | 1452411b | Avi Kivity | { |
89 | 1452411b | Avi Kivity | IsaIrqState *isa = (IsaIrqState *)opaque; |
90 | 1452411b | Avi Kivity | |
91 | 471fd342 | Blue Swirl | DPRINTF("isa_irqs: %s irq %d\n", level? "raise" : "lower", n); |
92 | 1632dc6a | Avi Kivity | if (n < 16) { |
93 | 1632dc6a | Avi Kivity | qemu_set_irq(isa->i8259[n], level); |
94 | 1632dc6a | Avi Kivity | } |
95 | 2c8d9340 | Gerd Hoffmann | if (isa->ioapic)
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96 | 2c8d9340 | Gerd Hoffmann | qemu_set_irq(isa->ioapic[n], level); |
97 | 1632dc6a | Avi Kivity | }; |
98 | 1452411b | Avi Kivity | |
99 | b41a2cd1 | bellard | static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
100 | 80cabfad | bellard | { |
101 | 80cabfad | bellard | } |
102 | 80cabfad | bellard | |
103 | f929aad6 | bellard | /* MSDOS compatibility mode FPU exception support */
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104 | d537cf6c | pbrook | static qemu_irq ferr_irq;
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105 | 8e78eb28 | Isaku Yamahata | |
106 | 8e78eb28 | Isaku Yamahata | void pc_register_ferr_irq(qemu_irq irq)
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107 | 8e78eb28 | Isaku Yamahata | { |
108 | 8e78eb28 | Isaku Yamahata | ferr_irq = irq; |
109 | 8e78eb28 | Isaku Yamahata | } |
110 | 8e78eb28 | Isaku Yamahata | |
111 | f929aad6 | bellard | /* XXX: add IGNNE support */
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112 | f929aad6 | bellard | void cpu_set_ferr(CPUX86State *s)
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113 | f929aad6 | bellard | { |
114 | d537cf6c | pbrook | qemu_irq_raise(ferr_irq); |
115 | f929aad6 | bellard | } |
116 | f929aad6 | bellard | |
117 | f929aad6 | bellard | static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
118 | f929aad6 | bellard | { |
119 | d537cf6c | pbrook | qemu_irq_lower(ferr_irq); |
120 | f929aad6 | bellard | } |
121 | f929aad6 | bellard | |
122 | 28ab0e2e | bellard | /* TSC handling */
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123 | 28ab0e2e | bellard | uint64_t cpu_get_tsc(CPUX86State *env) |
124 | 28ab0e2e | bellard | { |
125 | 4a1418e0 | Anthony Liguori | return cpu_get_ticks();
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126 | 28ab0e2e | bellard | } |
127 | 28ab0e2e | bellard | |
128 | a5954d5c | bellard | /* SMM support */
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129 | f885f1ea | Isaku Yamahata | |
130 | f885f1ea | Isaku Yamahata | static cpu_set_smm_t smm_set;
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131 | f885f1ea | Isaku Yamahata | static void *smm_arg; |
132 | f885f1ea | Isaku Yamahata | |
133 | f885f1ea | Isaku Yamahata | void cpu_smm_register(cpu_set_smm_t callback, void *arg) |
134 | f885f1ea | Isaku Yamahata | { |
135 | f885f1ea | Isaku Yamahata | assert(smm_set == NULL);
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136 | f885f1ea | Isaku Yamahata | assert(smm_arg == NULL);
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137 | f885f1ea | Isaku Yamahata | smm_set = callback; |
138 | f885f1ea | Isaku Yamahata | smm_arg = arg; |
139 | f885f1ea | Isaku Yamahata | } |
140 | f885f1ea | Isaku Yamahata | |
141 | a5954d5c | bellard | void cpu_smm_update(CPUState *env)
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142 | a5954d5c | bellard | { |
143 | f885f1ea | Isaku Yamahata | if (smm_set && smm_arg && env == first_cpu)
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144 | f885f1ea | Isaku Yamahata | smm_set(!!(env->hflags & HF_SMM_MASK), smm_arg); |
145 | a5954d5c | bellard | } |
146 | a5954d5c | bellard | |
147 | a5954d5c | bellard | |
148 | 3de388f6 | bellard | /* IRQ handling */
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149 | 3de388f6 | bellard | int cpu_get_pic_interrupt(CPUState *env)
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150 | 3de388f6 | bellard | { |
151 | 3de388f6 | bellard | int intno;
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152 | 3de388f6 | bellard | |
153 | cf6d64bf | Blue Swirl | intno = apic_get_interrupt(env->apic_state); |
154 | 3de388f6 | bellard | if (intno >= 0) { |
155 | 3de388f6 | bellard | /* set irq request if a PIC irq is still pending */
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156 | 3de388f6 | bellard | /* XXX: improve that */
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157 | 5fafdf24 | ths | pic_update_irq(isa_pic); |
158 | 3de388f6 | bellard | return intno;
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159 | 3de388f6 | bellard | } |
160 | 3de388f6 | bellard | /* read the irq from the PIC */
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161 | cf6d64bf | Blue Swirl | if (!apic_accept_pic_intr(env->apic_state)) {
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162 | 0e21e12b | ths | return -1; |
163 | cf6d64bf | Blue Swirl | } |
164 | 0e21e12b | ths | |
165 | 3de388f6 | bellard | intno = pic_read_irq(isa_pic); |
166 | 3de388f6 | bellard | return intno;
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167 | 3de388f6 | bellard | } |
168 | 3de388f6 | bellard | |
169 | d537cf6c | pbrook | static void pic_irq_request(void *opaque, int irq, int level) |
170 | 3de388f6 | bellard | { |
171 | a5b38b51 | aurel32 | CPUState *env = first_cpu; |
172 | a5b38b51 | aurel32 | |
173 | 471fd342 | Blue Swirl | DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq); |
174 | d5529471 | aurel32 | if (env->apic_state) {
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175 | d5529471 | aurel32 | while (env) {
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176 | cf6d64bf | Blue Swirl | if (apic_accept_pic_intr(env->apic_state)) {
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177 | cf6d64bf | Blue Swirl | apic_deliver_pic_intr(env->apic_state, level); |
178 | cf6d64bf | Blue Swirl | } |
179 | d5529471 | aurel32 | env = env->next_cpu; |
180 | d5529471 | aurel32 | } |
181 | d5529471 | aurel32 | } else {
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182 | b614106a | aurel32 | if (level)
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183 | b614106a | aurel32 | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
184 | b614106a | aurel32 | else
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185 | b614106a | aurel32 | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
186 | a5b38b51 | aurel32 | } |
187 | 3de388f6 | bellard | } |
188 | 3de388f6 | bellard | |
189 | b0a21b53 | bellard | /* PC cmos mappings */
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190 | b0a21b53 | bellard | |
191 | 80cabfad | bellard | #define REG_EQUIPMENT_BYTE 0x14 |
192 | 80cabfad | bellard | |
193 | 777428f2 | bellard | static int cmos_get_fd_drive_type(int fd0) |
194 | 777428f2 | bellard | { |
195 | 777428f2 | bellard | int val;
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196 | 777428f2 | bellard | |
197 | 777428f2 | bellard | switch (fd0) {
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198 | 777428f2 | bellard | case 0: |
199 | 777428f2 | bellard | /* 1.44 Mb 3"5 drive */
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200 | 777428f2 | bellard | val = 4;
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201 | 777428f2 | bellard | break;
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202 | 777428f2 | bellard | case 1: |
203 | 777428f2 | bellard | /* 2.88 Mb 3"5 drive */
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204 | 777428f2 | bellard | val = 5;
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205 | 777428f2 | bellard | break;
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206 | 777428f2 | bellard | case 2: |
207 | 777428f2 | bellard | /* 1.2 Mb 5"5 drive */
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208 | 777428f2 | bellard | val = 2;
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209 | 777428f2 | bellard | break;
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210 | 777428f2 | bellard | default:
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211 | 777428f2 | bellard | val = 0;
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212 | 777428f2 | bellard | break;
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213 | 777428f2 | bellard | } |
214 | 777428f2 | bellard | return val;
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215 | 777428f2 | bellard | } |
216 | 777428f2 | bellard | |
217 | ec2654fb | Isaku Yamahata | static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd, |
218 | 1d914fa0 | Isaku Yamahata | ISADevice *s) |
219 | ba6c2377 | bellard | { |
220 | ba6c2377 | bellard | int cylinders, heads, sectors;
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221 | ba6c2377 | bellard | bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
222 | ba6c2377 | bellard | rtc_set_memory(s, type_ofs, 47);
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223 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs, cylinders); |
224 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
225 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 2, heads);
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226 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 3, 0xff); |
227 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 4, 0xff); |
228 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
229 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 6, cylinders);
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230 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
231 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 8, sectors);
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232 | ba6c2377 | bellard | } |
233 | ba6c2377 | bellard | |
234 | 6ac0e82d | balrog | /* convert boot_device letter to something recognizable by the bios */
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235 | 6ac0e82d | balrog | static int boot_device2nibble(char boot_device) |
236 | 6ac0e82d | balrog | { |
237 | 6ac0e82d | balrog | switch(boot_device) {
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238 | 6ac0e82d | balrog | case 'a': |
239 | 6ac0e82d | balrog | case 'b': |
240 | 6ac0e82d | balrog | return 0x01; /* floppy boot */ |
241 | 6ac0e82d | balrog | case 'c': |
242 | 6ac0e82d | balrog | return 0x02; /* hard drive boot */ |
243 | 6ac0e82d | balrog | case 'd': |
244 | 6ac0e82d | balrog | return 0x03; /* CD-ROM boot */ |
245 | 6ac0e82d | balrog | case 'n': |
246 | 6ac0e82d | balrog | return 0x04; /* Network boot */ |
247 | 6ac0e82d | balrog | } |
248 | 6ac0e82d | balrog | return 0; |
249 | 6ac0e82d | balrog | } |
250 | 6ac0e82d | balrog | |
251 | 1d914fa0 | Isaku Yamahata | static int set_boot_dev(ISADevice *s, const char *boot_device, int fd_bootchk) |
252 | 0ecdffbb | aurel32 | { |
253 | 0ecdffbb | aurel32 | #define PC_MAX_BOOT_DEVICES 3 |
254 | 0ecdffbb | aurel32 | int nbds, bds[3] = { 0, }; |
255 | 0ecdffbb | aurel32 | int i;
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256 | 0ecdffbb | aurel32 | |
257 | 0ecdffbb | aurel32 | nbds = strlen(boot_device); |
258 | 0ecdffbb | aurel32 | if (nbds > PC_MAX_BOOT_DEVICES) {
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259 | 1ecda02b | Markus Armbruster | error_report("Too many boot devices for PC");
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260 | 0ecdffbb | aurel32 | return(1); |
261 | 0ecdffbb | aurel32 | } |
262 | 0ecdffbb | aurel32 | for (i = 0; i < nbds; i++) { |
263 | 0ecdffbb | aurel32 | bds[i] = boot_device2nibble(boot_device[i]); |
264 | 0ecdffbb | aurel32 | if (bds[i] == 0) { |
265 | 1ecda02b | Markus Armbruster | error_report("Invalid boot device for PC: '%c'",
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266 | 1ecda02b | Markus Armbruster | boot_device[i]); |
267 | 0ecdffbb | aurel32 | return(1); |
268 | 0ecdffbb | aurel32 | } |
269 | 0ecdffbb | aurel32 | } |
270 | 0ecdffbb | aurel32 | rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); |
271 | d9346e81 | Markus Armbruster | rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); |
272 | 0ecdffbb | aurel32 | return(0); |
273 | 0ecdffbb | aurel32 | } |
274 | 0ecdffbb | aurel32 | |
275 | d9346e81 | Markus Armbruster | static int pc_boot_set(void *opaque, const char *boot_device) |
276 | d9346e81 | Markus Armbruster | { |
277 | d9346e81 | Markus Armbruster | return set_boot_dev(opaque, boot_device, 0); |
278 | d9346e81 | Markus Armbruster | } |
279 | d9346e81 | Markus Armbruster | |
280 | c0897e0c | Markus Armbruster | typedef struct pc_cmos_init_late_arg { |
281 | c0897e0c | Markus Armbruster | ISADevice *rtc_state; |
282 | c0897e0c | Markus Armbruster | BusState *idebus0, *idebus1; |
283 | c0897e0c | Markus Armbruster | } pc_cmos_init_late_arg; |
284 | c0897e0c | Markus Armbruster | |
285 | c0897e0c | Markus Armbruster | static void pc_cmos_init_late(void *opaque) |
286 | c0897e0c | Markus Armbruster | { |
287 | c0897e0c | Markus Armbruster | pc_cmos_init_late_arg *arg = opaque; |
288 | c0897e0c | Markus Armbruster | ISADevice *s = arg->rtc_state; |
289 | c0897e0c | Markus Armbruster | int val;
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290 | c0897e0c | Markus Armbruster | BlockDriverState *hd_table[4];
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291 | c0897e0c | Markus Armbruster | int i;
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292 | c0897e0c | Markus Armbruster | |
293 | c0897e0c | Markus Armbruster | ide_get_bs(hd_table, arg->idebus0); |
294 | c0897e0c | Markus Armbruster | ide_get_bs(hd_table + 2, arg->idebus1);
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295 | c0897e0c | Markus Armbruster | |
296 | c0897e0c | Markus Armbruster | rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
297 | c0897e0c | Markus Armbruster | if (hd_table[0]) |
298 | c0897e0c | Markus Armbruster | cmos_init_hd(0x19, 0x1b, hd_table[0], s); |
299 | c0897e0c | Markus Armbruster | if (hd_table[1]) |
300 | c0897e0c | Markus Armbruster | cmos_init_hd(0x1a, 0x24, hd_table[1], s); |
301 | c0897e0c | Markus Armbruster | |
302 | c0897e0c | Markus Armbruster | val = 0;
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303 | c0897e0c | Markus Armbruster | for (i = 0; i < 4; i++) { |
304 | c0897e0c | Markus Armbruster | if (hd_table[i]) {
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305 | c0897e0c | Markus Armbruster | int cylinders, heads, sectors, translation;
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306 | c0897e0c | Markus Armbruster | /* NOTE: bdrv_get_geometry_hint() returns the physical
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307 | c0897e0c | Markus Armbruster | geometry. It is always such that: 1 <= sects <= 63, 1
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308 | c0897e0c | Markus Armbruster | <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
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309 | c0897e0c | Markus Armbruster | geometry can be different if a translation is done. */
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310 | c0897e0c | Markus Armbruster | translation = bdrv_get_translation_hint(hd_table[i]); |
311 | c0897e0c | Markus Armbruster | if (translation == BIOS_ATA_TRANSLATION_AUTO) {
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312 | c0897e0c | Markus Armbruster | bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); |
313 | c0897e0c | Markus Armbruster | if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
314 | c0897e0c | Markus Armbruster | /* No translation. */
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315 | c0897e0c | Markus Armbruster | translation = 0;
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316 | c0897e0c | Markus Armbruster | } else {
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317 | c0897e0c | Markus Armbruster | /* LBA translation. */
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318 | c0897e0c | Markus Armbruster | translation = 1;
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319 | c0897e0c | Markus Armbruster | } |
320 | c0897e0c | Markus Armbruster | } else {
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321 | c0897e0c | Markus Armbruster | translation--; |
322 | c0897e0c | Markus Armbruster | } |
323 | c0897e0c | Markus Armbruster | val |= translation << (i * 2);
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324 | c0897e0c | Markus Armbruster | } |
325 | c0897e0c | Markus Armbruster | } |
326 | c0897e0c | Markus Armbruster | rtc_set_memory(s, 0x39, val);
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327 | c0897e0c | Markus Armbruster | |
328 | c0897e0c | Markus Armbruster | qemu_unregister_reset(pc_cmos_init_late, opaque); |
329 | c0897e0c | Markus Armbruster | } |
330 | c0897e0c | Markus Armbruster | |
331 | 845773ab | Isaku Yamahata | void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
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332 | c0897e0c | Markus Armbruster | const char *boot_device, |
333 | c0897e0c | Markus Armbruster | BusState *idebus0, BusState *idebus1, |
334 | 1d914fa0 | Isaku Yamahata | FDCtrl *floppy_controller, ISADevice *s) |
335 | 80cabfad | bellard | { |
336 | 80cabfad | bellard | int val;
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337 | b41a2cd1 | bellard | int fd0, fd1, nb;
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338 | c0897e0c | Markus Armbruster | static pc_cmos_init_late_arg arg;
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339 | b0a21b53 | bellard | |
340 | b0a21b53 | bellard | /* various important CMOS locations needed by PC/Bochs bios */
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341 | 80cabfad | bellard | |
342 | 80cabfad | bellard | /* memory size */
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343 | 333190eb | bellard | val = 640; /* base memory in K */ |
344 | 333190eb | bellard | rtc_set_memory(s, 0x15, val);
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345 | 333190eb | bellard | rtc_set_memory(s, 0x16, val >> 8); |
346 | 333190eb | bellard | |
347 | 80cabfad | bellard | val = (ram_size / 1024) - 1024; |
348 | 80cabfad | bellard | if (val > 65535) |
349 | 80cabfad | bellard | val = 65535;
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350 | b0a21b53 | bellard | rtc_set_memory(s, 0x17, val);
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351 | b0a21b53 | bellard | rtc_set_memory(s, 0x18, val >> 8); |
352 | b0a21b53 | bellard | rtc_set_memory(s, 0x30, val);
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353 | b0a21b53 | bellard | rtc_set_memory(s, 0x31, val >> 8); |
354 | 80cabfad | bellard | |
355 | 00f82b8a | aurel32 | if (above_4g_mem_size) {
|
356 | 00f82b8a | aurel32 | rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16); |
357 | 00f82b8a | aurel32 | rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24); |
358 | 00f82b8a | aurel32 | rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32); |
359 | 00f82b8a | aurel32 | } |
360 | 00f82b8a | aurel32 | |
361 | 9da98861 | bellard | if (ram_size > (16 * 1024 * 1024)) |
362 | 9da98861 | bellard | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
363 | 9da98861 | bellard | else
|
364 | 9da98861 | bellard | val = 0;
|
365 | 80cabfad | bellard | if (val > 65535) |
366 | 80cabfad | bellard | val = 65535;
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367 | b0a21b53 | bellard | rtc_set_memory(s, 0x34, val);
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368 | b0a21b53 | bellard | rtc_set_memory(s, 0x35, val >> 8); |
369 | 3b46e624 | ths | |
370 | 298e01b6 | aurel32 | /* set the number of CPU */
|
371 | 298e01b6 | aurel32 | rtc_set_memory(s, 0x5f, smp_cpus - 1); |
372 | 298e01b6 | aurel32 | |
373 | 6ac0e82d | balrog | /* set boot devices, and disable floppy signature check if requested */
|
374 | d9346e81 | Markus Armbruster | if (set_boot_dev(s, boot_device, fd_bootchk)) {
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375 | 28c5af54 | j_mayer | exit(1);
|
376 | 28c5af54 | j_mayer | } |
377 | 80cabfad | bellard | |
378 | b41a2cd1 | bellard | /* floppy type */
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379 | b41a2cd1 | bellard | |
380 | baca51fa | bellard | fd0 = fdctrl_get_drive_type(floppy_controller, 0);
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381 | baca51fa | bellard | fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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382 | 80cabfad | bellard | |
383 | 777428f2 | bellard | val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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384 | b0a21b53 | bellard | rtc_set_memory(s, 0x10, val);
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385 | 3b46e624 | ths | |
386 | b0a21b53 | bellard | val = 0;
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387 | b41a2cd1 | bellard | nb = 0;
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388 | 80cabfad | bellard | if (fd0 < 3) |
389 | 80cabfad | bellard | nb++; |
390 | 80cabfad | bellard | if (fd1 < 3) |
391 | 80cabfad | bellard | nb++; |
392 | 80cabfad | bellard | switch (nb) {
|
393 | 80cabfad | bellard | case 0: |
394 | 80cabfad | bellard | break;
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395 | 80cabfad | bellard | case 1: |
396 | b0a21b53 | bellard | val |= 0x01; /* 1 drive, ready for boot */ |
397 | 80cabfad | bellard | break;
|
398 | 80cabfad | bellard | case 2: |
399 | b0a21b53 | bellard | val |= 0x41; /* 2 drives, ready for boot */ |
400 | 80cabfad | bellard | break;
|
401 | 80cabfad | bellard | } |
402 | b0a21b53 | bellard | val |= 0x02; /* FPU is there */ |
403 | b0a21b53 | bellard | val |= 0x04; /* PS/2 mouse installed */ |
404 | b0a21b53 | bellard | rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
405 | b0a21b53 | bellard | |
406 | ba6c2377 | bellard | /* hard drives */
|
407 | c0897e0c | Markus Armbruster | arg.rtc_state = s; |
408 | c0897e0c | Markus Armbruster | arg.idebus0 = idebus0; |
409 | c0897e0c | Markus Armbruster | arg.idebus1 = idebus1; |
410 | c0897e0c | Markus Armbruster | qemu_register_reset(pc_cmos_init_late, &arg); |
411 | 80cabfad | bellard | } |
412 | 80cabfad | bellard | |
413 | 956a3e6b | Blue Swirl | static void handle_a20_line_change(void *opaque, int irq, int level) |
414 | 59b8ad81 | bellard | { |
415 | 956a3e6b | Blue Swirl | CPUState *cpu = opaque; |
416 | e1a23744 | bellard | |
417 | 956a3e6b | Blue Swirl | /* XXX: send to all CPUs ? */
|
418 | 956a3e6b | Blue Swirl | cpu_x86_set_a20(cpu, level); |
419 | e1a23744 | bellard | } |
420 | e1a23744 | bellard | |
421 | 80cabfad | bellard | /***********************************************************/
|
422 | 80cabfad | bellard | /* Bochs BIOS debug ports */
|
423 | 80cabfad | bellard | |
424 | 9596ebb7 | pbrook | static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
425 | 80cabfad | bellard | { |
426 | a2f659ee | bellard | static const char shutdown_str[8] = "Shutdown"; |
427 | a2f659ee | bellard | static int shutdown_index = 0; |
428 | 3b46e624 | ths | |
429 | 80cabfad | bellard | switch(addr) {
|
430 | 80cabfad | bellard | /* Bochs BIOS messages */
|
431 | 80cabfad | bellard | case 0x400: |
432 | 80cabfad | bellard | case 0x401: |
433 | 80cabfad | bellard | fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
|
434 | 80cabfad | bellard | exit(1);
|
435 | 80cabfad | bellard | case 0x402: |
436 | 80cabfad | bellard | case 0x403: |
437 | 80cabfad | bellard | #ifdef DEBUG_BIOS
|
438 | 80cabfad | bellard | fprintf(stderr, "%c", val);
|
439 | 80cabfad | bellard | #endif
|
440 | 80cabfad | bellard | break;
|
441 | a2f659ee | bellard | case 0x8900: |
442 | a2f659ee | bellard | /* same as Bochs power off */
|
443 | a2f659ee | bellard | if (val == shutdown_str[shutdown_index]) {
|
444 | a2f659ee | bellard | shutdown_index++; |
445 | a2f659ee | bellard | if (shutdown_index == 8) { |
446 | a2f659ee | bellard | shutdown_index = 0;
|
447 | a2f659ee | bellard | qemu_system_shutdown_request(); |
448 | a2f659ee | bellard | } |
449 | a2f659ee | bellard | } else {
|
450 | a2f659ee | bellard | shutdown_index = 0;
|
451 | a2f659ee | bellard | } |
452 | a2f659ee | bellard | break;
|
453 | 80cabfad | bellard | |
454 | 80cabfad | bellard | /* LGPL'ed VGA BIOS messages */
|
455 | 80cabfad | bellard | case 0x501: |
456 | 80cabfad | bellard | case 0x502: |
457 | 80cabfad | bellard | fprintf(stderr, "VGA BIOS panic, line %d\n", val);
|
458 | 80cabfad | bellard | exit(1);
|
459 | 80cabfad | bellard | case 0x500: |
460 | 80cabfad | bellard | case 0x503: |
461 | 80cabfad | bellard | #ifdef DEBUG_BIOS
|
462 | 80cabfad | bellard | fprintf(stderr, "%c", val);
|
463 | 80cabfad | bellard | #endif
|
464 | 80cabfad | bellard | break;
|
465 | 80cabfad | bellard | } |
466 | 80cabfad | bellard | } |
467 | 80cabfad | bellard | |
468 | 4c5b10b7 | Jes Sorensen | int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
|
469 | 4c5b10b7 | Jes Sorensen | { |
470 | 4c5b10b7 | Jes Sorensen | int index = e820_table.count;
|
471 | 4c5b10b7 | Jes Sorensen | struct e820_entry *entry;
|
472 | 4c5b10b7 | Jes Sorensen | |
473 | 4c5b10b7 | Jes Sorensen | if (index >= E820_NR_ENTRIES)
|
474 | 4c5b10b7 | Jes Sorensen | return -EBUSY;
|
475 | 4c5b10b7 | Jes Sorensen | entry = &e820_table.entry[index]; |
476 | 4c5b10b7 | Jes Sorensen | |
477 | 4c5b10b7 | Jes Sorensen | entry->address = address; |
478 | 4c5b10b7 | Jes Sorensen | entry->length = length; |
479 | 4c5b10b7 | Jes Sorensen | entry->type = type; |
480 | 4c5b10b7 | Jes Sorensen | |
481 | 4c5b10b7 | Jes Sorensen | e820_table.count++; |
482 | 4c5b10b7 | Jes Sorensen | return e820_table.count;
|
483 | 4c5b10b7 | Jes Sorensen | } |
484 | 4c5b10b7 | Jes Sorensen | |
485 | bf483392 | Alexander Graf | static void *bochs_bios_init(void) |
486 | 80cabfad | bellard | { |
487 | 3cce6243 | blueswir1 | void *fw_cfg;
|
488 | b6f6e3d3 | aliguori | uint8_t *smbios_table; |
489 | b6f6e3d3 | aliguori | size_t smbios_len; |
490 | 11c2fd3e | aliguori | uint64_t *numa_fw_cfg; |
491 | 11c2fd3e | aliguori | int i, j;
|
492 | 3cce6243 | blueswir1 | |
493 | b41a2cd1 | bellard | register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
494 | b41a2cd1 | bellard | register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
495 | b41a2cd1 | bellard | register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
496 | b41a2cd1 | bellard | register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
497 | a2f659ee | bellard | register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
498 | b41a2cd1 | bellard | |
499 | b41a2cd1 | bellard | register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
500 | b41a2cd1 | bellard | register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
501 | b41a2cd1 | bellard | register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
502 | b41a2cd1 | bellard | register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
503 | 3cce6243 | blueswir1 | |
504 | 3cce6243 | blueswir1 | fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0); |
505 | bf483392 | Alexander Graf | |
506 | 3cce6243 | blueswir1 | fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
|
507 | 905fdcb5 | blueswir1 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); |
508 | 80deece2 | blueswir1 | fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables, |
509 | 80deece2 | blueswir1 | acpi_tables_len); |
510 | 6b35e7bf | Jes Sorensen | fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
|
511 | b6f6e3d3 | aliguori | |
512 | b6f6e3d3 | aliguori | smbios_table = smbios_get_table(&smbios_len); |
513 | b6f6e3d3 | aliguori | if (smbios_table)
|
514 | b6f6e3d3 | aliguori | fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES, |
515 | b6f6e3d3 | aliguori | smbios_table, smbios_len); |
516 | 4c5b10b7 | Jes Sorensen | fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, (uint8_t *)&e820_table, |
517 | 4c5b10b7 | Jes Sorensen | sizeof(struct e820_table)); |
518 | 11c2fd3e | aliguori | |
519 | 40ac17cd | Gleb Natapov | fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, (uint8_t *)&hpet_cfg, |
520 | 40ac17cd | Gleb Natapov | sizeof(struct hpet_fw_config)); |
521 | 11c2fd3e | aliguori | /* allocate memory for the NUMA channel: one (64bit) word for the number
|
522 | 11c2fd3e | aliguori | * of nodes, one word for each VCPU->node and one word for each node to
|
523 | 11c2fd3e | aliguori | * hold the amount of memory.
|
524 | 11c2fd3e | aliguori | */
|
525 | 11c2fd3e | aliguori | numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8); |
526 | 11c2fd3e | aliguori | numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
|
527 | 11c2fd3e | aliguori | for (i = 0; i < smp_cpus; i++) { |
528 | 11c2fd3e | aliguori | for (j = 0; j < nb_numa_nodes; j++) { |
529 | 11c2fd3e | aliguori | if (node_cpumask[j] & (1 << i)) { |
530 | 11c2fd3e | aliguori | numa_fw_cfg[i + 1] = cpu_to_le64(j);
|
531 | 11c2fd3e | aliguori | break;
|
532 | 11c2fd3e | aliguori | } |
533 | 11c2fd3e | aliguori | } |
534 | 11c2fd3e | aliguori | } |
535 | 11c2fd3e | aliguori | for (i = 0; i < nb_numa_nodes; i++) { |
536 | 11c2fd3e | aliguori | numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
|
537 | 11c2fd3e | aliguori | } |
538 | 11c2fd3e | aliguori | fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg, |
539 | 11c2fd3e | aliguori | (1 + smp_cpus + nb_numa_nodes) * 8); |
540 | bf483392 | Alexander Graf | |
541 | bf483392 | Alexander Graf | return fw_cfg;
|
542 | 80cabfad | bellard | } |
543 | 80cabfad | bellard | |
544 | 642a4f96 | ths | static long get_file_size(FILE *f) |
545 | 642a4f96 | ths | { |
546 | 642a4f96 | ths | long where, size;
|
547 | 642a4f96 | ths | |
548 | 642a4f96 | ths | /* XXX: on Unix systems, using fstat() probably makes more sense */
|
549 | 642a4f96 | ths | |
550 | 642a4f96 | ths | where = ftell(f); |
551 | 642a4f96 | ths | fseek(f, 0, SEEK_END);
|
552 | 642a4f96 | ths | size = ftell(f); |
553 | 642a4f96 | ths | fseek(f, where, SEEK_SET); |
554 | 642a4f96 | ths | |
555 | 642a4f96 | ths | return size;
|
556 | 642a4f96 | ths | } |
557 | 642a4f96 | ths | |
558 | f16408df | Alexander Graf | static void load_linux(void *fw_cfg, |
559 | 4fc9af53 | aliguori | const char *kernel_filename, |
560 | 642a4f96 | ths | const char *initrd_filename, |
561 | e6ade764 | Glauber Costa | const char *kernel_cmdline, |
562 | 45a50b16 | Gerd Hoffmann | target_phys_addr_t max_ram_size) |
563 | 642a4f96 | ths | { |
564 | 642a4f96 | ths | uint16_t protocol; |
565 | 5cea8590 | Paul Brook | int setup_size, kernel_size, initrd_size = 0, cmdline_size; |
566 | 642a4f96 | ths | uint32_t initrd_max; |
567 | 57a46d05 | Alexander Graf | uint8_t header[8192], *setup, *kernel, *initrd_data;
|
568 | c227f099 | Anthony Liguori | target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
|
569 | 45a50b16 | Gerd Hoffmann | FILE *f; |
570 | bf4e5d92 | Pascal Terjan | char *vmode;
|
571 | 642a4f96 | ths | |
572 | 642a4f96 | ths | /* Align to 16 bytes as a paranoia measure */
|
573 | 642a4f96 | ths | cmdline_size = (strlen(kernel_cmdline)+16) & ~15; |
574 | 642a4f96 | ths | |
575 | 642a4f96 | ths | /* load the kernel header */
|
576 | 642a4f96 | ths | f = fopen(kernel_filename, "rb");
|
577 | 642a4f96 | ths | if (!f || !(kernel_size = get_file_size(f)) ||
|
578 | f16408df | Alexander Graf | fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
|
579 | f16408df | Alexander Graf | MIN(ARRAY_SIZE(header), kernel_size)) { |
580 | 850810d0 | Justin M. Forbes | fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
|
581 | 850810d0 | Justin M. Forbes | kernel_filename, strerror(errno)); |
582 | 642a4f96 | ths | exit(1);
|
583 | 642a4f96 | ths | } |
584 | 642a4f96 | ths | |
585 | 642a4f96 | ths | /* kernel protocol version */
|
586 | bc4edd79 | bellard | #if 0
|
587 | 642a4f96 | ths | fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
|
588 | bc4edd79 | bellard | #endif
|
589 | 642a4f96 | ths | if (ldl_p(header+0x202) == 0x53726448) |
590 | 642a4f96 | ths | protocol = lduw_p(header+0x206);
|
591 | f16408df | Alexander Graf | else {
|
592 | f16408df | Alexander Graf | /* This looks like a multiboot kernel. If it is, let's stop
|
593 | f16408df | Alexander Graf | treating it like a Linux kernel. */
|
594 | 52001445 | Adam Lackorzynski | if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename,
|
595 | 52001445 | Adam Lackorzynski | kernel_cmdline, kernel_size, header)) |
596 | 82663ee2 | Blue Swirl | return;
|
597 | 642a4f96 | ths | protocol = 0;
|
598 | f16408df | Alexander Graf | } |
599 | 642a4f96 | ths | |
600 | 642a4f96 | ths | if (protocol < 0x200 || !(header[0x211] & 0x01)) { |
601 | 642a4f96 | ths | /* Low kernel */
|
602 | a37af289 | blueswir1 | real_addr = 0x90000;
|
603 | a37af289 | blueswir1 | cmdline_addr = 0x9a000 - cmdline_size;
|
604 | a37af289 | blueswir1 | prot_addr = 0x10000;
|
605 | 642a4f96 | ths | } else if (protocol < 0x202) { |
606 | 642a4f96 | ths | /* High but ancient kernel */
|
607 | a37af289 | blueswir1 | real_addr = 0x90000;
|
608 | a37af289 | blueswir1 | cmdline_addr = 0x9a000 - cmdline_size;
|
609 | a37af289 | blueswir1 | prot_addr = 0x100000;
|
610 | 642a4f96 | ths | } else {
|
611 | 642a4f96 | ths | /* High and recent kernel */
|
612 | a37af289 | blueswir1 | real_addr = 0x10000;
|
613 | a37af289 | blueswir1 | cmdline_addr = 0x20000;
|
614 | a37af289 | blueswir1 | prot_addr = 0x100000;
|
615 | 642a4f96 | ths | } |
616 | 642a4f96 | ths | |
617 | bc4edd79 | bellard | #if 0
|
618 | 642a4f96 | ths | fprintf(stderr,
|
619 | 526ccb7a | balrog | "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
|
620 | 526ccb7a | balrog | "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
|
621 | 526ccb7a | balrog | "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
|
622 | a37af289 | blueswir1 | real_addr,
|
623 | a37af289 | blueswir1 | cmdline_addr,
|
624 | a37af289 | blueswir1 | prot_addr);
|
625 | bc4edd79 | bellard | #endif
|
626 | 642a4f96 | ths | |
627 | 642a4f96 | ths | /* highest address for loading the initrd */
|
628 | 642a4f96 | ths | if (protocol >= 0x203) |
629 | 642a4f96 | ths | initrd_max = ldl_p(header+0x22c);
|
630 | 642a4f96 | ths | else
|
631 | 642a4f96 | ths | initrd_max = 0x37ffffff;
|
632 | 642a4f96 | ths | |
633 | e6ade764 | Glauber Costa | if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
|
634 | e6ade764 | Glauber Costa | initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
|
635 | 642a4f96 | ths | |
636 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr); |
637 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1);
|
638 | 57a46d05 | Alexander Graf | fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA, |
639 | 57a46d05 | Alexander Graf | (uint8_t*)strdup(kernel_cmdline), |
640 | 57a46d05 | Alexander Graf | strlen(kernel_cmdline)+1);
|
641 | 642a4f96 | ths | |
642 | 642a4f96 | ths | if (protocol >= 0x202) { |
643 | a37af289 | blueswir1 | stl_p(header+0x228, cmdline_addr);
|
644 | 642a4f96 | ths | } else {
|
645 | 642a4f96 | ths | stw_p(header+0x20, 0xA33F); |
646 | 642a4f96 | ths | stw_p(header+0x22, cmdline_addr-real_addr);
|
647 | 642a4f96 | ths | } |
648 | 642a4f96 | ths | |
649 | bf4e5d92 | Pascal Terjan | /* handle vga= parameter */
|
650 | bf4e5d92 | Pascal Terjan | vmode = strstr(kernel_cmdline, "vga=");
|
651 | bf4e5d92 | Pascal Terjan | if (vmode) {
|
652 | bf4e5d92 | Pascal Terjan | unsigned int video_mode; |
653 | bf4e5d92 | Pascal Terjan | /* skip "vga=" */
|
654 | bf4e5d92 | Pascal Terjan | vmode += 4;
|
655 | bf4e5d92 | Pascal Terjan | if (!strncmp(vmode, "normal", 6)) { |
656 | bf4e5d92 | Pascal Terjan | video_mode = 0xffff;
|
657 | bf4e5d92 | Pascal Terjan | } else if (!strncmp(vmode, "ext", 3)) { |
658 | bf4e5d92 | Pascal Terjan | video_mode = 0xfffe;
|
659 | bf4e5d92 | Pascal Terjan | } else if (!strncmp(vmode, "ask", 3)) { |
660 | bf4e5d92 | Pascal Terjan | video_mode = 0xfffd;
|
661 | bf4e5d92 | Pascal Terjan | } else {
|
662 | bf4e5d92 | Pascal Terjan | video_mode = strtol(vmode, NULL, 0); |
663 | bf4e5d92 | Pascal Terjan | } |
664 | bf4e5d92 | Pascal Terjan | stw_p(header+0x1fa, video_mode);
|
665 | bf4e5d92 | Pascal Terjan | } |
666 | bf4e5d92 | Pascal Terjan | |
667 | 642a4f96 | ths | /* loader type */
|
668 | 642a4f96 | ths | /* High nybble = B reserved for Qemu; low nybble is revision number.
|
669 | 642a4f96 | ths | If this code is substantially changed, you may want to consider
|
670 | 642a4f96 | ths | incrementing the revision. */
|
671 | 642a4f96 | ths | if (protocol >= 0x200) |
672 | 642a4f96 | ths | header[0x210] = 0xB0; |
673 | 642a4f96 | ths | |
674 | 642a4f96 | ths | /* heap */
|
675 | 642a4f96 | ths | if (protocol >= 0x201) { |
676 | 642a4f96 | ths | header[0x211] |= 0x80; /* CAN_USE_HEAP */ |
677 | 642a4f96 | ths | stw_p(header+0x224, cmdline_addr-real_addr-0x200); |
678 | 642a4f96 | ths | } |
679 | 642a4f96 | ths | |
680 | 642a4f96 | ths | /* load initrd */
|
681 | 642a4f96 | ths | if (initrd_filename) {
|
682 | 642a4f96 | ths | if (protocol < 0x200) { |
683 | 642a4f96 | ths | fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
|
684 | 642a4f96 | ths | exit(1);
|
685 | 642a4f96 | ths | } |
686 | 642a4f96 | ths | |
687 | 45a50b16 | Gerd Hoffmann | initrd_size = get_image_size(initrd_filename); |
688 | d6fa4b77 | M. Mohan Kumar | if (initrd_size < 0) { |
689 | d6fa4b77 | M. Mohan Kumar | fprintf(stderr, "qemu: error reading initrd %s\n",
|
690 | d6fa4b77 | M. Mohan Kumar | initrd_filename); |
691 | d6fa4b77 | M. Mohan Kumar | exit(1);
|
692 | d6fa4b77 | M. Mohan Kumar | } |
693 | d6fa4b77 | M. Mohan Kumar | |
694 | 45a50b16 | Gerd Hoffmann | initrd_addr = (initrd_max-initrd_size) & ~4095;
|
695 | 57a46d05 | Alexander Graf | |
696 | 57a46d05 | Alexander Graf | initrd_data = qemu_malloc(initrd_size); |
697 | 57a46d05 | Alexander Graf | load_image(initrd_filename, initrd_data); |
698 | 57a46d05 | Alexander Graf | |
699 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr); |
700 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); |
701 | 57a46d05 | Alexander Graf | fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size); |
702 | 642a4f96 | ths | |
703 | a37af289 | blueswir1 | stl_p(header+0x218, initrd_addr);
|
704 | 642a4f96 | ths | stl_p(header+0x21c, initrd_size);
|
705 | 642a4f96 | ths | } |
706 | 642a4f96 | ths | |
707 | 45a50b16 | Gerd Hoffmann | /* load kernel and setup */
|
708 | 642a4f96 | ths | setup_size = header[0x1f1];
|
709 | 642a4f96 | ths | if (setup_size == 0) |
710 | 642a4f96 | ths | setup_size = 4;
|
711 | 642a4f96 | ths | setup_size = (setup_size+1)*512; |
712 | 45a50b16 | Gerd Hoffmann | kernel_size -= setup_size; |
713 | 642a4f96 | ths | |
714 | 45a50b16 | Gerd Hoffmann | setup = qemu_malloc(setup_size); |
715 | 45a50b16 | Gerd Hoffmann | kernel = qemu_malloc(kernel_size); |
716 | 45a50b16 | Gerd Hoffmann | fseek(f, 0, SEEK_SET);
|
717 | 5a41ecc5 | Kirill A. Shutemov | if (fread(setup, 1, setup_size, f) != setup_size) { |
718 | 5a41ecc5 | Kirill A. Shutemov | fprintf(stderr, "fread() failed\n");
|
719 | 5a41ecc5 | Kirill A. Shutemov | exit(1);
|
720 | 5a41ecc5 | Kirill A. Shutemov | } |
721 | 5a41ecc5 | Kirill A. Shutemov | if (fread(kernel, 1, kernel_size, f) != kernel_size) { |
722 | 5a41ecc5 | Kirill A. Shutemov | fprintf(stderr, "fread() failed\n");
|
723 | 5a41ecc5 | Kirill A. Shutemov | exit(1);
|
724 | 5a41ecc5 | Kirill A. Shutemov | } |
725 | 642a4f96 | ths | fclose(f); |
726 | 45a50b16 | Gerd Hoffmann | memcpy(setup, header, MIN(sizeof(header), setup_size));
|
727 | 57a46d05 | Alexander Graf | |
728 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr); |
729 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); |
730 | 57a46d05 | Alexander Graf | fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size); |
731 | 57a46d05 | Alexander Graf | |
732 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr); |
733 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size); |
734 | 57a46d05 | Alexander Graf | fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size); |
735 | 57a46d05 | Alexander Graf | |
736 | 57a46d05 | Alexander Graf | option_rom[nb_option_roms] = "linuxboot.bin";
|
737 | 57a46d05 | Alexander Graf | nb_option_roms++; |
738 | 642a4f96 | ths | } |
739 | 642a4f96 | ths | |
740 | b41a2cd1 | bellard | #define NE2000_NB_MAX 6 |
741 | b41a2cd1 | bellard | |
742 | 675d6f82 | Blue Swirl | static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, |
743 | 675d6f82 | Blue Swirl | 0x280, 0x380 }; |
744 | 675d6f82 | Blue Swirl | static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
745 | b41a2cd1 | bellard | |
746 | 675d6f82 | Blue Swirl | static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
747 | 675d6f82 | Blue Swirl | static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
748 | 6508fe59 | bellard | |
749 | 845773ab | Isaku Yamahata | void pc_audio_init (PCIBus *pci_bus, qemu_irq *pic)
|
750 | 6a36d84e | bellard | { |
751 | 6a36d84e | bellard | struct soundhw *c;
|
752 | 6a36d84e | bellard | |
753 | 3a8bae3e | malc | for (c = soundhw; c->name; ++c) {
|
754 | 3a8bae3e | malc | if (c->enabled) {
|
755 | 3a8bae3e | malc | if (c->isa) {
|
756 | 3a8bae3e | malc | c->init.init_isa(pic); |
757 | 3a8bae3e | malc | } else {
|
758 | 3a8bae3e | malc | if (pci_bus) {
|
759 | 3a8bae3e | malc | c->init.init_pci(pci_bus); |
760 | 6a36d84e | bellard | } |
761 | 6a36d84e | bellard | } |
762 | 6a36d84e | bellard | } |
763 | 6a36d84e | bellard | } |
764 | 6a36d84e | bellard | } |
765 | 6a36d84e | bellard | |
766 | 845773ab | Isaku Yamahata | void pc_init_ne2k_isa(NICInfo *nd)
|
767 | a41b2ff2 | pbrook | { |
768 | a41b2ff2 | pbrook | static int nb_ne2k = 0; |
769 | a41b2ff2 | pbrook | |
770 | a41b2ff2 | pbrook | if (nb_ne2k == NE2000_NB_MAX)
|
771 | a41b2ff2 | pbrook | return;
|
772 | 3a38d437 | Jes Sorensen | isa_ne2000_init(ne2000_io[nb_ne2k], |
773 | 9453c5bc | Gerd Hoffmann | ne2000_irq[nb_ne2k], nd); |
774 | a41b2ff2 | pbrook | nb_ne2k++; |
775 | a41b2ff2 | pbrook | } |
776 | a41b2ff2 | pbrook | |
777 | 678e12cc | Gleb Natapov | int cpu_is_bsp(CPUState *env)
|
778 | 678e12cc | Gleb Natapov | { |
779 | 6cb2996c | Jan Kiszka | /* We hard-wire the BSP to the first CPU. */
|
780 | 6cb2996c | Jan Kiszka | return env->cpu_index == 0; |
781 | 678e12cc | Gleb Natapov | } |
782 | 678e12cc | Gleb Natapov | |
783 | 92a16d7a | Blue Swirl | DeviceState *cpu_get_current_apic(void)
|
784 | 0e26b7b8 | Blue Swirl | { |
785 | 0e26b7b8 | Blue Swirl | if (cpu_single_env) {
|
786 | 0e26b7b8 | Blue Swirl | return cpu_single_env->apic_state;
|
787 | 0e26b7b8 | Blue Swirl | } else {
|
788 | 0e26b7b8 | Blue Swirl | return NULL; |
789 | 0e26b7b8 | Blue Swirl | } |
790 | 0e26b7b8 | Blue Swirl | } |
791 | 0e26b7b8 | Blue Swirl | |
792 | 92a16d7a | Blue Swirl | static DeviceState *apic_init(void *env, uint8_t apic_id) |
793 | 92a16d7a | Blue Swirl | { |
794 | 92a16d7a | Blue Swirl | DeviceState *dev; |
795 | 92a16d7a | Blue Swirl | SysBusDevice *d; |
796 | 92a16d7a | Blue Swirl | static int apic_mapped; |
797 | 92a16d7a | Blue Swirl | |
798 | 92a16d7a | Blue Swirl | dev = qdev_create(NULL, "apic"); |
799 | 92a16d7a | Blue Swirl | qdev_prop_set_uint8(dev, "id", apic_id);
|
800 | 92a16d7a | Blue Swirl | qdev_prop_set_ptr(dev, "cpu_env", env);
|
801 | 92a16d7a | Blue Swirl | qdev_init_nofail(dev); |
802 | 92a16d7a | Blue Swirl | d = sysbus_from_qdev(dev); |
803 | 92a16d7a | Blue Swirl | |
804 | 92a16d7a | Blue Swirl | /* XXX: mapping more APICs at the same memory location */
|
805 | 92a16d7a | Blue Swirl | if (apic_mapped == 0) { |
806 | 92a16d7a | Blue Swirl | /* NOTE: the APIC is directly connected to the CPU - it is not
|
807 | 92a16d7a | Blue Swirl | on the global memory bus. */
|
808 | 92a16d7a | Blue Swirl | /* XXX: what if the base changes? */
|
809 | 92a16d7a | Blue Swirl | sysbus_mmio_map(d, 0, MSI_ADDR_BASE);
|
810 | 92a16d7a | Blue Swirl | apic_mapped = 1;
|
811 | 92a16d7a | Blue Swirl | } |
812 | 92a16d7a | Blue Swirl | |
813 | 92a16d7a | Blue Swirl | msix_supported = 1;
|
814 | 92a16d7a | Blue Swirl | |
815 | 92a16d7a | Blue Swirl | return dev;
|
816 | 92a16d7a | Blue Swirl | } |
817 | 92a16d7a | Blue Swirl | |
818 | 53b67b30 | Blue Swirl | /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
|
819 | 53b67b30 | Blue Swirl | BIOS will read it and start S3 resume at POST Entry */
|
820 | 845773ab | Isaku Yamahata | void pc_cmos_set_s3_resume(void *opaque, int irq, int level) |
821 | 53b67b30 | Blue Swirl | { |
822 | 1d914fa0 | Isaku Yamahata | ISADevice *s = opaque; |
823 | 53b67b30 | Blue Swirl | |
824 | 53b67b30 | Blue Swirl | if (level) {
|
825 | 53b67b30 | Blue Swirl | rtc_set_memory(s, 0xF, 0xFE); |
826 | 53b67b30 | Blue Swirl | } |
827 | 53b67b30 | Blue Swirl | } |
828 | 53b67b30 | Blue Swirl | |
829 | 845773ab | Isaku Yamahata | void pc_acpi_smi_interrupt(void *opaque, int irq, int level) |
830 | 53b67b30 | Blue Swirl | { |
831 | 53b67b30 | Blue Swirl | CPUState *s = opaque; |
832 | 53b67b30 | Blue Swirl | |
833 | 53b67b30 | Blue Swirl | if (level) {
|
834 | 53b67b30 | Blue Swirl | cpu_interrupt(s, CPU_INTERRUPT_SMI); |
835 | 53b67b30 | Blue Swirl | } |
836 | 53b67b30 | Blue Swirl | } |
837 | 53b67b30 | Blue Swirl | |
838 | 427bd8d6 | Jan Kiszka | static void pc_cpu_reset(void *opaque) |
839 | 0e26b7b8 | Blue Swirl | { |
840 | 0e26b7b8 | Blue Swirl | CPUState *env = opaque; |
841 | 0e26b7b8 | Blue Swirl | |
842 | 0e26b7b8 | Blue Swirl | cpu_reset(env); |
843 | 427bd8d6 | Jan Kiszka | env->halted = !cpu_is_bsp(env); |
844 | 0e26b7b8 | Blue Swirl | } |
845 | 0e26b7b8 | Blue Swirl | |
846 | 3a31f36a | Jan Kiszka | static CPUState *pc_new_cpu(const char *cpu_model) |
847 | 3a31f36a | Jan Kiszka | { |
848 | 3a31f36a | Jan Kiszka | CPUState *env; |
849 | 3a31f36a | Jan Kiszka | |
850 | 3a31f36a | Jan Kiszka | env = cpu_init(cpu_model); |
851 | 3a31f36a | Jan Kiszka | if (!env) {
|
852 | 3a31f36a | Jan Kiszka | fprintf(stderr, "Unable to find x86 CPU definition\n");
|
853 | 3a31f36a | Jan Kiszka | exit(1);
|
854 | 3a31f36a | Jan Kiszka | } |
855 | 3a31f36a | Jan Kiszka | if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) { |
856 | 3a31f36a | Jan Kiszka | env->cpuid_apic_id = env->cpu_index; |
857 | 0e26b7b8 | Blue Swirl | env->apic_state = apic_init(env, env->cpuid_apic_id); |
858 | 0e26b7b8 | Blue Swirl | } |
859 | 427bd8d6 | Jan Kiszka | qemu_register_reset(pc_cpu_reset, env); |
860 | 427bd8d6 | Jan Kiszka | pc_cpu_reset(env); |
861 | 3a31f36a | Jan Kiszka | return env;
|
862 | 3a31f36a | Jan Kiszka | } |
863 | 3a31f36a | Jan Kiszka | |
864 | 845773ab | Isaku Yamahata | void pc_cpus_init(const char *cpu_model) |
865 | 70166477 | Isaku Yamahata | { |
866 | 70166477 | Isaku Yamahata | int i;
|
867 | 70166477 | Isaku Yamahata | |
868 | 70166477 | Isaku Yamahata | /* init CPUs */
|
869 | 70166477 | Isaku Yamahata | if (cpu_model == NULL) { |
870 | 70166477 | Isaku Yamahata | #ifdef TARGET_X86_64
|
871 | 70166477 | Isaku Yamahata | cpu_model = "qemu64";
|
872 | 70166477 | Isaku Yamahata | #else
|
873 | 70166477 | Isaku Yamahata | cpu_model = "qemu32";
|
874 | 70166477 | Isaku Yamahata | #endif
|
875 | 70166477 | Isaku Yamahata | } |
876 | 70166477 | Isaku Yamahata | |
877 | 70166477 | Isaku Yamahata | for(i = 0; i < smp_cpus; i++) { |
878 | 70166477 | Isaku Yamahata | pc_new_cpu(cpu_model); |
879 | 70166477 | Isaku Yamahata | } |
880 | 70166477 | Isaku Yamahata | } |
881 | 70166477 | Isaku Yamahata | |
882 | 845773ab | Isaku Yamahata | void pc_memory_init(ram_addr_t ram_size,
|
883 | 845773ab | Isaku Yamahata | const char *kernel_filename, |
884 | 845773ab | Isaku Yamahata | const char *kernel_cmdline, |
885 | 845773ab | Isaku Yamahata | const char *initrd_filename, |
886 | 845773ab | Isaku Yamahata | ram_addr_t *below_4g_mem_size_p, |
887 | 845773ab | Isaku Yamahata | ram_addr_t *above_4g_mem_size_p) |
888 | 80cabfad | bellard | { |
889 | 5cea8590 | Paul Brook | char *filename;
|
890 | 642a4f96 | ths | int ret, linux_boot, i;
|
891 | c227f099 | Anthony Liguori | ram_addr_t ram_addr, bios_offset, option_rom_offset; |
892 | c227f099 | Anthony Liguori | ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
|
893 | 45a50b16 | Gerd Hoffmann | int bios_size, isa_bios_size;
|
894 | 81a204e4 | Eduard - Gabriel Munteanu | void *fw_cfg;
|
895 | d592d303 | bellard | |
896 | 00f82b8a | aurel32 | if (ram_size >= 0xe0000000 ) { |
897 | 00f82b8a | aurel32 | above_4g_mem_size = ram_size - 0xe0000000;
|
898 | 00f82b8a | aurel32 | below_4g_mem_size = 0xe0000000;
|
899 | 00f82b8a | aurel32 | } else {
|
900 | 00f82b8a | aurel32 | below_4g_mem_size = ram_size; |
901 | 00f82b8a | aurel32 | } |
902 | 3d53f5c3 | Isaku Yamahata | *above_4g_mem_size_p = above_4g_mem_size; |
903 | 3d53f5c3 | Isaku Yamahata | *below_4g_mem_size_p = below_4g_mem_size; |
904 | 00f82b8a | aurel32 | |
905 | 44ae28f3 | Alex Williamson | #if TARGET_PHYS_ADDR_BITS == 32 |
906 | 44ae28f3 | Alex Williamson | if (above_4g_mem_size > 0) { |
907 | 44ae28f3 | Alex Williamson | hw_error("To much RAM for 32-bit physical address");
|
908 | 44ae28f3 | Alex Williamson | } |
909 | 44ae28f3 | Alex Williamson | #endif
|
910 | 80cabfad | bellard | linux_boot = (kernel_filename != NULL);
|
911 | 80cabfad | bellard | |
912 | 80cabfad | bellard | /* allocate RAM */
|
913 | 1724f049 | Alex Williamson | ram_addr = qemu_ram_alloc(NULL, "pc.ram", |
914 | 1724f049 | Alex Williamson | below_4g_mem_size + above_4g_mem_size); |
915 | 82b36dc3 | aliguori | cpu_register_physical_memory(0, 0xa0000, ram_addr); |
916 | 82b36dc3 | aliguori | cpu_register_physical_memory(0x100000,
|
917 | 82b36dc3 | aliguori | below_4g_mem_size - 0x100000,
|
918 | 60e4c631 | Avi Kivity | ram_addr + 0x100000);
|
919 | 44ae28f3 | Alex Williamson | #if TARGET_PHYS_ADDR_BITS > 32 |
920 | bbe80adf | Alex Williamson | if (above_4g_mem_size > 0) { |
921 | bbe80adf | Alex Williamson | cpu_register_physical_memory(0x100000000ULL, above_4g_mem_size,
|
922 | bbe80adf | Alex Williamson | ram_addr + below_4g_mem_size); |
923 | bbe80adf | Alex Williamson | } |
924 | 8a637d44 | Paul Brook | #endif
|
925 | 82b36dc3 | aliguori | |
926 | 970ac5a3 | bellard | /* BIOS load */
|
927 | 1192dad8 | j_mayer | if (bios_name == NULL) |
928 | 1192dad8 | j_mayer | bios_name = BIOS_FILENAME; |
929 | 5cea8590 | Paul Brook | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
930 | 5cea8590 | Paul Brook | if (filename) {
|
931 | 5cea8590 | Paul Brook | bios_size = get_image_size(filename); |
932 | 5cea8590 | Paul Brook | } else {
|
933 | 5cea8590 | Paul Brook | bios_size = -1;
|
934 | 5cea8590 | Paul Brook | } |
935 | 5fafdf24 | ths | if (bios_size <= 0 || |
936 | 970ac5a3 | bellard | (bios_size % 65536) != 0) { |
937 | 7587cf44 | bellard | goto bios_error;
|
938 | 7587cf44 | bellard | } |
939 | 1724f049 | Alex Williamson | bios_offset = qemu_ram_alloc(NULL, "pc.bios", bios_size); |
940 | 51edd4e6 | Gerd Hoffmann | ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size)); |
941 | 51edd4e6 | Gerd Hoffmann | if (ret != 0) { |
942 | 7587cf44 | bellard | bios_error:
|
943 | 5cea8590 | Paul Brook | fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
|
944 | 80cabfad | bellard | exit(1);
|
945 | 80cabfad | bellard | } |
946 | 5cea8590 | Paul Brook | if (filename) {
|
947 | 5cea8590 | Paul Brook | qemu_free(filename); |
948 | 5cea8590 | Paul Brook | } |
949 | 7587cf44 | bellard | /* map the last 128KB of the BIOS in ISA space */
|
950 | 7587cf44 | bellard | isa_bios_size = bios_size; |
951 | 7587cf44 | bellard | if (isa_bios_size > (128 * 1024)) |
952 | 7587cf44 | bellard | isa_bios_size = 128 * 1024; |
953 | 5fafdf24 | ths | cpu_register_physical_memory(0x100000 - isa_bios_size,
|
954 | 5fafdf24 | ths | isa_bios_size, |
955 | 7587cf44 | bellard | (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
956 | 9ae02555 | ths | |
957 | 1724f049 | Alex Williamson | option_rom_offset = qemu_ram_alloc(NULL, "pc.rom", PC_ROM_SIZE); |
958 | 45a50b16 | Gerd Hoffmann | cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset); |
959 | f753ff16 | pbrook | |
960 | 1d108d97 | Alexander Graf | /* map all the bios at the top of memory */
|
961 | 1d108d97 | Alexander Graf | cpu_register_physical_memory((uint32_t)(-bios_size), |
962 | 1d108d97 | Alexander Graf | bios_size, bios_offset | IO_MEM_ROM); |
963 | 1d108d97 | Alexander Graf | |
964 | bf483392 | Alexander Graf | fw_cfg = bochs_bios_init(); |
965 | 8832cb80 | Gerd Hoffmann | rom_set_fw(fw_cfg); |
966 | 1d108d97 | Alexander Graf | |
967 | f753ff16 | pbrook | if (linux_boot) {
|
968 | 81a204e4 | Eduard - Gabriel Munteanu | load_linux(fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size); |
969 | f753ff16 | pbrook | } |
970 | f753ff16 | pbrook | |
971 | f753ff16 | pbrook | for (i = 0; i < nb_option_roms; i++) { |
972 | 45a50b16 | Gerd Hoffmann | rom_add_option(option_rom[i]); |
973 | 406c8df3 | Glauber Costa | } |
974 | 3d53f5c3 | Isaku Yamahata | } |
975 | 3d53f5c3 | Isaku Yamahata | |
976 | 845773ab | Isaku Yamahata | qemu_irq *pc_allocate_cpu_irq(void)
|
977 | 845773ab | Isaku Yamahata | { |
978 | 845773ab | Isaku Yamahata | return qemu_allocate_irqs(pic_irq_request, NULL, 1); |
979 | 845773ab | Isaku Yamahata | } |
980 | 845773ab | Isaku Yamahata | |
981 | 845773ab | Isaku Yamahata | void pc_vga_init(PCIBus *pci_bus)
|
982 | 765d7908 | Isaku Yamahata | { |
983 | 765d7908 | Isaku Yamahata | if (cirrus_vga_enabled) {
|
984 | 765d7908 | Isaku Yamahata | if (pci_bus) {
|
985 | 765d7908 | Isaku Yamahata | pci_cirrus_vga_init(pci_bus); |
986 | 765d7908 | Isaku Yamahata | } else {
|
987 | 765d7908 | Isaku Yamahata | isa_cirrus_vga_init(); |
988 | 765d7908 | Isaku Yamahata | } |
989 | 765d7908 | Isaku Yamahata | } else if (vmsvga_enabled) { |
990 | 765d7908 | Isaku Yamahata | if (pci_bus)
|
991 | 765d7908 | Isaku Yamahata | pci_vmsvga_init(pci_bus); |
992 | 765d7908 | Isaku Yamahata | else
|
993 | 765d7908 | Isaku Yamahata | fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
|
994 | 765d7908 | Isaku Yamahata | } else if (std_vga_enabled) { |
995 | 765d7908 | Isaku Yamahata | if (pci_bus) {
|
996 | 78895427 | Gerd Hoffmann | pci_vga_init(pci_bus); |
997 | 765d7908 | Isaku Yamahata | } else {
|
998 | 765d7908 | Isaku Yamahata | isa_vga_init(); |
999 | 765d7908 | Isaku Yamahata | } |
1000 | 765d7908 | Isaku Yamahata | } |
1001 | 765d7908 | Isaku Yamahata | } |
1002 | 765d7908 | Isaku Yamahata | |
1003 | 4556bd8b | Blue Swirl | static void cpu_request_exit(void *opaque, int irq, int level) |
1004 | 4556bd8b | Blue Swirl | { |
1005 | 4556bd8b | Blue Swirl | CPUState *env = cpu_single_env; |
1006 | 4556bd8b | Blue Swirl | |
1007 | 4556bd8b | Blue Swirl | if (env && level) {
|
1008 | 4556bd8b | Blue Swirl | cpu_exit(env); |
1009 | 4556bd8b | Blue Swirl | } |
1010 | 4556bd8b | Blue Swirl | } |
1011 | 4556bd8b | Blue Swirl | |
1012 | 845773ab | Isaku Yamahata | void pc_basic_device_init(qemu_irq *isa_irq,
|
1013 | 845773ab | Isaku Yamahata | FDCtrl **floppy_controller, |
1014 | 1d914fa0 | Isaku Yamahata | ISADevice **rtc_state) |
1015 | ffe513da | Isaku Yamahata | { |
1016 | ffe513da | Isaku Yamahata | int i;
|
1017 | ffe513da | Isaku Yamahata | DriveInfo *fd[MAX_FD]; |
1018 | ffe513da | Isaku Yamahata | PITState *pit; |
1019 | 7d932dfd | Jan Kiszka | qemu_irq rtc_irq = NULL;
|
1020 | 956a3e6b | Blue Swirl | qemu_irq *a20_line; |
1021 | 956a3e6b | Blue Swirl | ISADevice *i8042; |
1022 | 4556bd8b | Blue Swirl | qemu_irq *cpu_exit_irq; |
1023 | ffe513da | Isaku Yamahata | |
1024 | ffe513da | Isaku Yamahata | register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
1025 | ffe513da | Isaku Yamahata | |
1026 | ffe513da | Isaku Yamahata | register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
1027 | ffe513da | Isaku Yamahata | |
1028 | ffe513da | Isaku Yamahata | if (!no_hpet) {
|
1029 | 822557eb | Jan Kiszka | DeviceState *hpet = sysbus_create_simple("hpet", HPET_BASE, NULL); |
1030 | 822557eb | Jan Kiszka | |
1031 | 822557eb | Jan Kiszka | for (i = 0; i < 24; i++) { |
1032 | 822557eb | Jan Kiszka | sysbus_connect_irq(sysbus_from_qdev(hpet), i, isa_irq[i]); |
1033 | 822557eb | Jan Kiszka | } |
1034 | 7d932dfd | Jan Kiszka | rtc_irq = qdev_get_gpio_in(hpet, 0);
|
1035 | ffe513da | Isaku Yamahata | } |
1036 | 7d932dfd | Jan Kiszka | *rtc_state = rtc_init(2000, rtc_irq);
|
1037 | 7d932dfd | Jan Kiszka | |
1038 | 7d932dfd | Jan Kiszka | qemu_register_boot_set(pc_boot_set, *rtc_state); |
1039 | 7d932dfd | Jan Kiszka | |
1040 | 7d932dfd | Jan Kiszka | pit = pit_init(0x40, isa_reserve_irq(0)); |
1041 | 7d932dfd | Jan Kiszka | pcspk_init(pit); |
1042 | ffe513da | Isaku Yamahata | |
1043 | ffe513da | Isaku Yamahata | for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
1044 | ffe513da | Isaku Yamahata | if (serial_hds[i]) {
|
1045 | ffe513da | Isaku Yamahata | serial_isa_init(i, serial_hds[i]); |
1046 | ffe513da | Isaku Yamahata | } |
1047 | ffe513da | Isaku Yamahata | } |
1048 | ffe513da | Isaku Yamahata | |
1049 | ffe513da | Isaku Yamahata | for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
1050 | ffe513da | Isaku Yamahata | if (parallel_hds[i]) {
|
1051 | ffe513da | Isaku Yamahata | parallel_init(i, parallel_hds[i]); |
1052 | ffe513da | Isaku Yamahata | } |
1053 | ffe513da | Isaku Yamahata | } |
1054 | ffe513da | Isaku Yamahata | |
1055 | 956a3e6b | Blue Swirl | a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 1);
|
1056 | 956a3e6b | Blue Swirl | i8042 = isa_create_simple("i8042");
|
1057 | 956a3e6b | Blue Swirl | i8042_setup_a20_line(i8042, a20_line); |
1058 | 956a3e6b | Blue Swirl | vmmouse_init(i8042); |
1059 | 956a3e6b | Blue Swirl | |
1060 | 4556bd8b | Blue Swirl | cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1); |
1061 | 4556bd8b | Blue Swirl | DMA_init(0, cpu_exit_irq);
|
1062 | ffe513da | Isaku Yamahata | |
1063 | ffe513da | Isaku Yamahata | for(i = 0; i < MAX_FD; i++) { |
1064 | ffe513da | Isaku Yamahata | fd[i] = drive_get(IF_FLOPPY, 0, i);
|
1065 | ffe513da | Isaku Yamahata | } |
1066 | ffe513da | Isaku Yamahata | *floppy_controller = fdctrl_init_isa(fd); |
1067 | ffe513da | Isaku Yamahata | } |
1068 | ffe513da | Isaku Yamahata | |
1069 | 845773ab | Isaku Yamahata | void pc_pci_device_init(PCIBus *pci_bus)
|
1070 | e3a5cf42 | Isaku Yamahata | { |
1071 | e3a5cf42 | Isaku Yamahata | int max_bus;
|
1072 | e3a5cf42 | Isaku Yamahata | int bus;
|
1073 | e3a5cf42 | Isaku Yamahata | |
1074 | e3a5cf42 | Isaku Yamahata | max_bus = drive_get_max_bus(IF_SCSI); |
1075 | e3a5cf42 | Isaku Yamahata | for (bus = 0; bus <= max_bus; bus++) { |
1076 | e3a5cf42 | Isaku Yamahata | pci_create_simple(pci_bus, -1, "lsi53c895a"); |
1077 | e3a5cf42 | Isaku Yamahata | } |
1078 | e3a5cf42 | Isaku Yamahata | } |