root / hw / mc146818rtc.c @ 977d5710
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1 | 80cabfad | bellard | /*
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2 | 80cabfad | bellard | * QEMU MC146818 RTC emulation
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3 | 80cabfad | bellard | *
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4 | 80cabfad | bellard | * Copyright (c) 2003-2004 Fabrice Bellard
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5 | 80cabfad | bellard | *
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6 | 80cabfad | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 80cabfad | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 80cabfad | bellard | * in the Software without restriction, including without limitation the rights
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9 | 80cabfad | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 80cabfad | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 80cabfad | bellard | * furnished to do so, subject to the following conditions:
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12 | 80cabfad | bellard | *
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13 | 80cabfad | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 80cabfad | bellard | * all copies or substantial portions of the Software.
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15 | 80cabfad | bellard | *
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16 | 80cabfad | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 80cabfad | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 80cabfad | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 80cabfad | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 80cabfad | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 80cabfad | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 80cabfad | bellard | * THE SOFTWARE.
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23 | 80cabfad | bellard | */
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24 | 80cabfad | bellard | #include "vl.h" |
25 | 80cabfad | bellard | |
26 | 80cabfad | bellard | //#define DEBUG_CMOS
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27 | 80cabfad | bellard | |
28 | 80cabfad | bellard | #define RTC_SECONDS 0 |
29 | 80cabfad | bellard | #define RTC_SECONDS_ALARM 1 |
30 | 80cabfad | bellard | #define RTC_MINUTES 2 |
31 | 80cabfad | bellard | #define RTC_MINUTES_ALARM 3 |
32 | 80cabfad | bellard | #define RTC_HOURS 4 |
33 | 80cabfad | bellard | #define RTC_HOURS_ALARM 5 |
34 | 80cabfad | bellard | #define RTC_ALARM_DONT_CARE 0xC0 |
35 | 80cabfad | bellard | |
36 | 80cabfad | bellard | #define RTC_DAY_OF_WEEK 6 |
37 | 80cabfad | bellard | #define RTC_DAY_OF_MONTH 7 |
38 | 80cabfad | bellard | #define RTC_MONTH 8 |
39 | 80cabfad | bellard | #define RTC_YEAR 9 |
40 | 80cabfad | bellard | |
41 | 80cabfad | bellard | #define RTC_REG_A 10 |
42 | 80cabfad | bellard | #define RTC_REG_B 11 |
43 | 80cabfad | bellard | #define RTC_REG_C 12 |
44 | 80cabfad | bellard | #define RTC_REG_D 13 |
45 | 80cabfad | bellard | |
46 | dff38e7b | bellard | #define REG_A_UIP 0x80 |
47 | 80cabfad | bellard | |
48 | dff38e7b | bellard | #define REG_B_SET 0x80 |
49 | dff38e7b | bellard | #define REG_B_PIE 0x40 |
50 | dff38e7b | bellard | #define REG_B_AIE 0x20 |
51 | dff38e7b | bellard | #define REG_B_UIE 0x10 |
52 | dff38e7b | bellard | |
53 | dff38e7b | bellard | struct RTCState {
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54 | dff38e7b | bellard | uint8_t cmos_data[128];
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55 | dff38e7b | bellard | uint8_t cmos_index; |
56 | 43f493af | bellard | struct tm current_tm;
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57 | dff38e7b | bellard | int irq;
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58 | dff38e7b | bellard | /* periodic timer */
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59 | dff38e7b | bellard | QEMUTimer *periodic_timer; |
60 | dff38e7b | bellard | int64_t next_periodic_time; |
61 | dff38e7b | bellard | /* second update */
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62 | dff38e7b | bellard | int64_t next_second_time; |
63 | dff38e7b | bellard | QEMUTimer *second_timer; |
64 | dff38e7b | bellard | QEMUTimer *second_timer2; |
65 | dff38e7b | bellard | }; |
66 | dff38e7b | bellard | |
67 | dff38e7b | bellard | static void rtc_set_time(RTCState *s); |
68 | dff38e7b | bellard | static void rtc_copy_date(RTCState *s); |
69 | dff38e7b | bellard | |
70 | dff38e7b | bellard | static void rtc_timer_update(RTCState *s, int64_t current_time) |
71 | dff38e7b | bellard | { |
72 | dff38e7b | bellard | int period_code, period;
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73 | dff38e7b | bellard | int64_t cur_clock, next_irq_clock; |
74 | dff38e7b | bellard | |
75 | dff38e7b | bellard | period_code = s->cmos_data[RTC_REG_A] & 0x0f;
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76 | dff38e7b | bellard | if (period_code != 0 && |
77 | dff38e7b | bellard | (s->cmos_data[RTC_REG_B] & REG_B_PIE)) { |
78 | dff38e7b | bellard | if (period_code <= 2) |
79 | dff38e7b | bellard | period_code += 7;
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80 | dff38e7b | bellard | /* period in 32 Khz cycles */
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81 | dff38e7b | bellard | period = 1 << (period_code - 1); |
82 | dff38e7b | bellard | /* compute 32 khz clock */
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83 | dff38e7b | bellard | cur_clock = muldiv64(current_time, 32768, ticks_per_sec);
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84 | dff38e7b | bellard | next_irq_clock = (cur_clock & ~(period - 1)) + period;
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85 | dff38e7b | bellard | s->next_periodic_time = muldiv64(next_irq_clock, ticks_per_sec, 32768) + 1; |
86 | dff38e7b | bellard | qemu_mod_timer(s->periodic_timer, s->next_periodic_time); |
87 | dff38e7b | bellard | } else {
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88 | dff38e7b | bellard | qemu_del_timer(s->periodic_timer); |
89 | dff38e7b | bellard | } |
90 | dff38e7b | bellard | } |
91 | dff38e7b | bellard | |
92 | dff38e7b | bellard | static void rtc_periodic_timer(void *opaque) |
93 | dff38e7b | bellard | { |
94 | dff38e7b | bellard | RTCState *s = opaque; |
95 | dff38e7b | bellard | |
96 | dff38e7b | bellard | rtc_timer_update(s, s->next_periodic_time); |
97 | dff38e7b | bellard | s->cmos_data[RTC_REG_C] |= 0xc0;
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98 | dff38e7b | bellard | pic_set_irq(s->irq, 1);
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99 | dff38e7b | bellard | } |
100 | 80cabfad | bellard | |
101 | b41a2cd1 | bellard | static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data) |
102 | 80cabfad | bellard | { |
103 | b41a2cd1 | bellard | RTCState *s = opaque; |
104 | 80cabfad | bellard | |
105 | 80cabfad | bellard | if ((addr & 1) == 0) { |
106 | 80cabfad | bellard | s->cmos_index = data & 0x7f;
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107 | 80cabfad | bellard | } else {
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108 | 80cabfad | bellard | #ifdef DEBUG_CMOS
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109 | 80cabfad | bellard | printf("cmos: write index=0x%02x val=0x%02x\n",
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110 | 80cabfad | bellard | s->cmos_index, data); |
111 | 80cabfad | bellard | #endif
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112 | dff38e7b | bellard | switch(s->cmos_index) {
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113 | 80cabfad | bellard | case RTC_SECONDS_ALARM:
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114 | 80cabfad | bellard | case RTC_MINUTES_ALARM:
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115 | 80cabfad | bellard | case RTC_HOURS_ALARM:
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116 | 80cabfad | bellard | /* XXX: not supported */
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117 | 80cabfad | bellard | s->cmos_data[s->cmos_index] = data; |
118 | 80cabfad | bellard | break;
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119 | 80cabfad | bellard | case RTC_SECONDS:
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120 | 80cabfad | bellard | case RTC_MINUTES:
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121 | 80cabfad | bellard | case RTC_HOURS:
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122 | 80cabfad | bellard | case RTC_DAY_OF_WEEK:
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123 | 80cabfad | bellard | case RTC_DAY_OF_MONTH:
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124 | 80cabfad | bellard | case RTC_MONTH:
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125 | 80cabfad | bellard | case RTC_YEAR:
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126 | 80cabfad | bellard | s->cmos_data[s->cmos_index] = data; |
127 | dff38e7b | bellard | /* if in set mode, do not update the time */
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128 | dff38e7b | bellard | if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
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129 | dff38e7b | bellard | rtc_set_time(s); |
130 | dff38e7b | bellard | } |
131 | 80cabfad | bellard | break;
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132 | 80cabfad | bellard | case RTC_REG_A:
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133 | dff38e7b | bellard | /* UIP bit is read only */
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134 | dff38e7b | bellard | s->cmos_data[RTC_REG_A] = (data & ~REG_A_UIP) | |
135 | dff38e7b | bellard | (s->cmos_data[RTC_REG_A] & REG_A_UIP); |
136 | dff38e7b | bellard | rtc_timer_update(s, qemu_get_clock(vm_clock)); |
137 | dff38e7b | bellard | break;
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138 | 80cabfad | bellard | case RTC_REG_B:
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139 | dff38e7b | bellard | if (data & REG_B_SET) {
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140 | dff38e7b | bellard | /* set mode: reset UIP mode */
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141 | dff38e7b | bellard | s->cmos_data[RTC_REG_A] &= ~REG_A_UIP; |
142 | dff38e7b | bellard | data &= ~REG_B_UIE; |
143 | dff38e7b | bellard | } else {
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144 | dff38e7b | bellard | /* if disabling set mode, update the time */
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145 | dff38e7b | bellard | if (s->cmos_data[RTC_REG_B] & REG_B_SET) {
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146 | dff38e7b | bellard | rtc_set_time(s); |
147 | dff38e7b | bellard | } |
148 | dff38e7b | bellard | } |
149 | dff38e7b | bellard | s->cmos_data[RTC_REG_B] = data; |
150 | dff38e7b | bellard | rtc_timer_update(s, qemu_get_clock(vm_clock)); |
151 | 80cabfad | bellard | break;
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152 | 80cabfad | bellard | case RTC_REG_C:
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153 | 80cabfad | bellard | case RTC_REG_D:
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154 | 80cabfad | bellard | /* cannot write to them */
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155 | 80cabfad | bellard | break;
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156 | 80cabfad | bellard | default:
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157 | 80cabfad | bellard | s->cmos_data[s->cmos_index] = data; |
158 | 80cabfad | bellard | break;
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159 | 80cabfad | bellard | } |
160 | 80cabfad | bellard | } |
161 | 80cabfad | bellard | } |
162 | 80cabfad | bellard | |
163 | dff38e7b | bellard | static inline int to_bcd(RTCState *s, int a) |
164 | 80cabfad | bellard | { |
165 | dff38e7b | bellard | if (s->cmos_data[RTC_REG_B] & 0x04) { |
166 | dff38e7b | bellard | return a;
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167 | dff38e7b | bellard | } else {
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168 | dff38e7b | bellard | return ((a / 10) << 4) | (a % 10); |
169 | dff38e7b | bellard | } |
170 | 80cabfad | bellard | } |
171 | 80cabfad | bellard | |
172 | dff38e7b | bellard | static inline int from_bcd(RTCState *s, int a) |
173 | 80cabfad | bellard | { |
174 | dff38e7b | bellard | if (s->cmos_data[RTC_REG_B] & 0x04) { |
175 | dff38e7b | bellard | return a;
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176 | dff38e7b | bellard | } else {
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177 | dff38e7b | bellard | return ((a >> 4) * 10) + (a & 0x0f); |
178 | dff38e7b | bellard | } |
179 | dff38e7b | bellard | } |
180 | dff38e7b | bellard | |
181 | dff38e7b | bellard | static void rtc_set_time(RTCState *s) |
182 | dff38e7b | bellard | { |
183 | 43f493af | bellard | struct tm *tm = &s->current_tm;
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184 | dff38e7b | bellard | |
185 | dff38e7b | bellard | tm->tm_sec = from_bcd(s, s->cmos_data[RTC_SECONDS]); |
186 | dff38e7b | bellard | tm->tm_min = from_bcd(s, s->cmos_data[RTC_MINUTES]); |
187 | 43f493af | bellard | tm->tm_hour = from_bcd(s, s->cmos_data[RTC_HOURS] & 0x7f);
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188 | 43f493af | bellard | if (!(s->cmos_data[RTC_REG_B] & 0x02) && |
189 | 43f493af | bellard | (s->cmos_data[RTC_HOURS] & 0x80)) {
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190 | 43f493af | bellard | tm->tm_hour += 12;
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191 | 43f493af | bellard | } |
192 | dff38e7b | bellard | tm->tm_wday = from_bcd(s, s->cmos_data[RTC_DAY_OF_WEEK]); |
193 | dff38e7b | bellard | tm->tm_mday = from_bcd(s, s->cmos_data[RTC_DAY_OF_MONTH]); |
194 | dff38e7b | bellard | tm->tm_mon = from_bcd(s, s->cmos_data[RTC_MONTH]) - 1;
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195 | dff38e7b | bellard | tm->tm_year = from_bcd(s, s->cmos_data[RTC_YEAR]) + 100;
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196 | 43f493af | bellard | } |
197 | 43f493af | bellard | |
198 | 43f493af | bellard | static void rtc_copy_date(RTCState *s) |
199 | 43f493af | bellard | { |
200 | 43f493af | bellard | const struct tm *tm = &s->current_tm; |
201 | dff38e7b | bellard | |
202 | 43f493af | bellard | s->cmos_data[RTC_SECONDS] = to_bcd(s, tm->tm_sec); |
203 | 43f493af | bellard | s->cmos_data[RTC_MINUTES] = to_bcd(s, tm->tm_min); |
204 | 43f493af | bellard | if (s->cmos_data[RTC_REG_B] & 0x02) { |
205 | 43f493af | bellard | /* 24 hour format */
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206 | 43f493af | bellard | s->cmos_data[RTC_HOURS] = to_bcd(s, tm->tm_hour); |
207 | 43f493af | bellard | } else {
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208 | 43f493af | bellard | /* 12 hour format */
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209 | 43f493af | bellard | s->cmos_data[RTC_HOURS] = to_bcd(s, tm->tm_hour % 12);
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210 | 43f493af | bellard | if (tm->tm_hour >= 12) |
211 | 43f493af | bellard | s->cmos_data[RTC_HOURS] |= 0x80;
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212 | 43f493af | bellard | } |
213 | 43f493af | bellard | s->cmos_data[RTC_DAY_OF_WEEK] = to_bcd(s, tm->tm_wday); |
214 | 43f493af | bellard | s->cmos_data[RTC_DAY_OF_MONTH] = to_bcd(s, tm->tm_mday); |
215 | 43f493af | bellard | s->cmos_data[RTC_MONTH] = to_bcd(s, tm->tm_mon + 1);
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216 | 43f493af | bellard | s->cmos_data[RTC_YEAR] = to_bcd(s, tm->tm_year % 100);
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217 | 43f493af | bellard | } |
218 | 43f493af | bellard | |
219 | 43f493af | bellard | /* month is between 0 and 11. */
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220 | 43f493af | bellard | static int get_days_in_month(int month, int year) |
221 | 43f493af | bellard | { |
222 | 43f493af | bellard | static const int days_tab[12] = { |
223 | 43f493af | bellard | 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 |
224 | 43f493af | bellard | }; |
225 | 43f493af | bellard | int d;
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226 | 43f493af | bellard | if ((unsigned )month >= 12) |
227 | 43f493af | bellard | return 31; |
228 | 43f493af | bellard | d = days_tab[month]; |
229 | 43f493af | bellard | if (month == 1) { |
230 | 43f493af | bellard | if ((year % 4) == 0 && ((year % 100) != 0 || (year % 400) == 0)) |
231 | 43f493af | bellard | d++; |
232 | 43f493af | bellard | } |
233 | 43f493af | bellard | return d;
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234 | 43f493af | bellard | } |
235 | 43f493af | bellard | |
236 | 43f493af | bellard | /* update 'tm' to the next second */
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237 | 43f493af | bellard | static void rtc_next_second(struct tm *tm) |
238 | 43f493af | bellard | { |
239 | 43f493af | bellard | int days_in_month;
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240 | 43f493af | bellard | |
241 | 43f493af | bellard | tm->tm_sec++; |
242 | 43f493af | bellard | if ((unsigned)tm->tm_sec >= 60) { |
243 | 43f493af | bellard | tm->tm_sec = 0;
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244 | 43f493af | bellard | tm->tm_min++; |
245 | 43f493af | bellard | if ((unsigned)tm->tm_min >= 60) { |
246 | 43f493af | bellard | tm->tm_min = 0;
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247 | 43f493af | bellard | tm->tm_hour++; |
248 | 43f493af | bellard | if ((unsigned)tm->tm_hour >= 24) { |
249 | 43f493af | bellard | tm->tm_hour = 0;
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250 | 43f493af | bellard | /* next day */
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251 | 43f493af | bellard | tm->tm_wday++; |
252 | 43f493af | bellard | if ((unsigned)tm->tm_wday >= 7) |
253 | 43f493af | bellard | tm->tm_wday = 0;
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254 | 43f493af | bellard | days_in_month = get_days_in_month(tm->tm_mon, |
255 | 43f493af | bellard | tm->tm_year + 1900);
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256 | 43f493af | bellard | tm->tm_mday++; |
257 | 43f493af | bellard | if (tm->tm_mday < 1) { |
258 | 43f493af | bellard | tm->tm_mday = 1;
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259 | 43f493af | bellard | } else if (tm->tm_mday > days_in_month) { |
260 | 43f493af | bellard | tm->tm_mday = 1;
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261 | 43f493af | bellard | tm->tm_mon++; |
262 | 43f493af | bellard | if (tm->tm_mon >= 12) { |
263 | 43f493af | bellard | tm->tm_mon = 0;
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264 | 43f493af | bellard | tm->tm_year++; |
265 | 43f493af | bellard | } |
266 | 43f493af | bellard | } |
267 | 43f493af | bellard | } |
268 | 43f493af | bellard | } |
269 | 43f493af | bellard | } |
270 | dff38e7b | bellard | } |
271 | dff38e7b | bellard | |
272 | 43f493af | bellard | |
273 | dff38e7b | bellard | static void rtc_update_second(void *opaque) |
274 | dff38e7b | bellard | { |
275 | dff38e7b | bellard | RTCState *s = opaque; |
276 | 4721c457 | bellard | int64_t delay; |
277 | dff38e7b | bellard | |
278 | dff38e7b | bellard | /* if the oscillator is not in normal operation, we do not update */
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279 | dff38e7b | bellard | if ((s->cmos_data[RTC_REG_A] & 0x70) != 0x20) { |
280 | dff38e7b | bellard | s->next_second_time += ticks_per_sec; |
281 | dff38e7b | bellard | qemu_mod_timer(s->second_timer, s->next_second_time); |
282 | dff38e7b | bellard | } else {
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283 | 43f493af | bellard | rtc_next_second(&s->current_tm); |
284 | dff38e7b | bellard | |
285 | dff38e7b | bellard | if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
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286 | dff38e7b | bellard | /* update in progress bit */
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287 | dff38e7b | bellard | s->cmos_data[RTC_REG_A] |= REG_A_UIP; |
288 | dff38e7b | bellard | } |
289 | 4721c457 | bellard | /* should be 244 us = 8 / 32768 seconds, but currently the
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290 | 4721c457 | bellard | timers do not have the necessary resolution. */
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291 | 4721c457 | bellard | delay = (ticks_per_sec * 1) / 100; |
292 | 4721c457 | bellard | if (delay < 1) |
293 | 4721c457 | bellard | delay = 1;
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294 | dff38e7b | bellard | qemu_mod_timer(s->second_timer2, |
295 | 4721c457 | bellard | s->next_second_time + delay); |
296 | dff38e7b | bellard | } |
297 | dff38e7b | bellard | } |
298 | dff38e7b | bellard | |
299 | dff38e7b | bellard | static void rtc_update_second2(void *opaque) |
300 | dff38e7b | bellard | { |
301 | dff38e7b | bellard | RTCState *s = opaque; |
302 | dff38e7b | bellard | |
303 | dff38e7b | bellard | if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
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304 | dff38e7b | bellard | rtc_copy_date(s); |
305 | dff38e7b | bellard | } |
306 | dff38e7b | bellard | |
307 | dff38e7b | bellard | /* check alarm */
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308 | dff38e7b | bellard | if (s->cmos_data[RTC_REG_B] & REG_B_AIE) {
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309 | dff38e7b | bellard | if (((s->cmos_data[RTC_SECONDS_ALARM] & 0xc0) == 0xc0 || |
310 | 43f493af | bellard | s->cmos_data[RTC_SECONDS_ALARM] == s->current_tm.tm_sec) && |
311 | dff38e7b | bellard | ((s->cmos_data[RTC_MINUTES_ALARM] & 0xc0) == 0xc0 || |
312 | 43f493af | bellard | s->cmos_data[RTC_MINUTES_ALARM] == s->current_tm.tm_mon) && |
313 | dff38e7b | bellard | ((s->cmos_data[RTC_HOURS_ALARM] & 0xc0) == 0xc0 || |
314 | 43f493af | bellard | s->cmos_data[RTC_HOURS_ALARM] == s->current_tm.tm_hour)) { |
315 | dff38e7b | bellard | |
316 | dff38e7b | bellard | s->cmos_data[RTC_REG_C] |= 0xa0;
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317 | dff38e7b | bellard | pic_set_irq(s->irq, 1);
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318 | dff38e7b | bellard | } |
319 | dff38e7b | bellard | } |
320 | dff38e7b | bellard | |
321 | dff38e7b | bellard | /* update ended interrupt */
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322 | dff38e7b | bellard | if (s->cmos_data[RTC_REG_B] & REG_B_UIE) {
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323 | dff38e7b | bellard | s->cmos_data[RTC_REG_C] |= 0x90;
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324 | dff38e7b | bellard | pic_set_irq(s->irq, 1);
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325 | dff38e7b | bellard | } |
326 | dff38e7b | bellard | |
327 | dff38e7b | bellard | /* clear update in progress bit */
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328 | dff38e7b | bellard | s->cmos_data[RTC_REG_A] &= ~REG_A_UIP; |
329 | dff38e7b | bellard | |
330 | dff38e7b | bellard | s->next_second_time += ticks_per_sec; |
331 | dff38e7b | bellard | qemu_mod_timer(s->second_timer, s->next_second_time); |
332 | 80cabfad | bellard | } |
333 | 80cabfad | bellard | |
334 | b41a2cd1 | bellard | static uint32_t cmos_ioport_read(void *opaque, uint32_t addr) |
335 | 80cabfad | bellard | { |
336 | b41a2cd1 | bellard | RTCState *s = opaque; |
337 | 80cabfad | bellard | int ret;
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338 | 80cabfad | bellard | if ((addr & 1) == 0) { |
339 | 80cabfad | bellard | return 0xff; |
340 | 80cabfad | bellard | } else {
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341 | 80cabfad | bellard | switch(s->cmos_index) {
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342 | 80cabfad | bellard | case RTC_SECONDS:
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343 | 80cabfad | bellard | case RTC_MINUTES:
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344 | 80cabfad | bellard | case RTC_HOURS:
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345 | 80cabfad | bellard | case RTC_DAY_OF_WEEK:
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346 | 80cabfad | bellard | case RTC_DAY_OF_MONTH:
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347 | 80cabfad | bellard | case RTC_MONTH:
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348 | 80cabfad | bellard | case RTC_YEAR:
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349 | 80cabfad | bellard | ret = s->cmos_data[s->cmos_index]; |
350 | 80cabfad | bellard | break;
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351 | 80cabfad | bellard | case RTC_REG_A:
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352 | 80cabfad | bellard | ret = s->cmos_data[s->cmos_index]; |
353 | 80cabfad | bellard | break;
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354 | 80cabfad | bellard | case RTC_REG_C:
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355 | 80cabfad | bellard | ret = s->cmos_data[s->cmos_index]; |
356 | 80cabfad | bellard | pic_set_irq(s->irq, 0);
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357 | 80cabfad | bellard | s->cmos_data[RTC_REG_C] = 0x00;
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358 | 80cabfad | bellard | break;
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359 | 80cabfad | bellard | default:
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360 | 80cabfad | bellard | ret = s->cmos_data[s->cmos_index]; |
361 | 80cabfad | bellard | break;
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362 | 80cabfad | bellard | } |
363 | 80cabfad | bellard | #ifdef DEBUG_CMOS
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364 | 80cabfad | bellard | printf("cmos: read index=0x%02x val=0x%02x\n",
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365 | 80cabfad | bellard | s->cmos_index, ret); |
366 | 80cabfad | bellard | #endif
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367 | 80cabfad | bellard | return ret;
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368 | 80cabfad | bellard | } |
369 | 80cabfad | bellard | } |
370 | 80cabfad | bellard | |
371 | dff38e7b | bellard | void rtc_set_memory(RTCState *s, int addr, int val) |
372 | dff38e7b | bellard | { |
373 | dff38e7b | bellard | if (addr >= 0 && addr <= 127) |
374 | dff38e7b | bellard | s->cmos_data[addr] = val; |
375 | dff38e7b | bellard | } |
376 | dff38e7b | bellard | |
377 | dff38e7b | bellard | void rtc_set_date(RTCState *s, const struct tm *tm) |
378 | dff38e7b | bellard | { |
379 | 43f493af | bellard | s->current_tm = *tm; |
380 | dff38e7b | bellard | rtc_copy_date(s); |
381 | dff38e7b | bellard | } |
382 | dff38e7b | bellard | |
383 | dff38e7b | bellard | static void rtc_save(QEMUFile *f, void *opaque) |
384 | dff38e7b | bellard | { |
385 | dff38e7b | bellard | RTCState *s = opaque; |
386 | dff38e7b | bellard | |
387 | dff38e7b | bellard | qemu_put_buffer(f, s->cmos_data, 128);
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388 | dff38e7b | bellard | qemu_put_8s(f, &s->cmos_index); |
389 | 43f493af | bellard | |
390 | 43f493af | bellard | qemu_put_be32s(f, &s->current_tm.tm_sec); |
391 | 43f493af | bellard | qemu_put_be32s(f, &s->current_tm.tm_min); |
392 | 43f493af | bellard | qemu_put_be32s(f, &s->current_tm.tm_hour); |
393 | 43f493af | bellard | qemu_put_be32s(f, &s->current_tm.tm_wday); |
394 | 43f493af | bellard | qemu_put_be32s(f, &s->current_tm.tm_mday); |
395 | 43f493af | bellard | qemu_put_be32s(f, &s->current_tm.tm_mon); |
396 | 43f493af | bellard | qemu_put_be32s(f, &s->current_tm.tm_year); |
397 | dff38e7b | bellard | |
398 | dff38e7b | bellard | qemu_put_timer(f, s->periodic_timer); |
399 | dff38e7b | bellard | qemu_put_be64s(f, &s->next_periodic_time); |
400 | dff38e7b | bellard | |
401 | dff38e7b | bellard | qemu_put_be64s(f, &s->next_second_time); |
402 | dff38e7b | bellard | qemu_put_timer(f, s->second_timer); |
403 | dff38e7b | bellard | qemu_put_timer(f, s->second_timer2); |
404 | 80cabfad | bellard | } |
405 | 80cabfad | bellard | |
406 | dff38e7b | bellard | static int rtc_load(QEMUFile *f, void *opaque, int version_id) |
407 | 80cabfad | bellard | { |
408 | dff38e7b | bellard | RTCState *s = opaque; |
409 | dff38e7b | bellard | |
410 | dff38e7b | bellard | if (version_id != 1) |
411 | dff38e7b | bellard | return -EINVAL;
|
412 | 80cabfad | bellard | |
413 | dff38e7b | bellard | qemu_get_buffer(f, s->cmos_data, 128);
|
414 | dff38e7b | bellard | qemu_get_8s(f, &s->cmos_index); |
415 | 43f493af | bellard | |
416 | 43f493af | bellard | qemu_get_be32s(f, &s->current_tm.tm_sec); |
417 | 43f493af | bellard | qemu_get_be32s(f, &s->current_tm.tm_min); |
418 | 43f493af | bellard | qemu_get_be32s(f, &s->current_tm.tm_hour); |
419 | 43f493af | bellard | qemu_get_be32s(f, &s->current_tm.tm_wday); |
420 | 43f493af | bellard | qemu_get_be32s(f, &s->current_tm.tm_mday); |
421 | 43f493af | bellard | qemu_get_be32s(f, &s->current_tm.tm_mon); |
422 | 43f493af | bellard | qemu_get_be32s(f, &s->current_tm.tm_year); |
423 | dff38e7b | bellard | |
424 | dff38e7b | bellard | qemu_get_timer(f, s->periodic_timer); |
425 | dff38e7b | bellard | qemu_get_be64s(f, &s->next_periodic_time); |
426 | dff38e7b | bellard | |
427 | dff38e7b | bellard | qemu_get_be64s(f, &s->next_second_time); |
428 | dff38e7b | bellard | qemu_get_timer(f, s->second_timer); |
429 | dff38e7b | bellard | qemu_get_timer(f, s->second_timer2); |
430 | dff38e7b | bellard | return 0; |
431 | dff38e7b | bellard | } |
432 | dff38e7b | bellard | |
433 | dff38e7b | bellard | RTCState *rtc_init(int base, int irq) |
434 | dff38e7b | bellard | { |
435 | dff38e7b | bellard | RTCState *s; |
436 | dff38e7b | bellard | |
437 | dff38e7b | bellard | s = qemu_mallocz(sizeof(RTCState));
|
438 | dff38e7b | bellard | if (!s)
|
439 | dff38e7b | bellard | return NULL; |
440 | 80cabfad | bellard | |
441 | 80cabfad | bellard | s->irq = irq; |
442 | 80cabfad | bellard | s->cmos_data[RTC_REG_A] = 0x26;
|
443 | 80cabfad | bellard | s->cmos_data[RTC_REG_B] = 0x02;
|
444 | 80cabfad | bellard | s->cmos_data[RTC_REG_C] = 0x00;
|
445 | 80cabfad | bellard | s->cmos_data[RTC_REG_D] = 0x80;
|
446 | 80cabfad | bellard | |
447 | dff38e7b | bellard | s->periodic_timer = qemu_new_timer(vm_clock, |
448 | dff38e7b | bellard | rtc_periodic_timer, s); |
449 | dff38e7b | bellard | s->second_timer = qemu_new_timer(vm_clock, |
450 | dff38e7b | bellard | rtc_update_second, s); |
451 | dff38e7b | bellard | s->second_timer2 = qemu_new_timer(vm_clock, |
452 | dff38e7b | bellard | rtc_update_second2, s); |
453 | dff38e7b | bellard | |
454 | dff38e7b | bellard | s->next_second_time = qemu_get_clock(vm_clock) + (ticks_per_sec * 99) / 100; |
455 | dff38e7b | bellard | qemu_mod_timer(s->second_timer2, s->next_second_time); |
456 | dff38e7b | bellard | |
457 | b41a2cd1 | bellard | register_ioport_write(base, 2, 1, cmos_ioport_write, s); |
458 | b41a2cd1 | bellard | register_ioport_read(base, 2, 1, cmos_ioport_read, s); |
459 | dff38e7b | bellard | |
460 | dff38e7b | bellard | register_savevm("mc146818rtc", base, 1, rtc_save, rtc_load, s); |
461 | dff38e7b | bellard | return s;
|
462 | 80cabfad | bellard | } |