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/*
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 *  ARM micro operations
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 * 
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include "exec.h"
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#define REGNAME r0
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#define REG (env->regs[0])
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#include "op_template.h"
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#define REGNAME r1
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#define REG (env->regs[1])
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#include "op_template.h"
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#define REGNAME r2
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#define REG (env->regs[2])
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#include "op_template.h"
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#define REGNAME r3
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#define REG (env->regs[3])
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#include "op_template.h"
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#define REGNAME r4
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#define REG (env->regs[4])
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#include "op_template.h"
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#define REGNAME r5
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#define REG (env->regs[5])
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#include "op_template.h"
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#define REGNAME r6
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#define REG (env->regs[6])
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#include "op_template.h"
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#define REGNAME r7
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#define REG (env->regs[7])
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#include "op_template.h"
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#define REGNAME r8
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#define REG (env->regs[8])
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#include "op_template.h"
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#define REGNAME r9
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#define REG (env->regs[9])
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#include "op_template.h"
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#define REGNAME r10
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#define REG (env->regs[10])
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#include "op_template.h"
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#define REGNAME r11
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#define REG (env->regs[11])
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#include "op_template.h"
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#define REGNAME r12
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#define REG (env->regs[12])
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#include "op_template.h"
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#define REGNAME r13
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#define REG (env->regs[13])
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#include "op_template.h"
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#define REGNAME r14
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#define REG (env->regs[14])
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#include "op_template.h"
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#define REGNAME r15
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#define REG (env->regs[15])
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#include "op_template.h"
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void OPPROTO op_movl_T0_0(void)
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{
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    T0 = 0;
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}
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void OPPROTO op_movl_T0_im(void)
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{
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    T0 = PARAM1;
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}
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void OPPROTO op_movl_T1_im(void)
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{
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    T1 = PARAM1;
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}
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void OPPROTO op_movl_T2_im(void)
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{
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    T2 = PARAM1;
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}
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void OPPROTO op_addl_T1_im(void)
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{
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    T1 += PARAM1;
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}
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void OPPROTO op_addl_T1_T2(void)
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{
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    T1 += T2;
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}
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void OPPROTO op_subl_T1_T2(void)
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{
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    T1 -= T2;
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}
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void OPPROTO op_addl_T0_T1(void)
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{
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    T0 += T1;
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}
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void OPPROTO op_addl_T0_T1_cc(void)
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{
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    unsigned int src1;
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    src1 = T0;
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    T0 += T1;
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    env->NZF = T0;
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    env->CF = T0 < src1;
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    env->VF = (src1 ^ T1 ^ -1) & (src1 ^ T0);
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}
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void OPPROTO op_adcl_T0_T1(void)
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{
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    T0 += T1 + env->CF;
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}
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void OPPROTO op_adcl_T0_T1_cc(void)
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{
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    unsigned int src1;
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    src1 = T0;
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    if (!env->CF) {
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        T0 += T1;
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        env->CF = T0 < src1;
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    } else {
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        T0 += T1 + 1;
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        env->CF = T0 <= src1;
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    }
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    env->VF = (src1 ^ T1 ^ -1) & (src1 ^ T0);
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    env->NZF = T0;
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    FORCE_RET();
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}
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#define OPSUB(sub, sbc, res, T0, T1)            \
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                                                \
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void OPPROTO op_ ## sub ## l_T0_T1(void)        \
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{                                               \
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    res = T0 - T1;                              \
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}                                               \
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                                                \
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void OPPROTO op_ ## sub ## l_T0_T1_cc(void)     \
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{                                               \
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    unsigned int src1;                          \
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    src1 = T0;                                  \
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    T0 -= T1;                                   \
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    env->NZF = T0;                              \
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    env->CF = src1 >= T1;                       \
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    env->VF = (src1 ^ T1) & (src1 ^ T0);        \
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    res = T0;                                   \
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}                                               \
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                                                \
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void OPPROTO op_ ## sbc ## l_T0_T1(void)        \
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{                                               \
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    res = T0 - T1 + env->CF - 1;                \
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}                                               \
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                                                \
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void OPPROTO op_ ## sbc ## l_T0_T1_cc(void)     \
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{                                               \
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    unsigned int src1;                          \
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    src1 = T0;                                  \
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    if (!env->CF) {                             \
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        T0 = T0 - T1 - 1;                       \
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        env->CF = src1 >= T1;                   \
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    } else {                                    \
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        T0 = T0 - T1;                           \
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        env->CF = src1 > T1;                    \
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    }                                           \
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    env->VF = (src1 ^ T1) & (src1 ^ T0);        \
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    env->NZF = T0;                              \
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    res = T0;                                   \
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    FORCE_RET();                                \
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}
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OPSUB(sub, sbc, T0, T0, T1)
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OPSUB(rsb, rsc, T0, T1, T0)
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void OPPROTO op_andl_T0_T1(void)
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{
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    T0 &= T1;
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}
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void OPPROTO op_xorl_T0_T1(void)
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{
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    T0 ^= T1;
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}
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void OPPROTO op_orl_T0_T1(void)
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{
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    T0 |= T1;
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}
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void OPPROTO op_bicl_T0_T1(void)
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{
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    T0 &= ~T1;
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}
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void OPPROTO op_notl_T1(void)
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{
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    T1 = ~T1;
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}
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void OPPROTO op_logic_T0_cc(void)
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{
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    env->NZF = T0;
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}
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void OPPROTO op_logic_T1_cc(void)
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{
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    env->NZF = T1;
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}
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#define EIP (env->regs[15])
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void OPPROTO op_test_eq(void)
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{
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    if (env->NZF == 0)
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        JUMP_TB(op_test_eq, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_ne(void)
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{
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    if (env->NZF != 0)
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        JUMP_TB(op_test_ne, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_cs(void)
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{
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    if (env->CF != 0)
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        JUMP_TB(op_test_cs, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_cc(void)
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{
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    if (env->CF == 0)
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        JUMP_TB(op_test_cc, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_mi(void)
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{
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    if ((env->NZF & 0x80000000) != 0)
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        JUMP_TB(op_test_mi, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_pl(void)
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{
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    if ((env->NZF & 0x80000000) == 0)
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        JUMP_TB(op_test_pl, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_vs(void)
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{
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    if ((env->VF & 0x80000000) != 0)
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        JUMP_TB(op_test_vs, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_vc(void)
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{
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    if ((env->VF & 0x80000000) == 0)
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        JUMP_TB(op_test_vc, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_hi(void)
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{
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    if (env->CF != 0 && env->NZF != 0)
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        JUMP_TB(op_test_hi, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_ls(void)
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{
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    if (env->CF == 0 || env->NZF == 0)
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        JUMP_TB(op_test_ls, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_ge(void)
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{
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    if (((env->VF ^ env->NZF) & 0x80000000) == 0)
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        JUMP_TB(op_test_ge, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_lt(void)
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{
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    if (((env->VF ^ env->NZF) & 0x80000000) != 0)
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        JUMP_TB(op_test_lt, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_gt(void)
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{
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    if (env->NZF != 0 && ((env->VF ^ env->NZF) & 0x80000000) == 0)
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        JUMP_TB(op_test_gt, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_test_le(void)
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{
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    if (env->NZF == 0 || ((env->VF ^ env->NZF) & 0x80000000) != 0)
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        JUMP_TB(op_test_le, PARAM1, 0, PARAM2);
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    FORCE_RET();
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}
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void OPPROTO op_jmp(void)
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{
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    JUMP_TB(op_jmp, PARAM1, 1, PARAM2);
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}
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void OPPROTO op_exit_tb(void)
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{
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    EXIT_TB();
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}
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void OPPROTO op_movl_T0_psr(void)
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{
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    T0 = compute_cpsr();
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}
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/* NOTE: N = 1 and Z = 1 cannot be stored currently */
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void OPPROTO op_movl_psr_T0(void)
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{
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    unsigned int psr;
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    psr = T0;
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    env->CF = (psr >> 29) & 1;
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    env->NZF = (psr & 0xc0000000) ^ 0x40000000;
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    env->VF = (psr << 3) & 0x80000000;
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    /* for user mode we do not update other state info */
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}
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void OPPROTO op_mul_T0_T1(void)
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{
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    T0 = T0 * T1;
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}
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/* 64 bit unsigned mul */
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void OPPROTO op_mull_T0_T1(void)
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{
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    uint64_t res;
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    res = (uint64_t)T0 * (uint64_t)T1;
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    T1 = res >> 32;
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    T0 = res;
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}
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/* 64 bit signed mul */
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void OPPROTO op_imull_T0_T1(void)
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{
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    uint64_t res;
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    res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
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    T1 = res >> 32;
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    T0 = res;
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}
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void OPPROTO op_addq_T0_T1(void)
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{
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    uint64_t res;
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    res = ((uint64_t)T1 << 32) | T0;
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    res += ((uint64_t)(env->regs[PARAM2]) << 32) | (env->regs[PARAM1]);
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    T1 = res >> 32;
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    T0 = res;
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}
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void OPPROTO op_logicq_cc(void)
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{
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    env->NZF = (T1 & 0x80000000) | ((T0 | T1) != 0);
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}
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/* memory access */
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void OPPROTO op_ldub_T0_T1(void)
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{
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    T0 = ldub((void *)T1);
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}
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void OPPROTO op_ldsb_T0_T1(void)
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{
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    T0 = ldsb((void *)T1);
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}
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void OPPROTO op_lduw_T0_T1(void)
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{
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    T0 = lduw((void *)T1);
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}
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void OPPROTO op_ldsw_T0_T1(void)
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{
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    T0 = ldsw((void *)T1);
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}
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void OPPROTO op_ldl_T0_T1(void)
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{
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    T0 = ldl((void *)T1);
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}
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void OPPROTO op_stb_T0_T1(void)
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{
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    stb((void *)T1, T0);
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}
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void OPPROTO op_stw_T0_T1(void)
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{
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    stw((void *)T1, T0);
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}
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void OPPROTO op_stl_T0_T1(void)
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{
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    stl((void *)T1, T0);
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}
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void OPPROTO op_swpb_T0_T1(void)
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{
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    int tmp;
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    cpu_lock();
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    tmp = ldub((void *)T1);
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    stb((void *)T1, T0);
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    T0 = tmp;
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    cpu_unlock();
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}
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void OPPROTO op_swpl_T0_T1(void)
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{
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    int tmp;
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    cpu_lock();
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    tmp = ldl((void *)T1);
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    stl((void *)T1, T0);
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    T0 = tmp;
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    cpu_unlock();
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}
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/* shifts */
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/* T1 based */
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void OPPROTO op_shll_T1_im(void)
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{
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    T1 = T1 << PARAM1;
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}
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void OPPROTO op_shrl_T1_im(void)
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{
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    T1 = (uint32_t)T1 >> PARAM1;
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}
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void OPPROTO op_sarl_T1_im(void)
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{
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    T1 = (int32_t)T1 >> PARAM1;
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}
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void OPPROTO op_rorl_T1_im(void)
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{
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    int shift;
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    shift = PARAM1;
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    T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
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}
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/* T1 based, set C flag */
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void OPPROTO op_shll_T1_im_cc(void)
490 2c0262af bellard
{
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    env->CF = (T1 >> (32 - PARAM1)) & 1;
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    T1 = T1 << PARAM1;
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}
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void OPPROTO op_shrl_T1_im_cc(void)
496 2c0262af bellard
{
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    env->CF = (T1 >> (PARAM1 - 1)) & 1;
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    T1 = (uint32_t)T1 >> PARAM1;
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}
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void OPPROTO op_sarl_T1_im_cc(void)
502 2c0262af bellard
{
503 2c0262af bellard
    env->CF = (T1 >> (PARAM1 - 1)) & 1;
504 2c0262af bellard
    T1 = (int32_t)T1 >> PARAM1;
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}
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void OPPROTO op_rorl_T1_im_cc(void)
508 2c0262af bellard
{
509 2c0262af bellard
    int shift;
510 2c0262af bellard
    shift = PARAM1;
511 2c0262af bellard
    env->CF = (T1 >> (shift - 1)) & 1;
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    T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
513 2c0262af bellard
}
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/* T2 based */
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void OPPROTO op_shll_T2_im(void)
517 2c0262af bellard
{
518 2c0262af bellard
    T2 = T2 << PARAM1;
519 2c0262af bellard
}
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void OPPROTO op_shrl_T2_im(void)
522 2c0262af bellard
{
523 2c0262af bellard
    T2 = (uint32_t)T2 >> PARAM1;
524 2c0262af bellard
}
525 2c0262af bellard
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void OPPROTO op_sarl_T2_im(void)
527 2c0262af bellard
{
528 2c0262af bellard
    T2 = (int32_t)T2 >> PARAM1;
529 2c0262af bellard
}
530 2c0262af bellard
531 2c0262af bellard
void OPPROTO op_rorl_T2_im(void)
532 2c0262af bellard
{
533 2c0262af bellard
    int shift;
534 2c0262af bellard
    shift = PARAM1;
535 2c0262af bellard
    T2 = ((uint32_t)T2 >> shift) | (T2 << (32 - shift));
536 2c0262af bellard
}
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/* T1 based, use T0 as shift count */
539 2c0262af bellard
540 2c0262af bellard
void OPPROTO op_shll_T1_T0(void)
541 2c0262af bellard
{
542 2c0262af bellard
    int shift;
543 2c0262af bellard
    shift = T0 & 0xff;
544 2c0262af bellard
    if (shift >= 32)
545 2c0262af bellard
        T1 = 0;
546 2c0262af bellard
    else
547 2c0262af bellard
        T1 = T1 << shift;
548 2c0262af bellard
    FORCE_RET();
549 2c0262af bellard
}
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void OPPROTO op_shrl_T1_T0(void)
552 2c0262af bellard
{
553 2c0262af bellard
    int shift;
554 2c0262af bellard
    shift = T0 & 0xff;
555 2c0262af bellard
    if (shift >= 32)
556 2c0262af bellard
        T1 = 0;
557 2c0262af bellard
    else
558 2c0262af bellard
        T1 = (uint32_t)T1 >> shift;
559 2c0262af bellard
    FORCE_RET();
560 2c0262af bellard
}
561 2c0262af bellard
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void OPPROTO op_sarl_T1_T0(void)
563 2c0262af bellard
{
564 2c0262af bellard
    int shift;
565 2c0262af bellard
    shift = T0 & 0xff;
566 2c0262af bellard
    if (shift >= 32)
567 2c0262af bellard
        shift = 31;
568 2c0262af bellard
    T1 = (int32_t)T1 >> shift;
569 2c0262af bellard
}
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void OPPROTO op_rorl_T1_T0(void)
572 2c0262af bellard
{
573 2c0262af bellard
    int shift;
574 2c0262af bellard
    shift = T0 & 0x1f;
575 2c0262af bellard
    if (shift) {
576 2c0262af bellard
        T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
577 2c0262af bellard
    }
578 2c0262af bellard
    FORCE_RET();
579 2c0262af bellard
}
580 2c0262af bellard
581 2c0262af bellard
/* T1 based, use T0 as shift count and compute CF */
582 2c0262af bellard
583 2c0262af bellard
void OPPROTO op_shll_T1_T0_cc(void)
584 2c0262af bellard
{
585 2c0262af bellard
    int shift;
586 2c0262af bellard
    shift = T0 & 0xff;
587 2c0262af bellard
    if (shift >= 32) {
588 2c0262af bellard
        if (shift == 32)
589 2c0262af bellard
            env->CF = T1 & 1;
590 2c0262af bellard
        else
591 2c0262af bellard
            env->CF = 0;
592 2c0262af bellard
        T1 = 0;
593 2c0262af bellard
    } else if (shift != 0) {
594 2c0262af bellard
        env->CF = (T1 >> (32 - shift)) & 1;
595 2c0262af bellard
        T1 = T1 << shift;
596 2c0262af bellard
    }
597 2c0262af bellard
    FORCE_RET();
598 2c0262af bellard
}
599 2c0262af bellard
600 2c0262af bellard
void OPPROTO op_shrl_T1_T0_cc(void)
601 2c0262af bellard
{
602 2c0262af bellard
    int shift;
603 2c0262af bellard
    shift = T0 & 0xff;
604 2c0262af bellard
    if (shift >= 32) {
605 2c0262af bellard
        if (shift == 32)
606 2c0262af bellard
            env->CF = (T1 >> 31) & 1;
607 2c0262af bellard
        else
608 2c0262af bellard
            env->CF = 0;
609 2c0262af bellard
        T1 = 0;
610 2c0262af bellard
    } else if (shift != 0) {
611 2c0262af bellard
        env->CF = (T1 >> (shift - 1)) & 1;
612 2c0262af bellard
        T1 = (uint32_t)T1 >> shift;
613 2c0262af bellard
    }
614 2c0262af bellard
    FORCE_RET();
615 2c0262af bellard
}
616 2c0262af bellard
617 2c0262af bellard
void OPPROTO op_sarl_T1_T0_cc(void)
618 2c0262af bellard
{
619 2c0262af bellard
    int shift;
620 2c0262af bellard
    shift = T0 & 0xff;
621 2c0262af bellard
    if (shift >= 32) {
622 2c0262af bellard
        env->CF = (T1 >> 31) & 1;
623 2c0262af bellard
        T1 = (int32_t)T1 >> 31;
624 2c0262af bellard
    } else {
625 2c0262af bellard
        env->CF = (T1 >> (shift - 1)) & 1;
626 2c0262af bellard
        T1 = (int32_t)T1 >> shift;
627 2c0262af bellard
    }
628 2c0262af bellard
    FORCE_RET();
629 2c0262af bellard
}
630 2c0262af bellard
631 2c0262af bellard
void OPPROTO op_rorl_T1_T0_cc(void)
632 2c0262af bellard
{
633 2c0262af bellard
    int shift1, shift;
634 2c0262af bellard
    shift1 = T0 & 0xff;
635 2c0262af bellard
    shift = shift1 & 0x1f;
636 2c0262af bellard
    if (shift == 0) {
637 2c0262af bellard
        if (shift1 != 0)
638 2c0262af bellard
            env->CF = (T1 >> 31) & 1;
639 2c0262af bellard
    } else {
640 2c0262af bellard
        env->CF = (T1 >> (shift - 1)) & 1;
641 2c0262af bellard
        T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
642 2c0262af bellard
    }
643 2c0262af bellard
    FORCE_RET();
644 2c0262af bellard
}
645 2c0262af bellard
646 2c0262af bellard
/* exceptions */
647 2c0262af bellard
648 2c0262af bellard
void OPPROTO op_swi(void)
649 2c0262af bellard
{
650 2c0262af bellard
    env->exception_index = EXCP_SWI;
651 2c0262af bellard
    cpu_loop_exit();
652 2c0262af bellard
}
653 2c0262af bellard
654 2c0262af bellard
void OPPROTO op_undef_insn(void)
655 2c0262af bellard
{
656 2c0262af bellard
    env->exception_index = EXCP_UDEF;
657 2c0262af bellard
    cpu_loop_exit();
658 2c0262af bellard
}
659 2c0262af bellard
660 2c0262af bellard
/* thread support */
661 2c0262af bellard
662 2c0262af bellard
spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
663 2c0262af bellard
664 2c0262af bellard
void cpu_lock(void)
665 2c0262af bellard
{
666 2c0262af bellard
    spin_lock(&global_cpu_lock);
667 2c0262af bellard
}
668 2c0262af bellard
669 2c0262af bellard
void cpu_unlock(void)
670 2c0262af bellard
{
671 2c0262af bellard
    spin_unlock(&global_cpu_lock);
672 2c0262af bellard
}