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/*
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   SPARC micro operations
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   Copyright (C) 2003 Thomas M. Ogrisegg <tom@fnord.at>
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   This library is free software; you can redistribute it and/or
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   modify it under the terms of the GNU Lesser General Public
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   License as published by the Free Software Foundation; either
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   version 2 of the License, or (at your option) any later version.
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   This library is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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   Lesser General Public License for more details.
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   You should have received a copy of the GNU Lesser General Public
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   License along with this library; if not, write to the Free Software
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   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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*/
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#include "exec.h"
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 /*XXX*/
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#define REGNAME g0
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#define REG (env->gregs[0])
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#include "op_template.h"
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#define REGNAME g1
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#define REG (env->gregs[1])
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#include "op_template.h"
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#define REGNAME g2
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#define REG (env->gregs[2])
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#include "op_template.h"
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#define REGNAME g3
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#define REG (env->gregs[3])
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#include "op_template.h"
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#define REGNAME g4
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#define REG (env->gregs[4])
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#include "op_template.h"
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#define REGNAME g5
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#define REG (env->gregs[5])
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#include "op_template.h"
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#define REGNAME g6
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#define REG (env->gregs[6])
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#include "op_template.h"
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#define REGNAME g7
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#define REG (env->gregs[7])
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#include "op_template.h"
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#define REGNAME i0
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#define REG (env->regwptr[16])
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#include "op_template.h"
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#define REGNAME i1
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#define REG (env->regwptr[17])
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#include "op_template.h"
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#define REGNAME i2
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#define REG (env->regwptr[18])
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#include "op_template.h"
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#define REGNAME i3
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#define REG (env->regwptr[19])
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#include "op_template.h"
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#define REGNAME i4
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#define REG (env->regwptr[20])
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#include "op_template.h"
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#define REGNAME i5
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#define REG (env->regwptr[21])
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#include "op_template.h"
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#define REGNAME i6
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#define REG (env->regwptr[22])
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#include "op_template.h"
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#define REGNAME i7
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#define REG (env->regwptr[23])
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#include "op_template.h"
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#define REGNAME l0
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#define REG (env->regwptr[8])
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#include "op_template.h"
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#define REGNAME l1
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#define REG (env->regwptr[9])
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#include "op_template.h"
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#define REGNAME l2
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#define REG (env->regwptr[10])
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#include "op_template.h"
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#define REGNAME l3
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#define REG (env->regwptr[11])
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#include "op_template.h"
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#define REGNAME l4
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#define REG (env->regwptr[12])
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#include "op_template.h"
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#define REGNAME l5
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#define REG (env->regwptr[13])
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#include "op_template.h"
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#define REGNAME l6
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#define REG (env->regwptr[14])
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#include "op_template.h"
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#define REGNAME l7
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#define REG (env->regwptr[15])
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#include "op_template.h"
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#define REGNAME o0
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#define REG (env->regwptr[0])
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#include "op_template.h"
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#define REGNAME o1
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#define REG (env->regwptr[1])
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#include "op_template.h"
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#define REGNAME o2
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#define REG (env->regwptr[2])
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#include "op_template.h"
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#define REGNAME o3
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#define REG (env->regwptr[3])
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#include "op_template.h"
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#define REGNAME o4
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#define REG (env->regwptr[4])
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#include "op_template.h"
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#define REGNAME o5
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#define REG (env->regwptr[5])
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#include "op_template.h"
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#define REGNAME o6
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#define REG (env->regwptr[6])
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#include "op_template.h"
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#define REGNAME o7
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#define REG (env->regwptr[7])
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#include "op_template.h"
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#define EIP (env->pc)
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#define FLAG_SET(x) (env->psr&x)?1:0
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void OPPROTO op_movl_T0_0(void)
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{
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    T0 = 0;
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}
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void OPPROTO op_movl_T0_1(void)
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{
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    T0 = 1;
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}
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void OPPROTO op_movl_T0_im(void)
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{
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    T0 = PARAM1;
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}
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void OPPROTO op_movl_T1_im(void)
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{
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    T1 = PARAM1;
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}
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void OPPROTO op_movl_T2_im(void)
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{
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    T2 = PARAM1;
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}
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void OPPROTO op_addl_T1_im(void)
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{
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    T1 += PARAM1;
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}
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void OPPROTO op_addl_T1_T2(void)
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{
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    T1 += T2;
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}
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void OPPROTO op_subl_T1_T2(void)
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{
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    T1 -= T2;
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}
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void OPPROTO op_add_T1_T0(void)
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{
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    T0 += T1;
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}
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void OPPROTO op_add_T1_T0_cc(void)
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{
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    unsigned int src1;
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    src1 = T0;
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    T0 += T1;
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    env->psr = 0;
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    if (!T0)
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        env->psr |= PSR_ZERO;
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    if ((int) T0 < 0)
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        env->psr |= PSR_NEG;
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    if (T0 < src1)
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        env->psr |= PSR_CARRY;
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    if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31))
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        env->psr |= PSR_OVF;
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    FORCE_RET();
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}
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void OPPROTO op_sub_T1_T0(void)
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{
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    T0 -= T1;
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}
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void OPPROTO op_sub_T1_T0_cc(void)
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{
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    unsigned int src1;
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    src1 = T0;
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    T0 -= T1;
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    env->psr = 0;
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    if (!T0)
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        env->psr |= PSR_ZERO;
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    if ((int) T0 < 0)
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        env->psr |= PSR_NEG;
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    if (src1 < T1)
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        env->psr |= PSR_CARRY;
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    if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31))
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        env->psr |= PSR_OVF;
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    FORCE_RET();
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}
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void OPPROTO op_and_T1_T0(void)
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{
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    T0 &= T1;
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}
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void OPPROTO op_or_T1_T0(void)
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{
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    T0 |= T1;
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}
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void OPPROTO op_xor_T1_T0(void)
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{
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    T0 ^= T1;
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}
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void OPPROTO op_andn_T1_T0(void)
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{
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    T0 &= ~T1;
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}
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void OPPROTO op_orn_T1_T0(void)
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{
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    T0 |= ~T1;
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}
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void OPPROTO op_xnor_T1_T0(void)
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{
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    T0 ^= ~T1;
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}
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void OPPROTO op_addx_T1_T0(void)
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{
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    T0 += T1 + ((env->psr & PSR_CARRY) ? 1 : 0);
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}
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void OPPROTO op_umul_T1_T0(void)
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{
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    uint64_t res;
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    res = (uint64_t) T0 *(uint64_t) T1;
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    T0 = res & 0xffffffff;
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    env->y = res >> 32;
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}
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void OPPROTO op_smul_T1_T0(void)
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{
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    uint64_t res;
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    res = (int64_t) ((int32_t) T0) * (int64_t) ((int32_t) T1);
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    T0 = res & 0xffffffff;
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    env->y = res >> 32;
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}
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void OPPROTO op_mulscc_T1_T0(void)
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{
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    unsigned int b1, C, V, b2, src1;
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    C = FLAG_SET(PSR_CARRY);
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    V = FLAG_SET(PSR_OVF);
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    b1 = C ^ V;
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    b2 = T0 & 1;
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    T0 = (b1 << 31) | (T0 >> 1);
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    if (!(env->y & 1))
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        T1 = 0;
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    /* do addition and update flags */
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    src1 = T0;
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    T0 += T1;
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    env->psr = 0;
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    if (!T0)
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        env->psr |= PSR_ZERO;
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    if ((int) T0 < 0)
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        env->psr |= PSR_NEG;
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    if (T0 < src1)
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        env->psr |= PSR_CARRY;
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    if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31))
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        env->psr |= PSR_OVF;
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    env->y = (b2 << 31) | (env->y >> 1);
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    FORCE_RET();
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}
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void OPPROTO op_udiv_T1_T0(void)
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{
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    uint64_t x0;
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    uint32_t x1;
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    x0 = T0 | ((uint64_t) (env->y) << 32);
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    x1 = T1;
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    x0 = x0 / x1;
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    if (x0 > 0xffffffff) {
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        T0 = 0xffffffff;
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        T1 = 1;
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    } else {
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        T0 = x0;
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        T1 = 0;
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    }
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    FORCE_RET();
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}
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void OPPROTO op_sdiv_T1_T0(void)
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{
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    int64_t x0;
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    int32_t x1;
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    x0 = T0 | ((uint64_t) (env->y) << 32);
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    x1 = T1;
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    x0 = x0 / x1;
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    if ((int32_t) x0 != x0) {
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        T0 = x0 >> 63;
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        T1 = 1;
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    } else {
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        T0 = x0;
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        T1 = 0;
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    }
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    FORCE_RET();
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}
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void OPPROTO op_div_cc(void)
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{
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    env->psr = 0;
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    if (!T0)
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        env->psr |= PSR_ZERO;
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    if ((int) T0 < 0)
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        env->psr |= PSR_NEG;
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    if (T1)
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        env->psr |= PSR_OVF;
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    FORCE_RET();
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}
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void OPPROTO op_subx_T1_T0(void)
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{
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    T0 -= T1 + ((env->psr & PSR_CARRY) ? 1 : 0);
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}
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void OPPROTO op_logic_T0_cc(void)
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{
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    env->psr = 0;
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    if (!T0)
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        env->psr |= PSR_ZERO;
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    if ((int) T0 < 0)
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        env->psr |= PSR_NEG;
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    FORCE_RET();
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}
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void OPPROTO op_set_flags(void)
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{
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    env->psr = 0;
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    if (!T0)
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        env->psr |= PSR_ZERO;
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    if ((unsigned int) T0 < (unsigned int) T1)
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        env->psr |= PSR_CARRY;
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    if ((int) T0 < (int) T1)
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        env->psr |= PSR_OVF;
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    if ((int) T0 < 0)
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        env->psr |= PSR_NEG;
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    FORCE_RET();
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}
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void OPPROTO op_sll(void)
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{
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    T0 <<= T1;
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}
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void OPPROTO op_srl(void)
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{
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    T0 >>= T1;
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}
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void OPPROTO op_sra(void)
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{
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    T0 = ((int32_t) T0) >> T1;
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}
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void OPPROTO op_st(void)
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{
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    stl((void *) T0, T1);
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}
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void OPPROTO op_stb(void)
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{
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    stb((void *) T0, T1);
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}
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void OPPROTO op_sth(void)
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{
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    stw((void *) T0, T1);
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}
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void OPPROTO op_std(void)
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{
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    stl((void *) T0, T1);
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    stl((void *) (T0 + 4), T2);
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}
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void OPPROTO op_ld(void)
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{
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    T1 = ldl((void *) T0);
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}
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void OPPROTO op_ldub(void)
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{
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    T1 = ldub((void *) T0);
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}
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void OPPROTO op_lduh(void)
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{
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    T1 = lduw((void *) T0);
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}
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void OPPROTO op_ldsb(void)
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{
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    T1 = ldsb((void *) T0);
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}
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void OPPROTO op_ldsh(void)
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{
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    T1 = ldsw((void *) T0);
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}
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void OPPROTO op_ldstub(void)
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{
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    T1 = ldub((void *) T0);
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    stb((void *) T0, 0xff);        /* XXX: Should be Atomically */
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}
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void OPPROTO op_swap(void)
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{
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    unsigned int tmp = ldl((void *) T0);
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    stl((void *) T0, T1);        /* XXX: Should be Atomically */
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    T1 = tmp;
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}
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void OPPROTO op_ldd(void)
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{
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    T1 = ldl((void *) T0);
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    T0 = ldl((void *) (T0 + 4));
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}
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void OPPROTO op_wry(void)
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{
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    env->y = T0;
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}
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void OPPROTO op_rdy(void)
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{
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    T0 = env->y;
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}
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void raise_exception(int tt)
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{
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    env->exception_index = tt;
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    cpu_loop_exit();
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}   
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void memcpy32(uint32_t *dst, const uint32_t *src)
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{
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    dst[0] = src[0];
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    dst[1] = src[1];
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    dst[2] = src[2];
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    dst[3] = src[3];
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    dst[4] = src[4];
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    dst[5] = src[5];
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    dst[6] = src[6];
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    dst[7] = src[7];
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}
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static inline void set_cwp(int new_cwp)
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{
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    /* put the modified wrap registers at their proper location */
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    if (env->cwp == (NWINDOWS - 1))
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        memcpy32(env->regbase, env->regbase + NWINDOWS * 16);
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    env->cwp = new_cwp;
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    /* put the wrap registers at their temporary location */
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    if (new_cwp == (NWINDOWS - 1))
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        memcpy32(env->regbase + NWINDOWS * 16, env->regbase);
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    env->regwptr = env->regbase + (new_cwp * 16);
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}
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/* XXX: use another pointer for %iN registers to avoid slow wrapping
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   handling ? */
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void OPPROTO op_save(void)
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{
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    int cwp;
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    cwp = (env->cwp - 1) & (NWINDOWS - 1); 
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    if (env->wim & (1 << cwp)) {
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        raise_exception(TT_WIN_OVF);
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    }
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    set_cwp(cwp);
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    FORCE_RET();
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}
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void OPPROTO op_restore(void)
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{
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    int cwp;
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    cwp = (env->cwp + 1) & (NWINDOWS - 1); 
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    if (env->wim & (1 << cwp)) {
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        raise_exception(TT_WIN_UNF);
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    }
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    set_cwp(cwp);
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    FORCE_RET();
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}
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void OPPROTO op_exception(void)
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{
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    env->exception_index = PARAM1;
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    cpu_loop_exit();
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}
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void OPPROTO op_trap_T0(void)
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{
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    env->exception_index = TT_TRAP + (T0 & 0x7f);
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    cpu_loop_exit();
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}
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void OPPROTO op_trapcc_T0(void)
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{
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    if (T2) {
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        env->exception_index = TT_TRAP + (T0 & 0x7f);
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        cpu_loop_exit();
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    }
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    FORCE_RET();
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}
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void OPPROTO op_exit_tb(void)
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{
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    EXIT_TB();
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}
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void OPPROTO op_eval_be(void)
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{
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    T2 = (env->psr & PSR_ZERO);
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}
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void OPPROTO op_eval_ble(void)
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{
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    unsigned int Z = FLAG_SET(PSR_ZERO), N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF);
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    T2 = Z | (N ^ V);
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}
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void OPPROTO op_eval_bl(void)
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{
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    unsigned int N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF);
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    T2 = N ^ V;
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}
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void OPPROTO op_eval_bleu(void)
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{
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    unsigned int Z = FLAG_SET(PSR_ZERO), C = FLAG_SET(PSR_CARRY);
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    T2 = C | Z;
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}
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void OPPROTO op_eval_bcs(void)
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{
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    T2 = (env->psr & PSR_CARRY);
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}
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void OPPROTO op_eval_bvs(void)
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{
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    T2 = (env->psr & PSR_OVF);
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}
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void OPPROTO op_eval_bneg(void)
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{
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    T2 = (env->psr & PSR_NEG);
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}
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void OPPROTO op_eval_bne(void)
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{
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    T2 = !(env->psr & PSR_ZERO);
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}
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void OPPROTO op_eval_bg(void)
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{
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    unsigned int Z = FLAG_SET(PSR_ZERO), N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF);
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    T2 = !(Z | (N ^ V));
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}
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void OPPROTO op_eval_bge(void)
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{
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    unsigned int N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF);
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    T2 = !(N ^ V);
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}
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void OPPROTO op_eval_bgu(void)
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{
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    unsigned int Z = FLAG_SET(PSR_ZERO), C = FLAG_SET(PSR_CARRY);
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    T2 = !(C | Z);
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}
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void OPPROTO op_eval_bcc(void)
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{
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    T2 = !(env->psr & PSR_CARRY);
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}
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void OPPROTO op_eval_bpos(void)
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{
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    T2 = !(env->psr & PSR_NEG);
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}
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void OPPROTO op_eval_bvc(void)
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{
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    T2 = !(env->psr & PSR_OVF);
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}
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void OPPROTO op_movl_T2_0(void)
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{
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    T2 = 0;
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}
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void OPPROTO op_movl_T2_1(void)
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{
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    T2 = 1;
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}
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void OPPROTO op_jmp_im(void)
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{
627 cf495bcf bellard
    env->pc = PARAM1;
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}
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void OPPROTO op_movl_npc_im(void)
631 cf495bcf bellard
{
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    env->npc = PARAM1;
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}
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void OPPROTO op_movl_npc_T0(void)
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{
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    env->npc = T0;
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}
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void OPPROTO op_next_insn(void)
641 7a3f1944 bellard
{
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    env->pc = env->npc;
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    env->npc = env->npc + 4;
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}
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void OPPROTO op_branch(void)
647 72cbca10 bellard
{
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    env->npc = PARAM3; /* XXX: optimize */
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    JUMP_TB(op_branch, PARAM1, 0, PARAM2);
650 72cbca10 bellard
}
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652 72cbca10 bellard
void OPPROTO op_branch2(void)
653 7a3f1944 bellard
{
654 cf495bcf bellard
    if (T2) {
655 72cbca10 bellard
        env->npc = PARAM2 + 4; 
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        JUMP_TB(op_branch2, PARAM1, 0, PARAM2);
657 cf495bcf bellard
    } else {
658 72cbca10 bellard
        env->npc = PARAM3 + 4; 
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        JUMP_TB(op_branch2, PARAM1, 1, PARAM3);
660 72cbca10 bellard
    }
661 72cbca10 bellard
    FORCE_RET();
662 72cbca10 bellard
}
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664 72cbca10 bellard
void OPPROTO op_branch_a(void)
665 72cbca10 bellard
{
666 72cbca10 bellard
    if (T2) {
667 72cbca10 bellard
        env->npc = PARAM2; /* XXX: optimize */
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        JUMP_TB(op_generic_branch_a, PARAM1, 0, PARAM3);
669 72cbca10 bellard
    } else {
670 72cbca10 bellard
        env->npc = PARAM3 + 8; /* XXX: optimize */
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        JUMP_TB(op_generic_branch_a, PARAM1, 1, PARAM3 + 4);
672 cf495bcf bellard
    }
673 cf495bcf bellard
    FORCE_RET();
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}
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void OPPROTO op_generic_branch(void)
677 7a3f1944 bellard
{
678 cf495bcf bellard
    if (T2) {
679 cf495bcf bellard
        env->npc = PARAM1;
680 cf495bcf bellard
    } else {
681 72cbca10 bellard
        env->npc = PARAM2;
682 cf495bcf bellard
    }
683 cf495bcf bellard
    FORCE_RET();
684 7a3f1944 bellard
}