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/*
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 *  x86 CPU test
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 * 
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 *  This program is free software; you can redistribute it and/or modify
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 *  it under the terms of the GNU General Public License as published by
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 *  the Free Software Foundation; either version 2 of the License, or
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 *  (at your option) any later version.
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 *
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 *  This program is distributed in the hope that it will be useful,
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 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 *  GNU General Public License for more details.
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 *
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 *  You should have received a copy of the GNU General Public License
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 *  along with this program; if not, write to the Free Software
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 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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 */
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#define _GNU_SOURCE
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#include <math.h>
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#include <signal.h>
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#include <setjmp.h>
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#include <errno.h>
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#include <sys/ucontext.h>
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#include <sys/mman.h>
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#include <asm/vm86.h>
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#define TEST_CMOV  0
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#define TEST_FCOMI 0
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//#define LINUX_VM86_IOPL_FIX
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//#define TEST_P4_FLAGS
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#define xglue(x, y) x ## y
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#define glue(x, y) xglue(x, y)
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#define stringify(s)        tostring(s)
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#define tostring(s)        #s
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#define CC_C           0x0001
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#define CC_P         0x0004
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#define CC_A        0x0010
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#define CC_Z        0x0040
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#define CC_S    0x0080
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#define CC_O    0x0800
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#define __init_call        __attribute__ ((unused,__section__ (".initcall.init")))
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static void *call_start __init_call = NULL;
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#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
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#define OP add
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#include "test-i386.h"
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#define OP sub
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#include "test-i386.h"
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#define OP xor
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#include "test-i386.h"
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#define OP and
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#include "test-i386.h"
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#define OP or
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#include "test-i386.h"
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#define OP cmp
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#include "test-i386.h"
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#define OP adc
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#define OP_CC
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#include "test-i386.h"
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#define OP sbb
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#define OP_CC
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#include "test-i386.h"
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#define OP inc
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#define OP_CC
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#define OP1
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#include "test-i386.h"
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#define OP dec
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#define OP_CC
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#define OP1
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#include "test-i386.h"
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#define OP neg
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#define OP_CC
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#define OP1
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#include "test-i386.h"
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#define OP not
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#define OP_CC
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#define OP1
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#include "test-i386.h"
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#undef CC_MASK
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#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O)
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#define OP shl
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#include "test-i386-shift.h"
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#define OP shr
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#include "test-i386-shift.h"
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#define OP sar
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#include "test-i386-shift.h"
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#define OP rol
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#include "test-i386-shift.h"
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#define OP ror
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#include "test-i386-shift.h"
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#define OP rcr
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#define OP_CC
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#include "test-i386-shift.h"
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#define OP rcl
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#define OP_CC
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#include "test-i386-shift.h"
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#define OP shld
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#define OP_SHIFTD
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#define OP_NOBYTE
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#include "test-i386-shift.h"
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#define OP shrd
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#define OP_SHIFTD
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#define OP_NOBYTE
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#include "test-i386-shift.h"
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/* XXX: should be more precise ? */
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#undef CC_MASK
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#define CC_MASK (CC_C)
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#define OP bt
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#define OP_NOBYTE
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#include "test-i386-shift.h"
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#define OP bts
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#define OP_NOBYTE
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#include "test-i386-shift.h"
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#define OP btr
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#define OP_NOBYTE
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#include "test-i386-shift.h"
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#define OP btc
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#define OP_NOBYTE
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#include "test-i386-shift.h"
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/* lea test (modrm support) */
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#define TEST_LEA(STR)\
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{\
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    asm("leal " STR ", %0"\
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        : "=r" (res)\
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        : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
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    printf("lea %s = %08x\n", STR, res);\
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}
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#define TEST_LEA16(STR)\
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{\
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    asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\
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        : "=wq" (res)\
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        : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
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    printf("lea %s = %08x\n", STR, res);\
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}
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void test_lea(void)
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{
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    int eax, ebx, ecx, edx, esi, edi, res;
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    eax = 0x0001;
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    ebx = 0x0002;
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    ecx = 0x0004;
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    edx = 0x0008;
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    esi = 0x0010;
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    edi = 0x0020;
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    TEST_LEA("0x4000");
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    TEST_LEA("(%%eax)");
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    TEST_LEA("(%%ebx)");
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    TEST_LEA("(%%ecx)");
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    TEST_LEA("(%%edx)");
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    TEST_LEA("(%%esi)");
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    TEST_LEA("(%%edi)");
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    TEST_LEA("0x40(%%eax)");
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    TEST_LEA("0x40(%%ebx)");
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    TEST_LEA("0x40(%%ecx)");
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    TEST_LEA("0x40(%%edx)");
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    TEST_LEA("0x40(%%esi)");
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    TEST_LEA("0x40(%%edi)");
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    TEST_LEA("0x4000(%%eax)");
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    TEST_LEA("0x4000(%%ebx)");
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    TEST_LEA("0x4000(%%ecx)");
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    TEST_LEA("0x4000(%%edx)");
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    TEST_LEA("0x4000(%%esi)");
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    TEST_LEA("0x4000(%%edi)");
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    TEST_LEA("(%%eax, %%ecx)");
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    TEST_LEA("(%%ebx, %%edx)");
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    TEST_LEA("(%%ecx, %%ecx)");
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    TEST_LEA("(%%edx, %%ecx)");
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    TEST_LEA("(%%esi, %%ecx)");
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    TEST_LEA("(%%edi, %%ecx)");
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    TEST_LEA("0x40(%%eax, %%ecx)");
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    TEST_LEA("0x4000(%%ebx, %%edx)");
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    TEST_LEA("(%%ecx, %%ecx, 2)");
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    TEST_LEA("(%%edx, %%ecx, 4)");
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    TEST_LEA("(%%esi, %%ecx, 8)");
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    TEST_LEA("(,%%eax, 2)");
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    TEST_LEA("(,%%ebx, 4)");
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    TEST_LEA("(,%%ecx, 8)");
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    TEST_LEA("0x40(,%%eax, 2)");
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    TEST_LEA("0x40(,%%ebx, 4)");
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    TEST_LEA("0x40(,%%ecx, 8)");
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    TEST_LEA("-10(%%ecx, %%ecx, 2)");
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    TEST_LEA("-10(%%edx, %%ecx, 4)");
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    TEST_LEA("-10(%%esi, %%ecx, 8)");
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    TEST_LEA("0x4000(%%ecx, %%ecx, 2)");
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    TEST_LEA("0x4000(%%edx, %%ecx, 4)");
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    TEST_LEA("0x4000(%%esi, %%ecx, 8)");
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    /* limited 16 bit addressing test */
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    TEST_LEA16("0x4000");
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    TEST_LEA16("(%%bx)");
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    TEST_LEA16("(%%si)");
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    TEST_LEA16("(%%di)");
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    TEST_LEA16("0x40(%%bx)");
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    TEST_LEA16("0x40(%%si)");
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    TEST_LEA16("0x40(%%di)");
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    TEST_LEA16("0x4000(%%bx)");
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    TEST_LEA16("0x4000(%%si)");
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    TEST_LEA16("(%%bx,%%si)");
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    TEST_LEA16("(%%bx,%%di)");
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    TEST_LEA16("0x40(%%bx,%%si)");
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    TEST_LEA16("0x40(%%bx,%%di)");
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    TEST_LEA16("0x4000(%%bx,%%si)");
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    TEST_LEA16("0x4000(%%bx,%%di)");
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}
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#define TEST_JCC(JCC, v1, v2)\
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{\
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    int res;\
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    asm("movl $1, %0\n\t"\
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        "cmpl %2, %1\n\t"\
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        "j" JCC " 1f\n\t"\
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        "movl $0, %0\n\t"\
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        "1:\n\t"\
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        : "=r" (res)\
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        : "r" (v1), "r" (v2));\
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    printf("%-10s %d\n", "j" JCC, res);\
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\
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    asm("movl $0, %0\n\t"\
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        "cmpl %2, %1\n\t"\
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        "set" JCC " %b0\n\t"\
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        : "=r" (res)\
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        : "r" (v1), "r" (v2));\
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    printf("%-10s %d\n", "set" JCC, res);\
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 if (TEST_CMOV) {\
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    asm("movl $0x12345678, %0\n\t"\
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        "cmpl %2, %1\n\t"\
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        "cmov" JCC "l %3, %0\n\t"\
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        : "=r" (res)\
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        : "r" (v1), "r" (v2), "m" (1));\
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        printf("%-10s R=0x%08x\n", "cmov" JCC "l", res);\
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    asm("movl $0x12345678, %0\n\t"\
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        "cmpl %2, %1\n\t"\
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        "cmov" JCC "w %w3, %w0\n\t"\
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        : "=r" (res)\
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        : "r" (v1), "r" (v2), "r" (1));\
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        printf("%-10s R=0x%08x\n", "cmov" JCC "w", res);\
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 } \
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}
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/* various jump tests */
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void test_jcc(void)
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{
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    TEST_JCC("ne", 1, 1);
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    TEST_JCC("ne", 1, 0);
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    TEST_JCC("e", 1, 1);
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    TEST_JCC("e", 1, 0);
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    TEST_JCC("l", 1, 1);
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    TEST_JCC("l", 1, 0);
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    TEST_JCC("l", 1, -1);
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    TEST_JCC("le", 1, 1);
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    TEST_JCC("le", 1, 0);
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    TEST_JCC("le", 1, -1);
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    TEST_JCC("ge", 1, 1);
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    TEST_JCC("ge", 1, 0);
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    TEST_JCC("ge", -1, 1);
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    TEST_JCC("g", 1, 1);
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    TEST_JCC("g", 1, 0);
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    TEST_JCC("g", 1, -1);
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    TEST_JCC("b", 1, 1);
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    TEST_JCC("b", 1, 0);
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    TEST_JCC("b", 1, -1);
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    TEST_JCC("be", 1, 1);
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    TEST_JCC("be", 1, 0);
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    TEST_JCC("be", 1, -1);
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    TEST_JCC("ae", 1, 1);
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    TEST_JCC("ae", 1, 0);
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    TEST_JCC("ae", 1, -1);
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    TEST_JCC("a", 1, 1);
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    TEST_JCC("a", 1, 0);
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    TEST_JCC("a", 1, -1);
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    TEST_JCC("p", 1, 1);
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    TEST_JCC("p", 1, 0);
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    TEST_JCC("np", 1, 1);
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    TEST_JCC("np", 1, 0);
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    TEST_JCC("o", 0x7fffffff, 0);
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    TEST_JCC("o", 0x7fffffff, -1);
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    TEST_JCC("no", 0x7fffffff, 0);
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    TEST_JCC("no", 0x7fffffff, -1);
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    TEST_JCC("s", 0, 1);
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    TEST_JCC("s", 0, -1);
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    TEST_JCC("s", 0, 0);
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    TEST_JCC("ns", 0, 1);
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    TEST_JCC("ns", 0, -1);
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    TEST_JCC("ns", 0, 0);
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}
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#undef CC_MASK
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#ifdef TEST_P4_FLAGS
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#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
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#else
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#define CC_MASK (CC_O | CC_C)
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#endif
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#define OP mul
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#include "test-i386-muldiv.h"
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#define OP imul
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#include "test-i386-muldiv.h"
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void test_imulw2(int op0, int op1) 
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{
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    int res, s1, s0, flags;
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    s0 = op0;
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    s1 = op1;
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    res = s0;
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    flags = 0;
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    asm ("push %4\n\t"
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         "popf\n\t"
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         "imulw %w2, %w0\n\t" 
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         "pushf\n\t"
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         "popl %1\n\t"
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         : "=q" (res), "=g" (flags)
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         : "q" (s1), "0" (res), "1" (flags));
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    printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
383 4b74fe1f bellard
           "imulw", s0, s1, res, flags & CC_MASK);
384 4b74fe1f bellard
}
385 4b74fe1f bellard
386 4b74fe1f bellard
void test_imull2(int op0, int op1) 
387 4b74fe1f bellard
{
388 4b74fe1f bellard
    int res, s1, s0, flags;
389 4b74fe1f bellard
    s0 = op0;
390 4b74fe1f bellard
    s1 = op1;
391 4b74fe1f bellard
    res = s0;
392 4b74fe1f bellard
    flags = 0;
393 4b74fe1f bellard
    asm ("push %4\n\t"
394 4b74fe1f bellard
         "popf\n\t"
395 4b74fe1f bellard
         "imull %2, %0\n\t" 
396 4b74fe1f bellard
         "pushf\n\t"
397 4b74fe1f bellard
         "popl %1\n\t"
398 4b74fe1f bellard
         : "=q" (res), "=g" (flags)
399 4b74fe1f bellard
         : "q" (s1), "0" (res), "1" (flags));
400 4b74fe1f bellard
    printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
401 4b74fe1f bellard
           "imull", s0, s1, res, flags & CC_MASK);
402 4b74fe1f bellard
}
403 4b74fe1f bellard
404 791c2261 bellard
#undef CC_MASK
405 791c2261 bellard
#define CC_MASK (0)
406 791c2261 bellard
407 791c2261 bellard
#define OP div
408 791c2261 bellard
#include "test-i386-muldiv.h"
409 791c2261 bellard
410 791c2261 bellard
#define OP idiv
411 791c2261 bellard
#include "test-i386-muldiv.h"
412 791c2261 bellard
413 4b74fe1f bellard
void test_mul(void)
414 4b74fe1f bellard
{
415 4b74fe1f bellard
    test_imulb(0x1234561d, 4);
416 4b74fe1f bellard
    test_imulb(3, -4);
417 4b74fe1f bellard
    test_imulb(0x80, 0x80);
418 4b74fe1f bellard
    test_imulb(0x10, 0x10);
419 4b74fe1f bellard
420 4b74fe1f bellard
    test_imulw(0, 0x1234001d, 45);
421 4b74fe1f bellard
    test_imulw(0, 23, -45);
422 4b74fe1f bellard
    test_imulw(0, 0x8000, 0x8000);
423 4b74fe1f bellard
    test_imulw(0, 0x100, 0x100);
424 4b74fe1f bellard
425 4b74fe1f bellard
    test_imull(0, 0x1234001d, 45);
426 4b74fe1f bellard
    test_imull(0, 23, -45);
427 4b74fe1f bellard
    test_imull(0, 0x80000000, 0x80000000);
428 4b74fe1f bellard
    test_imull(0, 0x10000, 0x10000);
429 4b74fe1f bellard
430 4b74fe1f bellard
    test_mulb(0x1234561d, 4);
431 4b74fe1f bellard
    test_mulb(3, -4);
432 4b74fe1f bellard
    test_mulb(0x80, 0x80);
433 4b74fe1f bellard
    test_mulb(0x10, 0x10);
434 4b74fe1f bellard
435 4b74fe1f bellard
    test_mulw(0, 0x1234001d, 45);
436 4b74fe1f bellard
    test_mulw(0, 23, -45);
437 4b74fe1f bellard
    test_mulw(0, 0x8000, 0x8000);
438 4b74fe1f bellard
    test_mulw(0, 0x100, 0x100);
439 4b74fe1f bellard
440 4b74fe1f bellard
    test_mull(0, 0x1234001d, 45);
441 4b74fe1f bellard
    test_mull(0, 23, -45);
442 4b74fe1f bellard
    test_mull(0, 0x80000000, 0x80000000);
443 4b74fe1f bellard
    test_mull(0, 0x10000, 0x10000);
444 4b74fe1f bellard
445 4b74fe1f bellard
    test_imulw2(0x1234001d, 45);
446 4b74fe1f bellard
    test_imulw2(23, -45);
447 4b74fe1f bellard
    test_imulw2(0x8000, 0x8000);
448 4b74fe1f bellard
    test_imulw2(0x100, 0x100);
449 4b74fe1f bellard
450 4b74fe1f bellard
    test_imull2(0x1234001d, 45);
451 4b74fe1f bellard
    test_imull2(23, -45);
452 4b74fe1f bellard
    test_imull2(0x80000000, 0x80000000);
453 4b74fe1f bellard
    test_imull2(0x10000, 0x10000);
454 4b74fe1f bellard
455 4b74fe1f bellard
    test_idivb(0x12341678, 0x127e);
456 4b74fe1f bellard
    test_idivb(0x43210123, -5);
457 4b74fe1f bellard
    test_idivb(0x12340004, -1);
458 4b74fe1f bellard
459 4b74fe1f bellard
    test_idivw(0, 0x12345678, 12347);
460 4b74fe1f bellard
    test_idivw(0, -23223, -45);
461 4b74fe1f bellard
    test_idivw(0, 0x12348000, -1);
462 4b74fe1f bellard
    test_idivw(0x12343, 0x12345678, 0x81238567);
463 4b74fe1f bellard
464 4b74fe1f bellard
    test_idivl(0, 0x12345678, 12347);
465 4b74fe1f bellard
    test_idivl(0, -233223, -45);
466 4b74fe1f bellard
    test_idivl(0, 0x80000000, -1);
467 4b74fe1f bellard
    test_idivl(0x12343, 0x12345678, 0x81234567);
468 4b74fe1f bellard
469 4b74fe1f bellard
    test_divb(0x12341678, 0x127e);
470 4b74fe1f bellard
    test_divb(0x43210123, -5);
471 4b74fe1f bellard
    test_divb(0x12340004, -1);
472 4b74fe1f bellard
473 4b74fe1f bellard
    test_divw(0, 0x12345678, 12347);
474 4b74fe1f bellard
    test_divw(0, -23223, -45);
475 4b74fe1f bellard
    test_divw(0, 0x12348000, -1);
476 4b74fe1f bellard
    test_divw(0x12343, 0x12345678, 0x81238567);
477 4b74fe1f bellard
478 4b74fe1f bellard
    test_divl(0, 0x12345678, 12347);
479 4b74fe1f bellard
    test_divl(0, -233223, -45);
480 4b74fe1f bellard
    test_divl(0, 0x80000000, -1);
481 4b74fe1f bellard
    test_divl(0x12343, 0x12345678, 0x81234567);
482 4b74fe1f bellard
}
483 4b74fe1f bellard
484 9d8e9c09 bellard
#define TEST_BSX(op, size, op0)\
485 9d8e9c09 bellard
{\
486 9d8e9c09 bellard
    int res, val, resz;\
487 9d8e9c09 bellard
    val = op0;\
488 9d8e9c09 bellard
    asm("xorl %1, %1 ; " #op " %" size "2, %" size "0 ; setz %b1" \
489 9d8e9c09 bellard
        : "=r" (res), "=q" (resz)\
490 9d8e9c09 bellard
        : "g" (val));\
491 9d8e9c09 bellard
    printf("%-10s A=%08x R=%08x %d\n", #op, val, resz ? 0 : res, resz);\
492 9d8e9c09 bellard
}
493 9d8e9c09 bellard
494 9d8e9c09 bellard
void test_bsx(void)
495 9d8e9c09 bellard
{
496 9d8e9c09 bellard
    TEST_BSX(bsrw, "w", 0);
497 9d8e9c09 bellard
    TEST_BSX(bsrw, "w", 0x12340128);
498 9d8e9c09 bellard
    TEST_BSX(bsrl, "", 0);
499 9d8e9c09 bellard
    TEST_BSX(bsrl, "", 0x00340128);
500 9d8e9c09 bellard
    TEST_BSX(bsfw, "w", 0);
501 9d8e9c09 bellard
    TEST_BSX(bsfw, "w", 0x12340128);
502 9d8e9c09 bellard
    TEST_BSX(bsfl, "", 0);
503 9d8e9c09 bellard
    TEST_BSX(bsfl, "", 0x00340128);
504 9d8e9c09 bellard
}
505 9d8e9c09 bellard
506 55480af8 bellard
/**********************************************/
507 55480af8 bellard
508 9d8e9c09 bellard
void test_fops(double a, double b)
509 9d8e9c09 bellard
{
510 9d8e9c09 bellard
    printf("a=%f b=%f a+b=%f\n", a, b, a + b);
511 9d8e9c09 bellard
    printf("a=%f b=%f a-b=%f\n", a, b, a - b);
512 9d8e9c09 bellard
    printf("a=%f b=%f a*b=%f\n", a, b, a * b);
513 9d8e9c09 bellard
    printf("a=%f b=%f a/b=%f\n", a, b, a / b);
514 9d8e9c09 bellard
    printf("a=%f b=%f fmod(a, b)=%f\n", a, b, fmod(a, b));
515 9d8e9c09 bellard
    printf("a=%f sqrt(a)=%f\n", a, sqrt(a));
516 9d8e9c09 bellard
    printf("a=%f sin(a)=%f\n", a, sin(a));
517 9d8e9c09 bellard
    printf("a=%f cos(a)=%f\n", a, cos(a));
518 9d8e9c09 bellard
    printf("a=%f tan(a)=%f\n", a, tan(a));
519 9d8e9c09 bellard
    printf("a=%f log(a)=%f\n", a, log(a));
520 9d8e9c09 bellard
    printf("a=%f exp(a)=%f\n", a, exp(a));
521 9d8e9c09 bellard
    printf("a=%f b=%f atan2(a, b)=%f\n", a, b, atan2(a, b));
522 9d8e9c09 bellard
    /* just to test some op combining */
523 9d8e9c09 bellard
    printf("a=%f asin(sin(a))=%f\n", a, asin(sin(a)));
524 9d8e9c09 bellard
    printf("a=%f acos(cos(a))=%f\n", a, acos(cos(a)));
525 9d8e9c09 bellard
    printf("a=%f atan(tan(a))=%f\n", a, atan(tan(a)));
526 9d8e9c09 bellard
527 9d8e9c09 bellard
}
528 9d8e9c09 bellard
529 9d8e9c09 bellard
void test_fcmp(double a, double b)
530 9d8e9c09 bellard
{
531 9d8e9c09 bellard
    printf("(%f<%f)=%d\n",
532 9d8e9c09 bellard
           a, b, a < b);
533 9d8e9c09 bellard
    printf("(%f<=%f)=%d\n",
534 9d8e9c09 bellard
           a, b, a <= b);
535 9d8e9c09 bellard
    printf("(%f==%f)=%d\n",
536 9d8e9c09 bellard
           a, b, a == b);
537 9d8e9c09 bellard
    printf("(%f>%f)=%d\n",
538 9d8e9c09 bellard
           a, b, a > b);
539 9d8e9c09 bellard
    printf("(%f<=%f)=%d\n",
540 9d8e9c09 bellard
           a, b, a >= b);
541 03bfca94 bellard
    if (TEST_FCOMI) {
542 03bfca94 bellard
        unsigned int eflags;
543 03bfca94 bellard
        /* test f(u)comi instruction */
544 03bfca94 bellard
        asm("fcomi %2, %1\n"
545 03bfca94 bellard
            "pushf\n"
546 03bfca94 bellard
            "pop %0\n"
547 03bfca94 bellard
            : "=r" (eflags)
548 03bfca94 bellard
            : "t" (a), "u" (b));
549 03bfca94 bellard
        printf("fcomi(%f %f)=%08x\n", a, b, eflags & (CC_Z | CC_P | CC_C));
550 03bfca94 bellard
    }
551 9d8e9c09 bellard
}
552 9d8e9c09 bellard
553 9d8e9c09 bellard
void test_fcvt(double a)
554 9d8e9c09 bellard
{
555 9d8e9c09 bellard
    float fa;
556 9d8e9c09 bellard
    long double la;
557 ea768640 bellard
    int16_t fpuc;
558 ea768640 bellard
    int i;
559 ea768640 bellard
    int64_t lla;
560 ea768640 bellard
    int ia;
561 ea768640 bellard
    int16_t wa;
562 ea768640 bellard
    double ra;
563 9d8e9c09 bellard
564 9d8e9c09 bellard
    fa = a;
565 9d8e9c09 bellard
    la = a;
566 9d8e9c09 bellard
    printf("(float)%f = %f\n", a, fa);
567 9d8e9c09 bellard
    printf("(long double)%f = %Lf\n", a, la);
568 c5e9815d bellard
    printf("a=%016Lx\n", *(long long *)&a);
569 c5e9815d bellard
    printf("la=%016Lx %04x\n", *(long long *)&la, 
570 c5e9815d bellard
           *(unsigned short *)((char *)(&la) + 8));
571 ea768640 bellard
572 ea768640 bellard
    /* test all roundings */
573 ea768640 bellard
    asm volatile ("fstcw %0" : "=m" (fpuc));
574 ea768640 bellard
    for(i=0;i<4;i++) {
575 ea768640 bellard
        asm volatile ("fldcw %0" : : "m" ((fpuc & ~0x0c00) | (i << 10)));
576 ea768640 bellard
        asm volatile ("fist %0" : "=m" (wa) : "t" (a));
577 ea768640 bellard
        asm volatile ("fistl %0" : "=m" (ia) : "t" (a));
578 ea768640 bellard
        asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st");
579 ea768640 bellard
        asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a));
580 ea768640 bellard
        asm volatile ("fldcw %0" : : "m" (fpuc));
581 ea768640 bellard
        printf("(short)a = %d\n", wa);
582 ea768640 bellard
        printf("(int)a = %d\n", ia);
583 ea768640 bellard
        printf("(int64_t)a = %Ld\n", lla);
584 ea768640 bellard
        printf("rint(a) = %f\n", ra);
585 ea768640 bellard
    }
586 9d8e9c09 bellard
}
587 9d8e9c09 bellard
588 9d8e9c09 bellard
#define TEST(N) \
589 9d8e9c09 bellard
    asm("fld" #N : "=t" (a)); \
590 9d8e9c09 bellard
    printf("fld" #N "= %f\n", a);
591 9d8e9c09 bellard
592 9d8e9c09 bellard
void test_fconst(void)
593 9d8e9c09 bellard
{
594 9d8e9c09 bellard
    double a;
595 9d8e9c09 bellard
    TEST(1);
596 9d8e9c09 bellard
    TEST(l2t);
597 9d8e9c09 bellard
    TEST(l2e);
598 9d8e9c09 bellard
    TEST(pi);
599 9d8e9c09 bellard
    TEST(lg2);
600 9d8e9c09 bellard
    TEST(ln2);
601 9d8e9c09 bellard
    TEST(z);
602 9d8e9c09 bellard
}
603 9d8e9c09 bellard
604 c5e9815d bellard
void test_fbcd(double a)
605 c5e9815d bellard
{
606 c5e9815d bellard
    unsigned short bcd[5];
607 c5e9815d bellard
    double b;
608 c5e9815d bellard
609 c5e9815d bellard
    asm("fbstp %0" : "=m" (bcd[0]) : "t" (a) : "st");
610 c5e9815d bellard
    asm("fbld %1" : "=t" (b) : "m" (bcd[0]));
611 c5e9815d bellard
    printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n", 
612 c5e9815d bellard
           a, bcd[4], bcd[3], bcd[2], bcd[1], bcd[0], b);
613 c5e9815d bellard
}
614 c5e9815d bellard
615 03bfca94 bellard
#define TEST_ENV(env, prefix)\
616 03bfca94 bellard
{\
617 03bfca94 bellard
    memset((env), 0xaa, sizeof(*(env)));\
618 03bfca94 bellard
    asm("fld1\n"\
619 03bfca94 bellard
        prefix "fnstenv %1\n"\
620 03bfca94 bellard
        prefix "fldenv %1\n"\
621 e3e86d56 bellard
        : "=t" (res) : "m" (*(env)));\
622 03bfca94 bellard
    printf("res=%f\n", res);\
623 03bfca94 bellard
    printf("fpuc=%04x fpus=%04x fptag=%04x\n",\
624 03bfca94 bellard
           (env)->fpuc,\
625 03bfca94 bellard
           (env)->fpus & 0xff00,\
626 03bfca94 bellard
           (env)->fptag);\
627 03bfca94 bellard
    memset((env), 0xaa, sizeof(*(env)));\
628 03bfca94 bellard
    asm("fld1\n"\
629 03bfca94 bellard
        prefix "fnsave %1\n"\
630 03bfca94 bellard
        prefix "frstor %1\n"\
631 e3e86d56 bellard
        : "=t" (res) : "m" (*(env)));\
632 03bfca94 bellard
    printf("res=%f\n", res);\
633 03bfca94 bellard
    printf("fpuc=%04x fpus=%04x fptag=%04x\n",\
634 03bfca94 bellard
           (env)->fpuc,\
635 03bfca94 bellard
           (env)->fpus & 0xff00,\
636 03bfca94 bellard
           (env)->fptag);\
637 03bfca94 bellard
    printf("ST(0) = %Lf\n",\
638 03bfca94 bellard
           (env)->fpregs[0]);\
639 03bfca94 bellard
}
640 03bfca94 bellard
641 03bfca94 bellard
void test_fenv(void)
642 03bfca94 bellard
{
643 03bfca94 bellard
    struct __attribute__((packed)) {
644 03bfca94 bellard
        uint16_t fpuc;
645 03bfca94 bellard
        uint16_t dummy1;
646 03bfca94 bellard
        uint16_t fpus;
647 03bfca94 bellard
        uint16_t dummy2;
648 03bfca94 bellard
        uint16_t fptag;
649 03bfca94 bellard
        uint16_t dummy3;
650 03bfca94 bellard
        uint32_t ignored[4];
651 03bfca94 bellard
        long double fpregs[8];
652 03bfca94 bellard
    } float_env32;
653 03bfca94 bellard
    struct __attribute__((packed)) {
654 03bfca94 bellard
        uint16_t fpuc;
655 03bfca94 bellard
        uint16_t fpus;
656 03bfca94 bellard
        uint16_t fptag;
657 03bfca94 bellard
        uint16_t ignored[4];
658 03bfca94 bellard
        long double fpregs[8];
659 03bfca94 bellard
    } float_env16;
660 03bfca94 bellard
    double res;
661 03bfca94 bellard
662 03bfca94 bellard
    TEST_ENV(&float_env16, "data16 ");
663 03bfca94 bellard
    TEST_ENV(&float_env32, "");
664 03bfca94 bellard
}
665 03bfca94 bellard
666 75175024 bellard
667 75175024 bellard
#define TEST_FCMOV(a, b, eflags, CC)\
668 75175024 bellard
{\
669 75175024 bellard
    double res;\
670 75175024 bellard
    asm("push %3\n"\
671 75175024 bellard
        "popf\n"\
672 75175024 bellard
        "fcmov" CC " %2, %0\n"\
673 75175024 bellard
        : "=t" (res)\
674 75175024 bellard
        : "0" (a), "u" (b), "g" (eflags));\
675 75175024 bellard
    printf("fcmov%s eflags=0x%04x-> %f\n", \
676 75175024 bellard
           CC, eflags, res);\
677 75175024 bellard
}
678 75175024 bellard
679 75175024 bellard
void test_fcmov(void)
680 75175024 bellard
{
681 75175024 bellard
    double a, b;
682 75175024 bellard
    int eflags, i;
683 75175024 bellard
684 75175024 bellard
    a = 1.0;
685 75175024 bellard
    b = 2.0;
686 75175024 bellard
    for(i = 0; i < 4; i++) {
687 75175024 bellard
        eflags = 0;
688 75175024 bellard
        if (i & 1)
689 75175024 bellard
            eflags |= CC_C;
690 75175024 bellard
        if (i & 2)
691 75175024 bellard
            eflags |= CC_Z;
692 75175024 bellard
        TEST_FCMOV(a, b, eflags, "b");
693 75175024 bellard
        TEST_FCMOV(a, b, eflags, "e");
694 75175024 bellard
        TEST_FCMOV(a, b, eflags, "be");
695 75175024 bellard
        TEST_FCMOV(a, b, eflags, "nb");
696 75175024 bellard
        TEST_FCMOV(a, b, eflags, "ne");
697 75175024 bellard
        TEST_FCMOV(a, b, eflags, "nbe");
698 75175024 bellard
    }
699 75175024 bellard
    TEST_FCMOV(a, b, 0, "u");
700 9cdf757f bellard
    TEST_FCMOV(a, b, CC_P, "u");
701 9cdf757f bellard
    TEST_FCMOV(a, b, 0, "nu");
702 75175024 bellard
    TEST_FCMOV(a, b, CC_P, "nu");
703 75175024 bellard
}
704 75175024 bellard
705 9d8e9c09 bellard
void test_floats(void)
706 9d8e9c09 bellard
{
707 9d8e9c09 bellard
    test_fops(2, 3);
708 9d8e9c09 bellard
    test_fops(1.4, -5);
709 9d8e9c09 bellard
    test_fcmp(2, -1);
710 9d8e9c09 bellard
    test_fcmp(2, 2);
711 9d8e9c09 bellard
    test_fcmp(2, 3);
712 ea768640 bellard
    test_fcvt(0.5);
713 ea768640 bellard
    test_fcvt(-0.5);
714 9d8e9c09 bellard
    test_fcvt(1.0/7.0);
715 9d8e9c09 bellard
    test_fcvt(-1.0/9.0);
716 ea768640 bellard
    test_fcvt(32768);
717 ea768640 bellard
    test_fcvt(-1e20);
718 9d8e9c09 bellard
    test_fconst();
719 c5e9815d bellard
    test_fbcd(1234567890123456);
720 c5e9815d bellard
    test_fbcd(-123451234567890);
721 03bfca94 bellard
    test_fenv();
722 75175024 bellard
    if (TEST_CMOV) {
723 75175024 bellard
        test_fcmov();
724 75175024 bellard
    }
725 9d8e9c09 bellard
}
726 4b74fe1f bellard
727 55480af8 bellard
/**********************************************/
728 55480af8 bellard
729 55480af8 bellard
#define TEST_BCD(op, op0, cc_in, cc_mask)\
730 55480af8 bellard
{\
731 55480af8 bellard
    int res, flags;\
732 55480af8 bellard
    res = op0;\
733 55480af8 bellard
    flags = cc_in;\
734 55480af8 bellard
    asm ("push %3\n\t"\
735 55480af8 bellard
         "popf\n\t"\
736 55480af8 bellard
         #op "\n\t"\
737 55480af8 bellard
         "pushf\n\t"\
738 55480af8 bellard
         "popl %1\n\t"\
739 55480af8 bellard
        : "=a" (res), "=g" (flags)\
740 55480af8 bellard
        : "0" (res), "1" (flags));\
741 55480af8 bellard
    printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",\
742 55480af8 bellard
           #op, op0, res, cc_in, flags & cc_mask);\
743 55480af8 bellard
}
744 55480af8 bellard
745 55480af8 bellard
void test_bcd(void)
746 55480af8 bellard
{
747 55480af8 bellard
    TEST_BCD(daa, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
748 55480af8 bellard
    TEST_BCD(daa, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
749 55480af8 bellard
    TEST_BCD(daa, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
750 55480af8 bellard
    TEST_BCD(daa, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
751 55480af8 bellard
    TEST_BCD(daa, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
752 55480af8 bellard
    TEST_BCD(daa, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
753 55480af8 bellard
    TEST_BCD(daa, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
754 55480af8 bellard
    TEST_BCD(daa, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
755 55480af8 bellard
    TEST_BCD(daa, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
756 55480af8 bellard
    TEST_BCD(daa, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
757 55480af8 bellard
    TEST_BCD(daa, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
758 55480af8 bellard
    TEST_BCD(daa, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
759 55480af8 bellard
    TEST_BCD(daa, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
760 55480af8 bellard
761 55480af8 bellard
    TEST_BCD(das, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
762 55480af8 bellard
    TEST_BCD(das, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
763 55480af8 bellard
    TEST_BCD(das, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
764 55480af8 bellard
    TEST_BCD(das, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
765 55480af8 bellard
    TEST_BCD(das, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
766 55480af8 bellard
    TEST_BCD(das, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
767 55480af8 bellard
    TEST_BCD(das, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
768 55480af8 bellard
    TEST_BCD(das, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
769 55480af8 bellard
    TEST_BCD(das, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
770 55480af8 bellard
    TEST_BCD(das, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
771 55480af8 bellard
    TEST_BCD(das, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
772 55480af8 bellard
    TEST_BCD(das, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
773 55480af8 bellard
    TEST_BCD(das, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
774 55480af8 bellard
775 55480af8 bellard
    TEST_BCD(aaa, 0x12340205, CC_A, (CC_C | CC_A));
776 55480af8 bellard
    TEST_BCD(aaa, 0x12340306, CC_A, (CC_C | CC_A));
777 55480af8 bellard
    TEST_BCD(aaa, 0x1234040a, CC_A, (CC_C | CC_A));
778 55480af8 bellard
    TEST_BCD(aaa, 0x123405fa, CC_A, (CC_C | CC_A));
779 55480af8 bellard
    TEST_BCD(aaa, 0x12340205, 0, (CC_C | CC_A));
780 55480af8 bellard
    TEST_BCD(aaa, 0x12340306, 0, (CC_C | CC_A));
781 55480af8 bellard
    TEST_BCD(aaa, 0x1234040a, 0, (CC_C | CC_A));
782 55480af8 bellard
    TEST_BCD(aaa, 0x123405fa, 0, (CC_C | CC_A));
783 55480af8 bellard
    
784 55480af8 bellard
    TEST_BCD(aas, 0x12340205, CC_A, (CC_C | CC_A));
785 55480af8 bellard
    TEST_BCD(aas, 0x12340306, CC_A, (CC_C | CC_A));
786 55480af8 bellard
    TEST_BCD(aas, 0x1234040a, CC_A, (CC_C | CC_A));
787 55480af8 bellard
    TEST_BCD(aas, 0x123405fa, CC_A, (CC_C | CC_A));
788 55480af8 bellard
    TEST_BCD(aas, 0x12340205, 0, (CC_C | CC_A));
789 55480af8 bellard
    TEST_BCD(aas, 0x12340306, 0, (CC_C | CC_A));
790 55480af8 bellard
    TEST_BCD(aas, 0x1234040a, 0, (CC_C | CC_A));
791 55480af8 bellard
    TEST_BCD(aas, 0x123405fa, 0, (CC_C | CC_A));
792 55480af8 bellard
793 55480af8 bellard
    TEST_BCD(aam, 0x12340547, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
794 55480af8 bellard
    TEST_BCD(aad, 0x12340407, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
795 55480af8 bellard
}
796 55480af8 bellard
797 e5918247 bellard
#define TEST_XCHG(op, size, opconst)\
798 e5918247 bellard
{\
799 e5918247 bellard
    int op0, op1;\
800 e5918247 bellard
    op0 = 0x12345678;\
801 e5918247 bellard
    op1 = 0xfbca7654;\
802 e5918247 bellard
    asm(#op " %" size "0, %" size "1" \
803 e5918247 bellard
        : "=q" (op0), opconst (op1) \
804 e5918247 bellard
        : "0" (op0), "1" (op1));\
805 e5918247 bellard
    printf("%-10s A=%08x B=%08x\n",\
806 e5918247 bellard
           #op, op0, op1);\
807 e5918247 bellard
}
808 e5918247 bellard
809 e5918247 bellard
#define TEST_CMPXCHG(op, size, opconst, eax)\
810 e5918247 bellard
{\
811 e5918247 bellard
    int op0, op1;\
812 e5918247 bellard
    op0 = 0x12345678;\
813 e5918247 bellard
    op1 = 0xfbca7654;\
814 e5918247 bellard
    asm(#op " %" size "0, %" size "1" \
815 e5918247 bellard
        : "=q" (op0), opconst (op1) \
816 e5918247 bellard
        : "0" (op0), "1" (op1), "a" (eax));\
817 e5918247 bellard
    printf("%-10s EAX=%08x A=%08x C=%08x\n",\
818 e5918247 bellard
           #op, eax, op0, op1);\
819 e5918247 bellard
}
820 e5918247 bellard
821 e5918247 bellard
void test_xchg(void)
822 e5918247 bellard
{
823 e5918247 bellard
    TEST_XCHG(xchgl, "", "=q");
824 e5918247 bellard
    TEST_XCHG(xchgw, "w", "=q");
825 e5918247 bellard
    TEST_XCHG(xchgb, "b", "=q");
826 e5918247 bellard
827 e5918247 bellard
    TEST_XCHG(xchgl, "", "=m");
828 e5918247 bellard
    TEST_XCHG(xchgw, "w", "=m");
829 e5918247 bellard
    TEST_XCHG(xchgb, "b", "=m");
830 e5918247 bellard
831 e5918247 bellard
    TEST_XCHG(xaddl, "", "=q");
832 e5918247 bellard
    TEST_XCHG(xaddw, "w", "=q");
833 e5918247 bellard
    TEST_XCHG(xaddb, "b", "=q");
834 e5918247 bellard
835 d575b78a bellard
    {
836 d575b78a bellard
        int res;
837 d575b78a bellard
        res = 0x12345678;
838 d575b78a bellard
        asm("xaddl %1, %0" : "=r" (res) : "0" (res));
839 d575b78a bellard
        printf("xaddl same res=%08x\n", res);
840 d575b78a bellard
    }
841 d575b78a bellard
842 e5918247 bellard
    TEST_XCHG(xaddl, "", "=m");
843 e5918247 bellard
    TEST_XCHG(xaddw, "w", "=m");
844 e5918247 bellard
    TEST_XCHG(xaddb, "b", "=m");
845 e5918247 bellard
846 e5918247 bellard
    TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfbca7654);
847 e5918247 bellard
    TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfbca7654);
848 e5918247 bellard
    TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfbca7654);
849 e5918247 bellard
850 e5918247 bellard
    TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfffefdfc);
851 e5918247 bellard
    TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfffefdfc);
852 e5918247 bellard
    TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfffefdfc);
853 e5918247 bellard
854 e5918247 bellard
    TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfbca7654);
855 e5918247 bellard
    TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfbca7654);
856 e5918247 bellard
    TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfbca7654);
857 e5918247 bellard
858 e5918247 bellard
    TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfffefdfc);
859 e5918247 bellard
    TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfffefdfc);
860 e5918247 bellard
    TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfffefdfc);
861 d575b78a bellard
862 d575b78a bellard
    {
863 d575b78a bellard
        uint64_t op0, op1, op2;
864 d575b78a bellard
        int i, eflags;
865 d575b78a bellard
866 d575b78a bellard
        for(i = 0; i < 2; i++) {
867 d575b78a bellard
            op0 = 0x123456789abcd;
868 d575b78a bellard
            if (i == 0)
869 d575b78a bellard
                op1 = 0xfbca765423456;
870 d575b78a bellard
            else
871 d575b78a bellard
                op1 = op0;
872 d575b78a bellard
            op2 = 0x6532432432434;
873 d575b78a bellard
            asm("cmpxchg8b %1\n" 
874 d575b78a bellard
                "pushf\n"
875 d575b78a bellard
                "popl %2\n"
876 d575b78a bellard
                : "=A" (op0), "=m" (op1), "=g" (eflags)
877 d575b78a bellard
                : "0" (op0), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
878 d575b78a bellard
            printf("cmpxchg8b: op0=%016llx op1=%016llx CC=%02x\n", 
879 d575b78a bellard
                    op0, op1, eflags & CC_Z);
880 d575b78a bellard
        }
881 d575b78a bellard
    }
882 e5918247 bellard
}
883 e5918247 bellard
884 6dbad63e bellard
/**********************************************/
885 6dbad63e bellard
/* segmentation tests */
886 6dbad63e bellard
887 6dbad63e bellard
#include <asm/ldt.h>
888 6dbad63e bellard
#include <linux/unistd.h>
889 6dbad63e bellard
890 6dbad63e bellard
_syscall3(int, modify_ldt, int, func, void *, ptr, unsigned long, bytecount)
891 6dbad63e bellard
892 6dbad63e bellard
uint8_t seg_data1[4096];
893 6dbad63e bellard
uint8_t seg_data2[4096];
894 6dbad63e bellard
895 e5918247 bellard
#define MK_SEL(n) (((n) << 3) | 7)
896 6dbad63e bellard
897 288426fe bellard
#define TEST_LR(op, size, seg, mask)\
898 288426fe bellard
{\
899 288426fe bellard
    int res, res2;\
900 288426fe bellard
    res = 0x12345678;\
901 288426fe bellard
    asm (op " %" size "2, %" size "0\n" \
902 288426fe bellard
         "movl $0, %1\n"\
903 288426fe bellard
         "jnz 1f\n"\
904 288426fe bellard
         "movl $1, %1\n"\
905 288426fe bellard
         "1:\n"\
906 288426fe bellard
         : "=r" (res), "=r" (res2) : "m" (seg), "0" (res));\
907 288426fe bellard
    printf(op ": Z=%d %08x\n", res2, res & ~(mask));\
908 288426fe bellard
}
909 288426fe bellard
910 6dbad63e bellard
/* NOTE: we use Linux modify_ldt syscall */
911 6dbad63e bellard
void test_segs(void)
912 6dbad63e bellard
{
913 6dbad63e bellard
    struct modify_ldt_ldt_s ldt;
914 6dbad63e bellard
    long long ldt_table[3];
915 04369ff2 bellard
    int res, res2;
916 6dbad63e bellard
    char tmp;
917 e1d4294a bellard
    struct {
918 e1d4294a bellard
        uint32_t offset;
919 e1d4294a bellard
        uint16_t seg;
920 e1d4294a bellard
    } __attribute__((packed)) segoff;
921 6dbad63e bellard
922 6dbad63e bellard
    ldt.entry_number = 1;
923 6dbad63e bellard
    ldt.base_addr = (unsigned long)&seg_data1;
924 6dbad63e bellard
    ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
925 6dbad63e bellard
    ldt.seg_32bit = 1;
926 6dbad63e bellard
    ldt.contents = MODIFY_LDT_CONTENTS_DATA;
927 6dbad63e bellard
    ldt.read_exec_only = 0;
928 6dbad63e bellard
    ldt.limit_in_pages = 1;
929 6dbad63e bellard
    ldt.seg_not_present = 0;
930 6dbad63e bellard
    ldt.useable = 1;
931 6dbad63e bellard
    modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
932 6dbad63e bellard
933 6dbad63e bellard
    ldt.entry_number = 2;
934 6dbad63e bellard
    ldt.base_addr = (unsigned long)&seg_data2;
935 6dbad63e bellard
    ldt.limit = (sizeof(seg_data2) + 0xfff) >> 12;
936 6dbad63e bellard
    ldt.seg_32bit = 1;
937 6dbad63e bellard
    ldt.contents = MODIFY_LDT_CONTENTS_DATA;
938 6dbad63e bellard
    ldt.read_exec_only = 0;
939 6dbad63e bellard
    ldt.limit_in_pages = 1;
940 6dbad63e bellard
    ldt.seg_not_present = 0;
941 6dbad63e bellard
    ldt.useable = 1;
942 6dbad63e bellard
    modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
943 6dbad63e bellard
944 6dbad63e bellard
    modify_ldt(0, &ldt_table, sizeof(ldt_table)); /* read ldt entries */
945 04369ff2 bellard
#if 0
946 04369ff2 bellard
    {
947 04369ff2 bellard
        int i;
948 04369ff2 bellard
        for(i=0;i<3;i++)
949 04369ff2 bellard
            printf("%d: %016Lx\n", i, ldt_table[i]);
950 04369ff2 bellard
    }
951 04369ff2 bellard
#endif
952 6dbad63e bellard
    /* do some tests with fs or gs */
953 6dbad63e bellard
    asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
954 6dbad63e bellard
955 6dbad63e bellard
    seg_data1[1] = 0xaa;
956 6dbad63e bellard
    seg_data2[1] = 0x55;
957 6dbad63e bellard
958 6dbad63e bellard
    asm volatile ("fs movzbl 0x1, %0" : "=r" (res));
959 6dbad63e bellard
    printf("FS[1] = %02x\n", res);
960 6dbad63e bellard
961 070893f4 bellard
    asm volatile ("pushl %%gs\n"
962 070893f4 bellard
                  "movl %1, %%gs\n"
963 070893f4 bellard
                  "gs movzbl 0x1, %0\n"
964 070893f4 bellard
                  "popl %%gs\n"
965 070893f4 bellard
                  : "=r" (res)
966 070893f4 bellard
                  : "r" (MK_SEL(2)));
967 6dbad63e bellard
    printf("GS[1] = %02x\n", res);
968 6dbad63e bellard
969 6dbad63e bellard
    /* tests with ds/ss (implicit segment case) */
970 6dbad63e bellard
    tmp = 0xa5;
971 6dbad63e bellard
    asm volatile ("pushl %%ebp\n\t"
972 6dbad63e bellard
                  "pushl %%ds\n\t"
973 6dbad63e bellard
                  "movl %2, %%ds\n\t"
974 6dbad63e bellard
                  "movl %3, %%ebp\n\t"
975 6dbad63e bellard
                  "movzbl 0x1, %0\n\t"
976 6dbad63e bellard
                  "movzbl (%%ebp), %1\n\t"
977 6dbad63e bellard
                  "popl %%ds\n\t"
978 6dbad63e bellard
                  "popl %%ebp\n\t"
979 6dbad63e bellard
                  : "=r" (res), "=r" (res2)
980 6dbad63e bellard
                  : "r" (MK_SEL(1)), "r" (&tmp));
981 6dbad63e bellard
    printf("DS[1] = %02x\n", res);
982 6dbad63e bellard
    printf("SS[tmp] = %02x\n", res2);
983 e1d4294a bellard
984 e1d4294a bellard
    segoff.seg = MK_SEL(2);
985 e1d4294a bellard
    segoff.offset = 0xabcdef12;
986 e1d4294a bellard
    asm volatile("lfs %2, %0\n\t" 
987 e1d4294a bellard
                 "movl %%fs, %1\n\t"
988 e1d4294a bellard
                 : "=r" (res), "=g" (res2) 
989 e1d4294a bellard
                 : "m" (segoff));
990 e1d4294a bellard
    printf("FS:reg = %04x:%08x\n", res2, res);
991 288426fe bellard
992 288426fe bellard
    TEST_LR("larw", "w", MK_SEL(2), 0x0100);
993 288426fe bellard
    TEST_LR("larl", "", MK_SEL(2), 0x0100);
994 288426fe bellard
    TEST_LR("lslw", "w", MK_SEL(2), 0);
995 288426fe bellard
    TEST_LR("lsll", "", MK_SEL(2), 0);
996 288426fe bellard
997 288426fe bellard
    TEST_LR("larw", "w", 0xfff8, 0);
998 288426fe bellard
    TEST_LR("larl", "", 0xfff8, 0);
999 288426fe bellard
    TEST_LR("lslw", "w", 0xfff8, 0);
1000 288426fe bellard
    TEST_LR("lsll", "", 0xfff8, 0);
1001 6dbad63e bellard
}
1002 55480af8 bellard
1003 e5918247 bellard
/* 16 bit code test */
1004 e5918247 bellard
extern char code16_start, code16_end;
1005 e5918247 bellard
extern char code16_func1;
1006 e5918247 bellard
extern char code16_func2;
1007 e5918247 bellard
extern char code16_func3;
1008 a300e691 bellard
1009 e5918247 bellard
void test_code16(void)
1010 1a9353d2 bellard
{
1011 e5918247 bellard
    struct modify_ldt_ldt_s ldt;
1012 e5918247 bellard
    int res, res2;
1013 a300e691 bellard
1014 e5918247 bellard
    /* build a code segment */
1015 e5918247 bellard
    ldt.entry_number = 1;
1016 e5918247 bellard
    ldt.base_addr = (unsigned long)&code16_start;
1017 e5918247 bellard
    ldt.limit = &code16_end - &code16_start;
1018 e5918247 bellard
    ldt.seg_32bit = 0;
1019 e5918247 bellard
    ldt.contents = MODIFY_LDT_CONTENTS_CODE;
1020 e5918247 bellard
    ldt.read_exec_only = 0;
1021 e5918247 bellard
    ldt.limit_in_pages = 0;
1022 e5918247 bellard
    ldt.seg_not_present = 0;
1023 e5918247 bellard
    ldt.useable = 1;
1024 e5918247 bellard
    modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1025 a300e691 bellard
1026 e5918247 bellard
    /* call the first function */
1027 e5918247 bellard
    asm volatile ("lcall %1, %2" 
1028 e5918247 bellard
                  : "=a" (res)
1029 e5918247 bellard
                  : "i" (MK_SEL(1)), "i" (&code16_func1): "memory", "cc");
1030 e5918247 bellard
    printf("func1() = 0x%08x\n", res);
1031 e5918247 bellard
    asm volatile ("lcall %2, %3" 
1032 e5918247 bellard
                  : "=a" (res), "=c" (res2)
1033 e5918247 bellard
                  : "i" (MK_SEL(1)), "i" (&code16_func2): "memory", "cc");
1034 e5918247 bellard
    printf("func2() = 0x%08x spdec=%d\n", res, res2);
1035 e5918247 bellard
    asm volatile ("lcall %1, %2" 
1036 e5918247 bellard
                  : "=a" (res)
1037 e5918247 bellard
                  : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
1038 e5918247 bellard
    printf("func3() = 0x%08x\n", res);
1039 1a9353d2 bellard
}
1040 1a9353d2 bellard
1041 dd3587f3 bellard
extern char func_lret32;
1042 dd3587f3 bellard
extern char func_iret32;
1043 dd3587f3 bellard
1044 e1d4294a bellard
void test_misc(void)
1045 e1d4294a bellard
{
1046 e1d4294a bellard
    char table[256];
1047 e1d4294a bellard
    int res, i;
1048 e1d4294a bellard
1049 e1d4294a bellard
    for(i=0;i<256;i++) table[i] = 256 - i;
1050 e1d4294a bellard
    res = 0x12345678;
1051 e1d4294a bellard
    asm ("xlat" : "=a" (res) : "b" (table), "0" (res));
1052 e1d4294a bellard
    printf("xlat: EAX=%08x\n", res);
1053 dd3587f3 bellard
1054 dd3587f3 bellard
    asm volatile ("pushl %%cs ; call %1" 
1055 dd3587f3 bellard
                  : "=a" (res)
1056 dd3587f3 bellard
                  : "m" (func_lret32): "memory", "cc");
1057 dd3587f3 bellard
    printf("func_lret32=%x\n", res);
1058 dd3587f3 bellard
1059 dd3587f3 bellard
    asm volatile ("pushfl ; pushl %%cs ; call %1" 
1060 dd3587f3 bellard
                  : "=a" (res)
1061 dd3587f3 bellard
                  : "m" (func_iret32): "memory", "cc");
1062 dd3587f3 bellard
    printf("func_iret32=%x\n", res);
1063 dd3587f3 bellard
1064 dd3587f3 bellard
    /* specific popl test */
1065 dd3587f3 bellard
    asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popl (%%esp) ; popl %0"
1066 dd3587f3 bellard
                  : "=g" (res));
1067 dd3587f3 bellard
    printf("popl esp=%x\n", res);
1068 b2b5fb22 bellard
1069 b2b5fb22 bellard
    /* specific popw test */
1070 b2b5fb22 bellard
    asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popw (%%esp) ; addl $2, %%esp ; popl %0"
1071 b2b5fb22 bellard
                  : "=g" (res));
1072 b2b5fb22 bellard
    printf("popw esp=%x\n", res);
1073 e1d4294a bellard
}
1074 e1d4294a bellard
1075 e1d4294a bellard
uint8_t str_buffer[4096];
1076 e1d4294a bellard
1077 e1d4294a bellard
#define TEST_STRING1(OP, size, DF, REP)\
1078 e1d4294a bellard
{\
1079 e1d4294a bellard
    int esi, edi, eax, ecx, eflags;\
1080 e1d4294a bellard
\
1081 e1d4294a bellard
    esi = (long)(str_buffer + sizeof(str_buffer) / 2);\
1082 e1d4294a bellard
    edi = (long)(str_buffer + sizeof(str_buffer) / 2) + 16;\
1083 e1d4294a bellard
    eax = 0x12345678;\
1084 e1d4294a bellard
    ecx = 17;\
1085 e1d4294a bellard
\
1086 e1d4294a bellard
    asm volatile ("pushl $0\n\t"\
1087 e1d4294a bellard
                  "popf\n\t"\
1088 e1d4294a bellard
                  DF "\n\t"\
1089 e1d4294a bellard
                  REP #OP size "\n\t"\
1090 e1d4294a bellard
                  "cld\n\t"\
1091 e1d4294a bellard
                  "pushf\n\t"\
1092 e1d4294a bellard
                  "popl %4\n\t"\
1093 e1d4294a bellard
                  : "=S" (esi), "=D" (edi), "=a" (eax), "=c" (ecx), "=g" (eflags)\
1094 e1d4294a bellard
                  : "0" (esi), "1" (edi), "2" (eax), "3" (ecx));\
1095 e1d4294a bellard
    printf("%-10s ESI=%08x EDI=%08x EAX=%08x ECX=%08x EFL=%04x\n",\
1096 e1d4294a bellard
           REP #OP size, esi, edi, eax, ecx,\
1097 e1d4294a bellard
           eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\
1098 e1d4294a bellard
}
1099 e1d4294a bellard
1100 e1d4294a bellard
#define TEST_STRING(OP, REP)\
1101 e1d4294a bellard
    TEST_STRING1(OP, "b", "", REP);\
1102 e1d4294a bellard
    TEST_STRING1(OP, "w", "", REP);\
1103 e1d4294a bellard
    TEST_STRING1(OP, "l", "", REP);\
1104 e1d4294a bellard
    TEST_STRING1(OP, "b", "std", REP);\
1105 e1d4294a bellard
    TEST_STRING1(OP, "w", "std", REP);\
1106 e1d4294a bellard
    TEST_STRING1(OP, "l", "std", REP)
1107 e1d4294a bellard
1108 e1d4294a bellard
void test_string(void)
1109 e1d4294a bellard
{
1110 e1d4294a bellard
    int i;
1111 e1d4294a bellard
    for(i = 0;i < sizeof(str_buffer); i++)
1112 e1d4294a bellard
        str_buffer[i] = i + 0x56;
1113 e1d4294a bellard
   TEST_STRING(stos, "");
1114 e1d4294a bellard
   TEST_STRING(stos, "rep ");
1115 e1d4294a bellard
   TEST_STRING(lods, ""); /* to verify stos */
1116 e1d4294a bellard
   TEST_STRING(lods, "rep "); 
1117 e1d4294a bellard
   TEST_STRING(movs, "");
1118 e1d4294a bellard
   TEST_STRING(movs, "rep ");
1119 e1d4294a bellard
   TEST_STRING(lods, ""); /* to verify stos */
1120 e1d4294a bellard
1121 e1d4294a bellard
   /* XXX: better tests */
1122 e1d4294a bellard
   TEST_STRING(scas, "");
1123 e1d4294a bellard
   TEST_STRING(scas, "repz ");
1124 e1d4294a bellard
   TEST_STRING(scas, "repnz ");
1125 e1d4294a bellard
   TEST_STRING(cmps, "");
1126 e1d4294a bellard
   TEST_STRING(cmps, "repz ");
1127 e1d4294a bellard
   TEST_STRING(cmps, "repnz ");
1128 e1d4294a bellard
}
1129 e5918247 bellard
1130 3a27ad0b bellard
/* VM86 test */
1131 3a27ad0b bellard
1132 3a27ad0b bellard
static inline void set_bit(uint8_t *a, unsigned int bit)
1133 3a27ad0b bellard
{
1134 3a27ad0b bellard
    a[bit / 8] |= (1 << (bit % 8));
1135 3a27ad0b bellard
}
1136 3a27ad0b bellard
1137 3a27ad0b bellard
static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg)
1138 3a27ad0b bellard
{
1139 3a27ad0b bellard
    return (uint8_t *)((seg << 4) + (reg & 0xffff));
1140 3a27ad0b bellard
}
1141 3a27ad0b bellard
1142 3a27ad0b bellard
static inline void pushw(struct vm86_regs *r, int val)
1143 3a27ad0b bellard
{
1144 3a27ad0b bellard
    r->esp = (r->esp & ~0xffff) | ((r->esp - 2) & 0xffff);
1145 3a27ad0b bellard
    *(uint16_t *)seg_to_linear(r->ss, r->esp) = val;
1146 3a27ad0b bellard
}
1147 3a27ad0b bellard
1148 3a27ad0b bellard
#undef __syscall_return
1149 3a27ad0b bellard
#define __syscall_return(type, res) \
1150 3a27ad0b bellard
do { \
1151 3a27ad0b bellard
        return (type) (res); \
1152 3a27ad0b bellard
} while (0)
1153 3a27ad0b bellard
1154 3a27ad0b bellard
_syscall2(int, vm86, int, func, struct vm86plus_struct *, v86)
1155 3a27ad0b bellard
1156 3a27ad0b bellard
extern char vm86_code_start;
1157 3a27ad0b bellard
extern char vm86_code_end;
1158 3a27ad0b bellard
1159 3a27ad0b bellard
#define VM86_CODE_CS 0x100
1160 3a27ad0b bellard
#define VM86_CODE_IP 0x100
1161 3a27ad0b bellard
1162 3a27ad0b bellard
void test_vm86(void)
1163 3a27ad0b bellard
{
1164 3a27ad0b bellard
    struct vm86plus_struct ctx;
1165 3a27ad0b bellard
    struct vm86_regs *r;
1166 3a27ad0b bellard
    uint8_t *vm86_mem;
1167 3a27ad0b bellard
    int seg, ret;
1168 3a27ad0b bellard
1169 3a27ad0b bellard
    vm86_mem = mmap((void *)0x00000000, 0x110000, 
1170 3a27ad0b bellard
                    PROT_WRITE | PROT_READ | PROT_EXEC, 
1171 3a27ad0b bellard
                    MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0);
1172 3a27ad0b bellard
    if (vm86_mem == MAP_FAILED) {
1173 3a27ad0b bellard
        printf("ERROR: could not map vm86 memory");
1174 3a27ad0b bellard
        return;
1175 3a27ad0b bellard
    }
1176 3a27ad0b bellard
    memset(&ctx, 0, sizeof(ctx));
1177 3a27ad0b bellard
1178 3a27ad0b bellard
    /* init basic registers */
1179 3a27ad0b bellard
    r = &ctx.regs;
1180 3a27ad0b bellard
    r->eip = VM86_CODE_IP;
1181 3a27ad0b bellard
    r->esp = 0xfffe;
1182 3a27ad0b bellard
    seg = VM86_CODE_CS;
1183 3a27ad0b bellard
    r->cs = seg;
1184 3a27ad0b bellard
    r->ss = seg;
1185 3a27ad0b bellard
    r->ds = seg;
1186 3a27ad0b bellard
    r->es = seg;
1187 3a27ad0b bellard
    r->fs = seg;
1188 3a27ad0b bellard
    r->gs = seg;
1189 3a27ad0b bellard
    r->eflags = VIF_MASK;
1190 3a27ad0b bellard
1191 3a27ad0b bellard
    /* move code to proper address. We use the same layout as a .com
1192 3a27ad0b bellard
       dos program. */
1193 3a27ad0b bellard
    memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP, 
1194 3a27ad0b bellard
           &vm86_code_start, &vm86_code_end - &vm86_code_start);
1195 3a27ad0b bellard
1196 3a27ad0b bellard
    /* mark int 0x21 as being emulated */
1197 3a27ad0b bellard
    set_bit((uint8_t *)&ctx.int_revectored, 0x21);
1198 3a27ad0b bellard
1199 3a27ad0b bellard
    for(;;) {
1200 3a27ad0b bellard
        ret = vm86(VM86_ENTER, &ctx);
1201 3a27ad0b bellard
        switch(VM86_TYPE(ret)) {
1202 3a27ad0b bellard
        case VM86_INTx:
1203 3a27ad0b bellard
            {
1204 3ff0631e bellard
                int int_num, ah, v;
1205 3a27ad0b bellard
                
1206 3a27ad0b bellard
                int_num = VM86_ARG(ret);
1207 3a27ad0b bellard
                if (int_num != 0x21)
1208 3a27ad0b bellard
                    goto unknown_int;
1209 3a27ad0b bellard
                ah = (r->eax >> 8) & 0xff;
1210 3a27ad0b bellard
                switch(ah) {
1211 3a27ad0b bellard
                case 0x00: /* exit */
1212 3a27ad0b bellard
                    goto the_end;
1213 3a27ad0b bellard
                case 0x02: /* write char */
1214 3a27ad0b bellard
                    {
1215 3a27ad0b bellard
                        uint8_t c = r->edx;
1216 3a27ad0b bellard
                        putchar(c);
1217 3a27ad0b bellard
                    }
1218 3a27ad0b bellard
                    break;
1219 3a27ad0b bellard
                case 0x09: /* write string */
1220 3a27ad0b bellard
                    {
1221 3a27ad0b bellard
                        uint8_t c, *ptr;
1222 3a27ad0b bellard
                        ptr = seg_to_linear(r->ds, r->edx);
1223 3a27ad0b bellard
                        for(;;) {
1224 3a27ad0b bellard
                            c = *ptr++;
1225 3a27ad0b bellard
                            if (c == '$')
1226 3a27ad0b bellard
                                break;
1227 3a27ad0b bellard
                            putchar(c);
1228 3a27ad0b bellard
                        }
1229 3a27ad0b bellard
                        r->eax = (r->eax & ~0xff) | '$';
1230 3a27ad0b bellard
                    }
1231 3a27ad0b bellard
                    break;
1232 3ff0631e bellard
                case 0xff: /* extension: write eflags number in edx */
1233 3ff0631e bellard
                    v = (int)r->edx;
1234 3ff0631e bellard
#ifndef LINUX_VM86_IOPL_FIX
1235 3ff0631e bellard
                    v &= ~0x3000;
1236 3ff0631e bellard
#endif
1237 3ff0631e bellard
                    printf("%08x\n", v);
1238 3a27ad0b bellard
                    break;
1239 3a27ad0b bellard
                default:
1240 3a27ad0b bellard
                unknown_int:
1241 3a27ad0b bellard
                    printf("unsupported int 0x%02x\n", int_num);
1242 3a27ad0b bellard
                    goto the_end;
1243 3a27ad0b bellard
                }
1244 3a27ad0b bellard
            }
1245 3a27ad0b bellard
            break;
1246 3a27ad0b bellard
        case VM86_SIGNAL:
1247 3a27ad0b bellard
            /* a signal came, we just ignore that */
1248 3a27ad0b bellard
            break;
1249 3a27ad0b bellard
        case VM86_STI:
1250 3a27ad0b bellard
            break;
1251 3a27ad0b bellard
        default:
1252 3a27ad0b bellard
            printf("ERROR: unhandled vm86 return code (0x%x)\n", ret);
1253 3a27ad0b bellard
            goto the_end;
1254 3a27ad0b bellard
        }
1255 3a27ad0b bellard
    }
1256 3a27ad0b bellard
 the_end:
1257 3a27ad0b bellard
    printf("VM86 end\n");
1258 3a27ad0b bellard
    munmap(vm86_mem, 0x110000);
1259 3a27ad0b bellard
}
1260 3a27ad0b bellard
1261 3a27ad0b bellard
/* exception tests */
1262 3a27ad0b bellard
#ifndef REG_EAX
1263 3a27ad0b bellard
#define REG_EAX EAX
1264 3a27ad0b bellard
#define REG_EBX EBX
1265 3a27ad0b bellard
#define REG_ECX ECX
1266 3a27ad0b bellard
#define REG_EDX EDX
1267 3a27ad0b bellard
#define REG_ESI ESI
1268 3a27ad0b bellard
#define REG_EDI EDI
1269 3a27ad0b bellard
#define REG_EBP EBP
1270 3a27ad0b bellard
#define REG_ESP ESP
1271 3a27ad0b bellard
#define REG_EIP EIP
1272 3a27ad0b bellard
#define REG_EFL EFL
1273 3a27ad0b bellard
#define REG_TRAPNO TRAPNO
1274 3a27ad0b bellard
#define REG_ERR ERR
1275 3a27ad0b bellard
#endif
1276 3a27ad0b bellard
1277 3a27ad0b bellard
jmp_buf jmp_env;
1278 3a27ad0b bellard
int v1;
1279 3a27ad0b bellard
int tab[2];
1280 3a27ad0b bellard
1281 3a27ad0b bellard
void sig_handler(int sig, siginfo_t *info, void *puc)
1282 3a27ad0b bellard
{
1283 3a27ad0b bellard
    struct ucontext *uc = puc;
1284 3a27ad0b bellard
1285 3a27ad0b bellard
    printf("si_signo=%d si_errno=%d si_code=%d",
1286 3a27ad0b bellard
           info->si_signo, info->si_errno, info->si_code);
1287 e3b32540 bellard
    printf(" si_addr=0x%08lx",
1288 e3b32540 bellard
           (unsigned long)info->si_addr);
1289 3a27ad0b bellard
    printf("\n");
1290 3a27ad0b bellard
1291 3a27ad0b bellard
    printf("trapno=0x%02x err=0x%08x",
1292 3a27ad0b bellard
           uc->uc_mcontext.gregs[REG_TRAPNO],
1293 3a27ad0b bellard
           uc->uc_mcontext.gregs[REG_ERR]);
1294 e3b32540 bellard
    printf(" EIP=0x%08x", uc->uc_mcontext.gregs[REG_EIP]);
1295 3a27ad0b bellard
    printf("\n");
1296 3a27ad0b bellard
    longjmp(jmp_env, 1);
1297 3a27ad0b bellard
}
1298 3a27ad0b bellard
1299 3a27ad0b bellard
void test_exceptions(void)
1300 3a27ad0b bellard
{
1301 e3b32540 bellard
    struct modify_ldt_ldt_s ldt;
1302 3a27ad0b bellard
    struct sigaction act;
1303 3a27ad0b bellard
    volatile int val;
1304 3a27ad0b bellard
    
1305 3a27ad0b bellard
    act.sa_sigaction = sig_handler;
1306 3a27ad0b bellard
    sigemptyset(&act.sa_mask);
1307 3a27ad0b bellard
    act.sa_flags = SA_SIGINFO;
1308 3a27ad0b bellard
    sigaction(SIGFPE, &act, NULL);
1309 3a27ad0b bellard
    sigaction(SIGILL, &act, NULL);
1310 3a27ad0b bellard
    sigaction(SIGSEGV, &act, NULL);
1311 e3b32540 bellard
    sigaction(SIGBUS, &act, NULL);
1312 3a27ad0b bellard
    sigaction(SIGTRAP, &act, NULL);
1313 3a27ad0b bellard
1314 3a27ad0b bellard
    /* test division by zero reporting */
1315 e3b32540 bellard
    printf("DIVZ exception:\n");
1316 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1317 3a27ad0b bellard
        /* now divide by zero */
1318 3a27ad0b bellard
        v1 = 0;
1319 3a27ad0b bellard
        v1 = 2 / v1;
1320 3a27ad0b bellard
    }
1321 3a27ad0b bellard
1322 e3b32540 bellard
    printf("BOUND exception:\n");
1323 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1324 3a27ad0b bellard
        /* bound exception */
1325 3a27ad0b bellard
        tab[0] = 1;
1326 3a27ad0b bellard
        tab[1] = 10;
1327 3a27ad0b bellard
        asm volatile ("bound %0, %1" : : "r" (11), "m" (tab));
1328 3a27ad0b bellard
    }
1329 3a27ad0b bellard
1330 e3b32540 bellard
    printf("segment exceptions:\n");
1331 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1332 e3b32540 bellard
        /* load an invalid segment */
1333 e3b32540 bellard
        asm volatile ("movl %0, %%fs" : : "r" ((0x1234 << 3) | 1));
1334 e3b32540 bellard
    }
1335 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1336 e3b32540 bellard
        /* null data segment is valid */
1337 e3b32540 bellard
        asm volatile ("movl %0, %%fs" : : "r" (3));
1338 e3b32540 bellard
        /* null stack segment */
1339 e3b32540 bellard
        asm volatile ("movl %0, %%ss" : : "r" (3));
1340 e3b32540 bellard
    }
1341 e3b32540 bellard
1342 e3b32540 bellard
    ldt.entry_number = 1;
1343 e3b32540 bellard
    ldt.base_addr = (unsigned long)&seg_data1;
1344 e3b32540 bellard
    ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
1345 e3b32540 bellard
    ldt.seg_32bit = 1;
1346 e3b32540 bellard
    ldt.contents = MODIFY_LDT_CONTENTS_DATA;
1347 e3b32540 bellard
    ldt.read_exec_only = 0;
1348 e3b32540 bellard
    ldt.limit_in_pages = 1;
1349 e3b32540 bellard
    ldt.seg_not_present = 1;
1350 e3b32540 bellard
    ldt.useable = 1;
1351 e3b32540 bellard
    modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1352 e3b32540 bellard
1353 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1354 e3b32540 bellard
        /* segment not present */
1355 e3b32540 bellard
        asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
1356 e3b32540 bellard
    }
1357 e3b32540 bellard
1358 3a27ad0b bellard
    /* test SEGV reporting */
1359 e3b32540 bellard
    printf("PF exception:\n");
1360 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1361 e3b32540 bellard
        val = 1;
1362 ede28208 bellard
        /* we add a nop to test a weird PC retrieval case */
1363 ede28208 bellard
        asm volatile ("nop");
1364 3a27ad0b bellard
        /* now store in an invalid address */
1365 3a27ad0b bellard
        *(char *)0x1234 = 1;
1366 3a27ad0b bellard
    }
1367 3a27ad0b bellard
1368 3a27ad0b bellard
    /* test SEGV reporting */
1369 e3b32540 bellard
    printf("PF exception:\n");
1370 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1371 e3b32540 bellard
        val = 1;
1372 3a27ad0b bellard
        /* read from an invalid address */
1373 3a27ad0b bellard
        v1 = *(char *)0x1234;
1374 3a27ad0b bellard
    }
1375 3a27ad0b bellard
    
1376 3a27ad0b bellard
    /* test illegal instruction reporting */
1377 3a27ad0b bellard
    printf("UD2 exception:\n");
1378 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1379 3a27ad0b bellard
        /* now execute an invalid instruction */
1380 3a27ad0b bellard
        asm volatile("ud2");
1381 3a27ad0b bellard
    }
1382 4120b61d bellard
    printf("lock nop exception:\n");
1383 4120b61d bellard
    if (setjmp(jmp_env) == 0) {
1384 4120b61d bellard
        /* now execute an invalid instruction */
1385 4120b61d bellard
        asm volatile("lock nop");
1386 4120b61d bellard
    }
1387 3a27ad0b bellard
    
1388 3a27ad0b bellard
    printf("INT exception:\n");
1389 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1390 3a27ad0b bellard
        asm volatile ("int $0xfd");
1391 3a27ad0b bellard
    }
1392 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1393 e3b32540 bellard
        asm volatile ("int $0x01");
1394 e3b32540 bellard
    }
1395 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1396 e3b32540 bellard
        asm volatile (".byte 0xcd, 0x03");
1397 e3b32540 bellard
    }
1398 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1399 e3b32540 bellard
        asm volatile ("int $0x04");
1400 e3b32540 bellard
    }
1401 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1402 e3b32540 bellard
        asm volatile ("int $0x05");
1403 e3b32540 bellard
    }
1404 3a27ad0b bellard
1405 3a27ad0b bellard
    printf("INT3 exception:\n");
1406 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1407 3a27ad0b bellard
        asm volatile ("int3");
1408 3a27ad0b bellard
    }
1409 3a27ad0b bellard
1410 3a27ad0b bellard
    printf("CLI exception:\n");
1411 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1412 3a27ad0b bellard
        asm volatile ("cli");
1413 3a27ad0b bellard
    }
1414 3a27ad0b bellard
1415 3a27ad0b bellard
    printf("STI exception:\n");
1416 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1417 3a27ad0b bellard
        asm volatile ("cli");
1418 3a27ad0b bellard
    }
1419 3a27ad0b bellard
1420 3a27ad0b bellard
    printf("INTO exception:\n");
1421 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1422 3a27ad0b bellard
        /* overflow exception */
1423 3a27ad0b bellard
        asm volatile ("addl $1, %0 ; into" : : "r" (0x7fffffff));
1424 3a27ad0b bellard
    }
1425 3a27ad0b bellard
1426 3a27ad0b bellard
    printf("OUTB exception:\n");
1427 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1428 3a27ad0b bellard
        asm volatile ("outb %%al, %%dx" : : "d" (0x4321), "a" (0));
1429 3a27ad0b bellard
    }
1430 3a27ad0b bellard
1431 3a27ad0b bellard
    printf("INB exception:\n");
1432 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1433 3a27ad0b bellard
        asm volatile ("inb %%dx, %%al" : "=a" (val) : "d" (0x4321));
1434 3a27ad0b bellard
    }
1435 3a27ad0b bellard
1436 3a27ad0b bellard
    printf("REP OUTSB exception:\n");
1437 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1438 3a27ad0b bellard
        asm volatile ("rep outsb" : : "d" (0x4321), "S" (tab), "c" (1));
1439 3a27ad0b bellard
    }
1440 3a27ad0b bellard
1441 3a27ad0b bellard
    printf("REP INSB exception:\n");
1442 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1443 3a27ad0b bellard
        asm volatile ("rep insb" : : "d" (0x4321), "D" (tab), "c" (1));
1444 3a27ad0b bellard
    }
1445 3a27ad0b bellard
1446 3a27ad0b bellard
    printf("HLT exception:\n");
1447 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1448 3a27ad0b bellard
        asm volatile ("hlt");
1449 3a27ad0b bellard
    }
1450 3a27ad0b bellard
1451 3a27ad0b bellard
    printf("single step exception:\n");
1452 3a27ad0b bellard
    val = 0;
1453 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1454 3a27ad0b bellard
        asm volatile ("pushf\n"
1455 3a27ad0b bellard
                      "orl $0x00100, (%%esp)\n"
1456 3a27ad0b bellard
                      "popf\n"
1457 3a27ad0b bellard
                      "movl $0xabcd, %0\n" 
1458 3a27ad0b bellard
                      "movl $0x0, %0\n" : "=m" (val) : : "cc", "memory");
1459 3a27ad0b bellard
    }
1460 3a27ad0b bellard
    printf("val=0x%x\n", val);
1461 3a27ad0b bellard
}
1462 3a27ad0b bellard
1463 3ff0631e bellard
/* specific precise single step test */
1464 3ff0631e bellard
void sig_trap_handler(int sig, siginfo_t *info, void *puc)
1465 3ff0631e bellard
{
1466 3ff0631e bellard
    struct ucontext *uc = puc;
1467 3ff0631e bellard
    printf("EIP=0x%08x\n", uc->uc_mcontext.gregs[REG_EIP]);
1468 3ff0631e bellard
}
1469 3ff0631e bellard
1470 3ff0631e bellard
const uint8_t sstep_buf1[4] = { 1, 2, 3, 4};
1471 3ff0631e bellard
uint8_t sstep_buf2[4];
1472 3ff0631e bellard
1473 3ff0631e bellard
void test_single_step(void)
1474 3ff0631e bellard
{
1475 3ff0631e bellard
    struct sigaction act;
1476 3ff0631e bellard
    volatile int val;
1477 3ff0631e bellard
    int i;
1478 3ff0631e bellard
1479 3ff0631e bellard
    val = 0;
1480 3ff0631e bellard
    act.sa_sigaction = sig_trap_handler;
1481 3ff0631e bellard
    sigemptyset(&act.sa_mask);
1482 3ff0631e bellard
    act.sa_flags = SA_SIGINFO;
1483 3ff0631e bellard
    sigaction(SIGTRAP, &act, NULL);
1484 3ff0631e bellard
    asm volatile ("pushf\n"
1485 3ff0631e bellard
                  "orl $0x00100, (%%esp)\n"
1486 3ff0631e bellard
                  "popf\n"
1487 3ff0631e bellard
                  "movl $0xabcd, %0\n" 
1488 3ff0631e bellard
1489 3ff0631e bellard
                  /* jmp test */
1490 3ff0631e bellard
                  "movl $3, %%ecx\n"
1491 3ff0631e bellard
                  "1:\n"
1492 3ff0631e bellard
                  "addl $1, %0\n"
1493 3ff0631e bellard
                  "decl %%ecx\n"
1494 3ff0631e bellard
                  "jnz 1b\n"
1495 3ff0631e bellard
1496 3ff0631e bellard
                  /* movsb: the single step should stop at each movsb iteration */
1497 3ff0631e bellard
                  "movl $sstep_buf1, %%esi\n"
1498 3ff0631e bellard
                  "movl $sstep_buf2, %%edi\n"
1499 3ff0631e bellard
                  "movl $0, %%ecx\n"
1500 3ff0631e bellard
                  "rep movsb\n"
1501 3ff0631e bellard
                  "movl $3, %%ecx\n"
1502 3ff0631e bellard
                  "rep movsb\n"
1503 3ff0631e bellard
                  "movl $1, %%ecx\n"
1504 3ff0631e bellard
                  "rep movsb\n"
1505 3ff0631e bellard
1506 3ff0631e bellard
                  /* cmpsb: the single step should stop at each cmpsb iteration */
1507 3ff0631e bellard
                  "movl $sstep_buf1, %%esi\n"
1508 3ff0631e bellard
                  "movl $sstep_buf2, %%edi\n"
1509 3ff0631e bellard
                  "movl $0, %%ecx\n"
1510 3ff0631e bellard
                  "rep cmpsb\n"
1511 3ff0631e bellard
                  "movl $4, %%ecx\n"
1512 3ff0631e bellard
                  "rep cmpsb\n"
1513 3ff0631e bellard
                  
1514 3ff0631e bellard
                  /* getpid() syscall: single step should skip one
1515 3ff0631e bellard
                     instruction */
1516 3ff0631e bellard
                  "movl $20, %%eax\n"
1517 3ff0631e bellard
                  "int $0x80\n"
1518 3ff0631e bellard
                  "movl $0, %%eax\n"
1519 3ff0631e bellard
                  
1520 3ff0631e bellard
                  /* when modifying SS, trace is not done on the next
1521 3ff0631e bellard
                     instruction */
1522 3ff0631e bellard
                  "movl %%ss, %%ecx\n"
1523 3ff0631e bellard
                  "movl %%ecx, %%ss\n"
1524 3ff0631e bellard
                  "addl $1, %0\n"
1525 3ff0631e bellard
                  "movl $1, %%eax\n"
1526 3ff0631e bellard
                  "movl %%ecx, %%ss\n"
1527 3ff0631e bellard
                  "jmp 1f\n"
1528 3ff0631e bellard
                  "addl $1, %0\n"
1529 3ff0631e bellard
                  "1:\n"
1530 3ff0631e bellard
                  "movl $1, %%eax\n"
1531 3ff0631e bellard
                  "pushl %%ecx\n"
1532 3ff0631e bellard
                  "popl %%ss\n"
1533 3ff0631e bellard
                  "addl $1, %0\n"
1534 3ff0631e bellard
                  "movl $1, %%eax\n"
1535 3ff0631e bellard
                  
1536 3ff0631e bellard
                  "pushf\n"
1537 3ff0631e bellard
                  "andl $~0x00100, (%%esp)\n"
1538 3ff0631e bellard
                  "popf\n"
1539 3ff0631e bellard
                  : "=m" (val) 
1540 3ff0631e bellard
                  : 
1541 3ff0631e bellard
                  : "cc", "memory", "eax", "ecx", "esi", "edi");
1542 3ff0631e bellard
    printf("val=%d\n", val);
1543 3ff0631e bellard
    for(i = 0; i < 4; i++)
1544 3ff0631e bellard
        printf("sstep_buf2[%d] = %d\n", i, sstep_buf2[i]);
1545 3ff0631e bellard
}
1546 3ff0631e bellard
1547 3a27ad0b bellard
/* self modifying code test */
1548 3a27ad0b bellard
uint8_t code[] = {
1549 3a27ad0b bellard
    0xb8, 0x1, 0x00, 0x00, 0x00, /* movl $1, %eax */
1550 3a27ad0b bellard
    0xc3, /* ret */
1551 3a27ad0b bellard
};
1552 3a27ad0b bellard
1553 d1fe2b24 bellard
typedef int FuncType(void);
1554 d1fe2b24 bellard
1555 3a27ad0b bellard
void test_self_modifying_code(void)
1556 3a27ad0b bellard
{
1557 d1fe2b24 bellard
    int i;
1558 3a27ad0b bellard
1559 3a27ad0b bellard
    printf("self modifying code:\n");
1560 d1fe2b24 bellard
    printf("func1 = 0x%x\n", ((FuncType *)code)());
1561 d1fe2b24 bellard
    for(i = 2; i <= 4; i++) {
1562 d1fe2b24 bellard
        code[1] = i;
1563 d1fe2b24 bellard
        printf("func%d = 0x%x\n", i, ((FuncType *)code)());
1564 d1fe2b24 bellard
    }
1565 3a27ad0b bellard
}
1566 3a27ad0b bellard
    
1567 4d1135e4 bellard
static void *call_end __init_call = NULL;
1568 4d1135e4 bellard
1569 4d1135e4 bellard
int main(int argc, char **argv)
1570 4d1135e4 bellard
{
1571 4d1135e4 bellard
    void **ptr;
1572 4d1135e4 bellard
    void (*func)(void);
1573 4b74fe1f bellard
1574 4d1135e4 bellard
    ptr = &call_start + 1;
1575 4d1135e4 bellard
    while (*ptr != NULL) {
1576 4d1135e4 bellard
        func = *ptr++;
1577 4d1135e4 bellard
        func();
1578 4d1135e4 bellard
    }
1579 9d8e9c09 bellard
    test_bsx();
1580 d57c4e01 bellard
    test_mul();
1581 4d1135e4 bellard
    test_jcc();
1582 9d8e9c09 bellard
    test_floats();
1583 55480af8 bellard
    test_bcd();
1584 1a9353d2 bellard
    test_xchg();
1585 e1d4294a bellard
    test_string();
1586 e1d4294a bellard
    test_misc();
1587 6dbad63e bellard
    test_lea();
1588 6dbad63e bellard
    test_segs();
1589 e5918247 bellard
    test_code16();
1590 3a27ad0b bellard
    test_vm86();
1591 3a27ad0b bellard
    test_exceptions();
1592 3a27ad0b bellard
    test_self_modifying_code();
1593 3ff0631e bellard
    test_single_step();
1594 4d1135e4 bellard
    return 0;
1595 4d1135e4 bellard
}